BG96 Hardware Design

LPWA Module Series

Version: 1.6

Date: 2023-02-21

Status: Released

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 LPWA Module Series

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Copyright © Quectel Wireless Solutions Co., Ltd. 2023. All rights reserved.

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Safety Information
The following safety precautions must be observed during all phases of operation, such as usage, service
or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal
should notify users and operating personnel of the following safety information by incorporating these
guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers’ failure to
comply with these precautions.

Full attention must be paid to driving at all times in order to reduce the risk of an
accident. Using a mobile while driving (even with a handsfree kit) causes distraction
and can lead to an accident. Please comply with laws and regulations restricting the
use of wireless devices while driving.

Switch off the cellular terminal or mobile before boarding an aircraft. The operation
of wireless appliances in an aircraft is forbidden to prevent interference with
communication systems. If there is an Airplane Mode, it should be enabled prior to
boarding an aircraft. Please consult the airline staff for more restrictions on the use
of wireless devices on an aircraft.

Wireless devices may cause interference on sensitive medical equipment, so

please be aware of the restrictions on the use of wireless devices when in hospitals,
clinics or other healthcare facilities.

Cellular terminals or mobiles operating over radio signal and cellular network cannot
be guaranteed to connect in certain conditions, such as when the mobile bill is
unpaid or the (U)SIM card is invalid. When emergency help is needed in such
conditions, use emergency call if the device supports it. In order to make or receive
a call, the cellular terminal or mobile must be switched on in a service area with
adequate cellular signal strength. In an emergency, the device with emergency call
function cannot be used as the only contact method considering network connection
cannot be guaranteed under all circumstances.

The cellular terminal or mobile contains a transceiver. When it is ON, it receives and
transmits radio frequency signals. RF interference can occur if it is used close to TV
sets, radios, computers or other electric equipment.

In locations with explosive or potentially explosive atmospheres, obey all posted

signs and turn off wireless devices such as mobile phone or other cellular terminals.
Areas with explosive or potentially explosive atmospheres include fueling areas,
below decks on boats, fuel or chemical transfer or storage facilities, and areas
where the air contains chemicals or particles such as grain, dust or metal powders.

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About the Document

Revision History

Version Date Author Description

Lyndon LIU/
1.0 2017-08-04 Initial
Daryl DU
1. Modified GSM features in Table 2.
2. Added a note for e-I-DRX in Chapter 3.3.
1.1 2017-08-31 Daryl DU
3. Elaborated the description of e-I-DRX in Chapter 3.4.3.
4. Updated RF receiving sensitivity in Chapter 6.6.
1. Added the storage temperature of the module in Table 2
and Chapter 6.3.
2. Updated transmitting power values in Table 2.
3. Added the description of sleep mode in Table 5 and
Chapter 3.4.4.
4. Added the description of ADC interfaces in Chapter 3.16.
Lyndon LIU/
1.2 2017-12-22 5. Updated the GNSS performance in Table 21.
Daryl DU
6. Updated the peak supply current values in Table 28.
7. Updated the current consumption values in Chapter 6.4.
8. Updated RF output power values in Table 34.
9. Updated LTE Cat NB1 RF receiving sensitivity values
(without repetitions) in Table 35.
10. Updated the recommended footprint in Chapter 7.2.
1. Updated the USB interface reference design (Figure 15).
2. Added the description of GPIO interfaces (Chapter
3.17).
3. Updated GNSS performance parameters in Table 25.
Lyndon LIU/
4. Updated the GNSS antenna interface reference design
1.3 2018-07-18 Daryl DU/
(Figure 27).
Hyman DING
5. Updated GNSS current consumption parameters in
Table 35.
6. Updated the module’s baking temperature and baking
hours in Chapter 8.1.

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7. Updated the recommended reflow soldering thermal

profile and related parameters in Chapter 8.2.
1. Added B25 and the note thereof.
2. Updated supported internet protocols and USB serial
drivers in Table 2.
3. Updated functional diagram in Figure 1.
4. Enabled W_DISABLE# for airplane mode control in
Chapter 3.4.1.
5. Updated DC characteristics of PWRKEY (Table 4, Table
7).
6. Updated DC characteristics of RESET_N (Table 4, Table
8).
7. Updated the description of power supply reference
Lyndon LIU/ design in Chapter 3.5.2.
1.4 2019-08-15
Rex WANG 8. Updated power-on timing of the module in Figure 8.
9. Added ADC analog-input bandwidth and ADC sampling
rate in Table 22.
10. Updated the GPIO configuration command in Chapter
3.17.
11. Updated BG96 operating frequency in Table 27.
12. Updated GNSS frequency in Table 29.
13. Updated BG96 current consumption in Table 34.
14. Updated the recommended stencil thickness and the
peak reflow temperature in Chapter 8.2.
15. Updated packaging information of the module in Chapter
8.3.
1. Updated the dimensional tolerance from 0.15 mm to
0.20 mm.
2. Added the footnote description of B26.
3. Deleted the information of LTE HD-FDD B39.
4. Updated the information of USB serial drivers in Table
3.
5. Updated the trace width of VBAT_RF from “not less
than 2.0 mm” to “not less than 2.7 mm” in Chapter
Lex LI/ 3.5.2.
1.5 2022-08-19
Fly ZHU 6. Added the VoLTE description of PCM and I2C interface
in Chapter 3.12.
7. Updated the max. value of IVBAT from 2.0 A to 2.7 A in
Chapter 6.2.
8. Updated the information of power consumption in Table
33.
9. Updated the GNSS power consumption in Table 34.
10. Updated the information of Rx sensitivity in Table 36.
11. Updated the information of manufacturing and

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soldering; and added the note of ultrasonic soldering

cleaning and conformal coating in Chapter 8.2.
12. Added the note of package warpage level of the
module in Chapter 7.1.
1. Added the note for module turn-off procedure in
Chapter 3.7.
2. Updated the GNSS VSWR requirement from VSWR <
2 to VSWR ≤ 2 in Table 29.
1.6 2023-02-21 Lex LI
3. Updated the recommended thermal profile parameter in
Chapter 8.2.
4. Added the mounting direction subchapter in Chapter
8.3.

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Contents

Safety Information ...................................................................................................................................... 3

About the Document .................................................................................................................................. 4
Contents ...................................................................................................................................................... 7
Table Index .................................................................................................................................................. 9
Figure Index .............................................................................................................................................. 10

1 Introduction ....................................................................................................................................... 11

2 Product Overview ............................................................................................................................. 12

2.1. Frequency Bands and Functions ............................................................................................. 12
2.2. Key Features ............................................................................................................................ 13
2.3. Functional Diagram .................................................................................................................. 15
2.4. EVB Kit ..................................................................................................................................... 15

3 Application Interfaces ...................................................................................................................... 16

3.1. Pin Assignment ........................................................................................................................ 17
3.2. Pin Description ......................................................................................................................... 18
3.3. Operating Modes...................................................................................................................... 24
3.4. Power Saving ........................................................................................................................... 25
3.4.1. Airplane Mode ............................................................................................................... 25
3.4.2. Power Saving Mode (PSM) ........................................................................................... 25
3.4.3. Extended Idle Mode DRX (e-I-DRX) ............................................................................. 26
3.4.4. Sleep Mode ................................................................................................................... 26
3.4.4.1. UART Application Scenario ................................................................................ 26
3.5. Power Supply ........................................................................................................................... 27
3.5.1. Power Supply Pins ........................................................................................................ 27
3.5.2. Voltage Stability Requirements ..................................................................................... 28
3.5.3. Power Supply Voltage Monitoring ................................................................................. 29
3.6. Turn On .................................................................................................................................... 29
3.6.1. Turn On with PWRKEY ................................................................................................. 29
3.7. Turn Off .................................................................................................................................... 31
3.7.1. Turn Off with PWRKEY ................................................................................................. 31
3.7.2. Turn Off with AT Command ........................................................................................... 31
3.8. Reset ........................................................................................................................................ 32
3.9. (U)SIM Interface ....................................................................................................................... 33
3.10. USB Interface ........................................................................................................................... 35
3.11. UART Interfaces ....................................................................................................................... 37
3.12. PCM and I2C Interfaces........................................................................................................... 39
3.13. Indication Signals ..................................................................................................................... 40
3.13.1. Network Status Indication ............................................................................................. 40
3.13.2. STATUS ......................................................................................................................... 41
3.13.3. RI ................................................................................................................................... 42
3.14. USB_BOOT Interface............................................................................................................... 43

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3.15. ADC Interfaces ......................................................................................................................... 43

3.16. GPIO Interfaces ....................................................................................................................... 44

4 GNSS Receiver .................................................................................................................................. 46

4.1. General Description ................................................................................................................. 46
4.2. GNSS Performance ................................................................................................................. 46
4.3. Layout Guidelines .................................................................................................................... 47

5 Antenna Interfaces............................................................................................................................ 48
5.1. Main Antenna Interface ............................................................................................................ 48
5.1.1. Pin Definition ................................................................................................................. 48
5.1.2. Operating Frequency .................................................................................................... 48
5.1.3. Reference Design ......................................................................................................... 49
5.2. GNSS Antenna Interface.......................................................................................................... 50
5.3. RF Routing Guidelines ............................................................................................................. 51
5.4. Antenna Design Requirements ................................................................................................ 53
5.5. RF Connector Recommendation ............................................................................................. 54

6 Reliability, Radio and Electrical Characteristics ........................................................................... 56

6.1. Absolute Maximum Ratings ..................................................................................................... 56
6.2. Power Supply Ratings .............................................................................................................. 56
6.3. Operating and Storage Temperatures ..................................................................................... 57
6.4. Power Consumption ................................................................................................................. 57
6.5. Tx Power .................................................................................................................................. 61
6.6. Rx Sensitivity............................................................................................................................ 62
6.7. ESD Protection......................................................................................................................... 63

7 Mechanical Information .................................................................................................................... 64

7.1. Mechanical Dimensions ........................................................................................................... 64
7.2. Recommended Footprint ......................................................................................................... 66
7.3. Top and Bottom Views ............................................................................................................. 67

8 Storage, Manufacturing and Packaging ......................................................................................... 68

8.1. Storage Conditions................................................................................................................... 68
8.2. Manufacturing and Soldering ................................................................................................... 69
8.3. Packaging Specifications ......................................................................................................... 70
8.3.1. Carrier Tape................................................................................................................... 71
8.3.2. Plastic Reel ................................................................................................................... 71
8.3.3. Mounting Direction ........................................................................................................ 72
8.3.4. Packaging Process ....................................................................................................... 72

9 Appendix References ....................................................................................................................... 74

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Table Index

Table 1: Frequency Bands and Functions of BG96 Module ...................................................................... 12

Table 2: Key Features of BG96 Module ..................................................................................................... 13
Table 3: Definition of I/O Parameters ......................................................................................................... 18
Table 4: Pin Description ............................................................................................................................. 18
Table 5: Overview of Operating Modes ...................................................................................................... 24
Table 6: VBAT and GND Pins .................................................................................................................... 27
Table 7: Pin Definition of PWRKEY............................................................................................................ 29
Table 8: RESET_N Pin Description............................................................................................................ 32
Table 9: Pin Definition of (U)SIM Interface ................................................................................................. 33
Table 10: Pin Definition of USB Interface ................................................................................................... 35
Table 11: Pin Definition of UART1 Interface............................................................................................... 37
Table 12: Pin Definition of UART2 Interface .............................................................................................. 38
Table 13: Pin Definition of UART3 Interface .............................................................................................. 38
Table 14: Pin Definition of PCM and I2C Interfaces .................................................................................. 39
Table 15: Pin Definition of NETLIGHT ....................................................................................................... 41
Table 16: Working State of NETLIGHT ...................................................................................................... 41
Table 17: Pin Definition of STATUS............................................................................................................ 42
Table 18: Default Behaviors of RI .............................................................................................................. 42
Table 19: Pin Definition of USB_BOOT Interface ...................................................................................... 43
Table 20: Pin Definition of ADC Interfaces ................................................................................................. 44
Table 21: Characteristics of ADC Interfaces .............................................................................................. 44
Table 22: Pin Definition of GPIO Interfaces ............................................................................................... 45
Table 23: GNSS Performance .................................................................................................................... 46
Table 24: Pin Definition of Main Antenna Interface .................................................................................... 48
Table 25: BG96 Operating Frequency ....................................................................................................... 48
Table 26: Pin Definition of GNSS Antenna Interface ................................................................................. 50
Table 27: GNSS Frequency ....................................................................................................................... 50
Table 28: Antenna Design Requirements .................................................................................................. 53
Table 29: Absolute Maximum Ratings ........................................................................................................ 56
Table 30: Power Supply Ratings ................................................................................................................ 56
Table 31: Operating and Storage Temperatures ........................................................................................ 57
Table 32: BG96 Power Consumption ......................................................................................................... 57
Table 33: GNSS Power Consumption ........................................................................................................ 61
Table 34: BG96 RF Output Power ............................................................................................................. 61
Table 35: BG96 Conducted RF Receiving Sensitivity ................................................................................ 62
Table 36: Electrostatic Discharge Characteristics (25 ºC, 45 % Relative Humidity) ................................. 63
Table 37: Recommended Thermal Profile Parameters .............................................................................. 70
Table 38: Carrier Tape Dimension Table (Unit: mm) .................................................................................. 71
Table 39: Plastic Reel Dimension Table (Unit: mm) ................................................................................... 72
Table 40: Related Documents .................................................................................................................... 74
Table 41: Terms and Abbreviations ............................................................................................................ 74

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Figure Index

Figure 1: Functional Diagram ..................................................................................................................... 15

Figure 2: Pin Assignment (Top View) ......................................................................................................... 17
Figure 3: Sleep Mode Application via UART .............................................................................................. 27
Figure 4: Power Supply Limits During Burst Transmission........................................................................ 28
Figure 5: Star Structure of the Power Supply ............................................................................................ 28
Figure 6: Turn On the Module Using Driving Circuit .................................................................................. 29
Figure 7: Turn On the Module with a Button .............................................................................................. 30
Figure 8: Power-up Timing ......................................................................................................................... 30
Figure 9: Power-down Timing .................................................................................................................... 31
Figure 10: Reference Circuit of RESET_N with a Driving Circuit .............................................................. 32
Figure 11: Reference Circuit of RESET_N by Using Button ...................................................................... 32
Figure 12: Reset Timing ............................................................................................................................. 33
Figure 13: Reference Design of (U)SIM Interface with an 8-Pin (U)SIM Card Connector ........................ 34
Figure 14: Reference Design of (U)SIM Interface with a 6-Pin (U)SIM Card Connector .......................... 34
Figure 15: Reference Circuit of USB Interface .......................................................................................... 36
Figure 16: Reference Design with Translator Chip .................................................................................... 38
Figure 17: Reference Design with Transistor Circuit ................................................................................. 39
Figure 18: Reference Design of PCM Application with Audio Codec ........................................................ 40
Figure 19: Reference Design of NETLIGHT .............................................................................................. 41
Figure 20: Reference Design of STATUS .................................................................................................. 42
Figure 21: Reference Circuit of USB_BOOT Interface .............................................................................. 43
Figure 22: Reference Design of Main Antenna Interface........................................................................... 49
Figure 23: Reference Design of GNSS Antenna Interface ........................................................................ 50
Figure 24: Microstrip Design on a 2-layer PCB ......................................................................................... 51
Figure 25: Coplanar Waveguide Design on a 2-layer PCB ....................................................................... 51
Figure 26: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) .................... 52
Figure 27: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) .................... 52
Figure 28: Dimensions of the Receptacle (Unit: mm) ................................................................................ 54
Figure 29: Specifications of Mated Plugs .................................................................................................. 54
Figure 30: Space Factor of Mated Connectors (Unit: mm) ........................................................................ 55
Figure 31: Module Top and Side Dimensions ............................................................................................ 64
Figure 32: Bottom Dimensions (Bottom View) ........................................................................................... 65
Figure 33: Recommended Footprint .......................................................................................................... 66
Figure 34: Top and Bottom Views of the Module ....................................................................................... 67
Figure 35: Recommended Reflow Soldering Thermal Profile ................................................................... 69
Figure 36: Carrier Tape Dimension Drawing .............................................................................................. 71
Figure 37: Plastic Reel Dimension Drawing .............................................................................................. 71
Figure 38: Mounting Direction .................................................................................................................... 72
Figure 39: Packaging Process ................................................................................................................... 73

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1 Introduction
The document defines BG96 module and describes its air interface and hardware interfaces which are
connected with your applications.

With this document, you can quickly understand module interface specifications, electrical and mechanical
details, as well as other related information of the module. The document, coupled with application notes
and user guides, makes it easy to design and set up mobile applications with the module.

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2 Product Overview

2.1. Frequency Bands and Functions

BG96 is an embedded IoT (LTE Cat M1/LTE Cat NB1/EGPRS) wireless communication module. It
provides data connectivity on LTE HD-FDD/GPRS/EGPRS networks, and supports half-duplex operation
in LTE networks. It also provides GNSS 1 and voice functionality 2 to meet your specific application
demands.

BG96 module is an industrial-grade module for industrial and commercial applications only.

The following table shows the frequency bands and functions of BG96 module.

Table 1: Frequency Bands and Functions of BG96 Module

LTE Bands EGPRS Rx-diversity GNSS 1

Cat M1 & NB1:

LTE HD-FDD: GSM850/EGSM900/ GPS, GLONASS,
-
B1/B2/B3/B4/B5/B8/B12/B13/ DCS1800/PCS1900 BDS, Galileo, QZSS
B18/B19/B20/B25 3/B26 4/B28

With a compact profile of 26.5 mm × 22.5 mm × 2.3 mm, BG96 can meet most requirements for M2M
applications such as smart metering, tracking system, security, wireless POS, etc.

BG96 is an SMD type module which can be embedded into applications through its 102 LGA pins. BG96
supports internet service protocols like TCP, UDP and PPP. Extended AT commands have been developed
for you to use these internet service protocols easily.

1
GNSS function is optional.
2 BG96 supports VoLTE (Voice over LTE) under LTE Cat M1 network.
3 LTE HD-FDD B25 is supported on BG96 of R1.2 hardware version.
4 LTE HD-FDD B26 is supported on BG96 of R1.1 hardware version (support Cat M1 B26 only).

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2.2. Key Features

The following table describes the detailed features of BG96 module.

Table 2: Key Features of BG96 Module

Features Details

⚫ Supply voltage: 3.3–4.3 V

Power Supply
⚫ Typical supply voltage: 3.8 V
⚫ Class 3 (23 dBm ±2 dB) for LTE HD-FDD bands
⚫ Class 4 (33 dBm ±2 dB) for GSM850
⚫ Class 4 (33 dBm ±2 dB) for EGSM900
⚫ Class 1 (30 dBm ±2 dB) for DCS1800
Transmitting Power ⚫ Class 1 (30 dBm ±2 dB) for PCS1900
⚫ Class E2 (27 dBm ±3 dB) for GSM850 8-PSK
⚫ Class E2 (27 dBm ±3 dB) for EGSM900 8-PSK
⚫ Class E2 (26 dBm ±3 dB) for DCS1800 8-PSK
⚫ Class E2 (26 dBm ±3 dB) for PCS1900 8-PSK
⚫ Support LTE Cat M1 and LTE Cat NB1
⚫ Support 1.4 MHz RF bandwidth for LTE Cat M1
⚫ Support 200 kHz RF bandwidth for LTE Cat NB1
LTE Features
⚫ Support SISO in DL direction
⚫ LTE Cat M1: Max. 375 kbps (DL)/ 375 kbps (UL)
⚫ LTE Cat NB1: Max. 32 kbps (DL)/ 70 kbps (UL)
GPRS:
⚫ Support GPRS multi-slot class 33 (33 by default)
⚫ Coding scheme: CS-1, CS-2, CS-3 and CS-4
⚫ Max. 107 kbps (DL)/85.6 kbps (UL)
EDGE:
GSM Features ⚫ Support EDGE multi-slot class 33 (33 by default)
⚫ Support GMSK and 8-PSK for different MCS (Modulation and Coding
Scheme)
⚫ Downlink coding schemes: MCS 1–9
⚫ Uplink coding schemes: MCS 1–9
⚫ Max. 296 kbps (DL)/236.8 kbps (UL)
⚫ Support PPP/TCP/UDP/SSL/TLS/FTP(S)/HTTP(S)/NITZ/PING/MQTT
Internet Protocol Features protocols
⚫ Support PAP and CHAP for PPP connections
⚫ Text and PDU mode
SMS ⚫ Point-to-point MO and MT
⚫ SMS cell broadcast

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⚫ SMS storage: ME by default

(U)SIM Interface Supports USIM/SIM card: 1.8/3.0 V

Audio Feature Supports one digital audio interface

⚫ Compliant with USB 2.0 specification (slave only) and the data transfer
rate can reach up to 480 Mbps
⚫ Used for AT command communication, data transmission, GNSS
USB Interface
NMEA messages output, software debugging and firmware upgrade
⚫ Support USB serial drivers for Windows 7/8/8.1/10/11, Linux 2.6–5.18,
Android 4.x–12.x
UART1:
⚫ Used for data transmission and AT command communication
⚫ Baud rates: 115200 bps by default
⚫ The default frame format is 8N1 (8 data bits, no parity, 1 stop bit)
⚫ Supports RTS and CTS hardware flow control
UART Interfaces UART2:
⚫ Used for debugging and log output
⚫ Baud rate: 115200 bps
UART3:
⚫ Used for outputting GNSS data or GNSS NMEA sentences
⚫ Baud rate: 115200 bps
⚫ 3GPP TS 27.007 and 3GPP TS 27.005 AT commands
AT Commands
⚫ Quectel enhanced AT commands

Network Indication One NETLIGHT pin for network connectivity status indication

⚫ Main antenna interface (ANT_MAIN)

Antenna Interfaces
⚫ GNSS antenna interface (ANT_GNSS)
⚫ Dimensions: (26.5 ±0.2) mm × (22.5 ±0.2) mm × (2.3 ±0.2) mm
Physical Characteristics
⚫ Weight: approx. 3.1 g
⚫ Operating temperature range: -35 °C to +75 °C 5

Temperature Range ⚫ Extended temperature range: -40 °C to +85 °C 6

⚫ Storage temperature range: -40 °C to +90 °C

Firmware Upgrade USB interface, DFOTA

RoHS All hardware components are fully compliant with EU RoHS directive

5 Within the operating temperature range, the module meets 3GPP specifications.
6
Within the extended temperature range, the module remains the ability to establish and maintain functions such as voice,
SMS, data transmission, emergency call, etc., without any unrecoverable malfunction. Radio spectrum and radio network
are not influenced, while one or more specifications, such as Pout, may exceed the specified tolerances of 3GPP. When the
temperature returns to the operating temperature range, the module meets 3GPP specifications again.

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2.3. Functional Diagram

The following figure shows a block diagram of BG96 and illustrates the major functional parts.

⚫ Power management
⚫ Baseband
⚫ DDR2 + NAND flash
⚫ Radio frequency
⚫ Peripheral interfaces

ANT_MAIN ANT_GNSS

SAW

PA PA LNA
VBAT_RF
(4G) (2G+ASM)

Tx Rx GNSS

NAND
Transceiver DDR2
SDRAM

VBAT_BB IQ Control

PWRKEY PMIC
Control
RESET_N

STATUS Baseband

NETLIGHT

ADCs 19.2M
XO

VDD_EXT USB (U)SIM PCM UARTs I2C GPIOs

Figure 1: Functional Diagram

2.4. EVB Kit

To help you develop applications conveniently with BG96, Quectel supplies an evaluation board
(UMTS&LTE EVB), USB to RS-232 converter cables, a USB data cable, antennas and other peripherals
to control or test the module. For more details, see document [1].

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3 Application Interfaces
BG96 is equipped with 102 LGA pins that can be connected to your cellular application platforms. The
following sub-chapters provide detailed description of interfaces listed below:

⚫ Power supply
⚫ (U)SIM interface
⚫ USB interface
⚫ UART interfaces
⚫ PCM and I2C interfaces
⚫ Indication signals
⚫ USB_BOOT interface
⚫ ADC interfaces
⚫ GPIO interfaces

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 LPWA Module Series

3.1. Pin Assignment

The following figure shows the pin assignment of BG96.

RESERVED
RESERVED

RESERVED
ANT_MAIN

VBAT_RF

VBAT_RF
GND

GND
GND

GND

GND

GND

GND
55
56
62
61
60
59
58

54
53
52
51
50
57
PSM_IND 1 49 ANT_GNSS
ADC1 2 48 GND
82 81 80 79
GND 3 47 USIM_GND

PCM_CLK 4 102 101 100 99 46 USIM_CLK

PCM_SYNC 5 45 USIM_DATA
63 83 98 78
PCM_IN 6 44 USIM_RST

PCM_OUT 7 GPIO64 64 84 97 77 43 USIM_VDD

USB_VBUS 8 42 USIM_PRESENCE

USB_DP 9 65 85 96 76 41 I2C_SDA

USB_DM 10 40 I2C_SCL
66 86 95 75 USB_BOOT
RESERVED 11 39 RI
67 87 94 74
RESERVED 12 38 DCD

RESERVED 13 68 88 93 73 37 RTS

RESERVED 14 36 CTS
89 90 91 92
PWRKEY 15 35 TXD

RESERVED 16 69 70 71 72
34 RXD

RESET_N 17 33 VBAT_BB

W_DISABLE# 18 32 VBAT_BB
24

25

27

29

31
19
20
21
22
23

26

28

30
DBG_RXD

DBG_TXD

RESERVED
ADC0
STATUS

UART3_RXD
NETLIGHT

UART3_TXD

GND
DTR
GPIO26
AP_READY

VDD_EXT

POWER USB UART (U)SIM PCM ANT GND RESERVED OTHERS

Figure 2: Pin Assignment (Top View)

NOTE

1. Keep all RESERVED pins and unused pins unconnected.

2. Connect GND to ground in the design.
3. PWRKEY output voltage is 0.8 V because of the diode drop inside the chipset.

BG96_Hardware_Design 17 / 78
 LPWA Module Series

3.2. Pin Description

The following tables show the pin definition and description of BG96.

Table 3: Definition of I/O Parameters

Type Description

AI Analog Input

AIO Analog Input/Output

AO Analog Output

DI Digital Input

DIO Digital Input/Output

DO Digital Output

OD Open Drain

PI Power Input

PO Power Output

DC characteristics include power domain and rate current, etc.

Table 4: Pin Description

Power Supply

DC
Pin Name Pin No. I/O Description Comment
Characteristics
Power supply for the Vmax = 4.3 V
VBAT_BB 32, 33 PI module’s baseband Vmin = 3.3 V
part Vnom = 3.8 V
Vmax = 4.3 V
Power supply for the
VBAT_RF 52, 53 PI Vmin = 3.3 V
module’s RF part
Vnom = 3.8 V
Power supply for
Provide 1.8 V for Vnom = 1.8 V
VDD_EXT 29 PO external GPIO’s
external circuit IOmax = 50 mA
pull-up circuits.

BG96_Hardware_Design 18 / 78
 LPWA Module Series

If unused, keep
this pin open.

GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67–74, 79–82, 89–91, 100–102

Turn On/Off

DC
Pin Name Pin No. I/O Description Comment
Characteristics
The output
voltage is 0.8 V
Turn on/off the Vnom = 0.8 V
PWRKEY 15 DI because of the
module VILmax = 0.5 V
diode drop inside
the chipset.
VIHmax = 2.1 V
If unused, keep
RESET_N 17 DI Reset the module VIHmin = 1.3 V
this pin open.
VILmax = 0.5 V

Status Indication

DC
Pin Name Pin No. I/O Description Comment
Characteristics
Indicate the
PSM_IND 7 1 DO module’s power
saving mode
1.8 V power
Indicate the
VOLmax = 0.45 V domain.
STATUS 20 DO module’s operation
VOHmin = 1.35 V If unused, keep
status
these pins open.
Indicate the
NETLIGHT 21 DO module’s network
activity status

USB Interface

DC
Pin Name Pin No. I/O Description Comment
Characteristics
Vmax = 5.25 V
USB connection
USB_VBUS 8 AI Vmin = 3.0 V
detect
Vnom = 5.0 V
USB differential data Compliant with
USB_DP 9 AIO
(+) USB 2.0 standard
specification.
USB differential data Require
USB_DM 10 AIO
(-) differential
impedance of

7 When PSM is enabled and then reboot the module, the function of PSM_IND pin will be activated. This pin outputs a high
voltage level when the module is in full functionality mode, and outputs a low voltage level when the module enters PSM.

BG96_Hardware_Design 19 / 78
 LPWA Module Series

90 Ω.

(U)SIM Interface

DC
Pin Name Pin No. I/O Description Comment
Characteristics
VILmin = -0.3 V 1.8 V power
USIM_ (U)SIM card hot-plug VILmax = 0.6 V domain.
42 DI
PRESENCE detect VIHmin = 1.2 V If unused, keep
VIHmax = 2.0 V this pin open.
For 1.8 V (U)SIM:
Vmax = 1.9 V
Vmin = 1.7 V Either 1.8 V or
(U)SIM card power 3.0 V is supported
USIM_VDD 43 PO
supply For 3.0 V (U)SIM: by the module
Vmax = 3.05 V automatically.
Vmin = 2.7 V
IOmax = 50 mA
For 1.8 V (U)SIM:
VOLmax = 0.45 V
VOHmin = 1.35 V
USIM_RST 44 DO (U)SIM card reset
For 3.0 V (U)SIM:
VOLmax = 0.45 V
VOHmin = 2.55 V
For 1.8 V (U)SIM:
VILmax = 0.6 V
VIHmin = 1.2 V
VOLmax = 0.45 V
VOHmin = 1.35 V
USIM_DATA 45 DIO (U)SIM card data
For 3.0 V (U)SIM:
VILmax = 1.0 V
VIHmin = 1.95 V
VOLmax = 0.45 V
VOHmin = 2.55 V
For 1.8 V (U)SIM:
VOLmax = 0.45 V
VOHmin = 1.35 V
USIM_CLK 46 DO (U)SIM card clock
For 3.0 V (U)SIM:
VOLmax = 0.45 V
VOHmin = 2.55 V

BG96_Hardware_Design 20 / 78
 LPWA Module Series

Specified ground for

USIM_GND 47 -
(U)SIM card

UART1 Interface

DC
Pin Name Pin No. I/O Description Comment
Characteristics
VILmin = -0.3 V
Data terminal ready VILmax = 0.6 V
DTR 30 DI
(sleep mode control) VIHmin = 1.2 V
VIHmax = 2.0 V 1.8 V power
VILmin = -0.3 V domain.
VILmax = 0.6 V If unused, keep
RXD 34 DI Receive
VIHmin = 1.2 V these pins open.
VIHmax = 2.0 V
VOLmax = 0.45 V
TXD 35 DO Transmit
VOHmin = 1.35 V
Connect to DTE’s
DTE clear to send VOLmax = 0.45 V CTS.
CTS 36 DO
signal from DCE VOHmin = 1.35 V 1.8 V power
domain.
VILmin = -0.3 V Connect to DTE’s
DTE request to send VILmax = 0.6 V RTS.
RTS 37 DI
signal to DCE VIHmin = 1.2 V 1.8 V power
VIHmax = 2.0 V domain.

DCD 38 DO Data carrier detect 1.8 V power

VOLmax = 0.45 V domain.
VOHmin = 1.35 V If unused, keep
RI 39 DO Ring indication
them open.

UART2 Interface

DC
Pin Name Pin No. I/O Description Comment
Characteristics
VILmin = -0.3 V
Debug UART VILmax = 0.6 V 1.8 V power
DBG_RXD 22 DI
receive VIHmin = 1.2 V domain.
VIHmax = 2.0 V If unused, keep
Debug UART VOLmax = 0.45 V them open.
DBG_TXD 23 DO
transmit VOHmin = 1.35 V

UART3 Interface

DC
Pin Name Pin No. I/O Description Comment
Characteristics
VOLmax = 0.45 V 1.8 V power
UART3_TXD 27 DO UART3 transmit
VOHmin = 1.35 V domain.

BG96_Hardware_Design 21 / 78
 LPWA Module Series

VILmin = -0.3 V If unused, keep

VILmax = 0.6 V them open.
UART3_RXD 28 DI UART3 receive
VIHmin = 1.2 V
VIHmax = 2.0 V

PCM Interface

DC
Pin Name Pin No. I/O Description Comment
Characteristics
VOLmax = 0.45 V
PCM_CLK 4 DO PCM clock
VOHmin = 1.35 V
VOLmax = 0.45 V
PCM_SYNC 5 DO PCM frame sync
VOHmin = 1.35 V 1.8 V power
VILmin = -0.3 V domain.
VILmax = 0.6 V If unused, keep
PCM_IN 6 DI PCM data input these pins open.
VIHmin = 1.2 V
VIHmax = 2.0 V
VOLmax = 0.45 V
PCM_OUT 7 DO PCM data output
VOHmin = 1.35 V

I2C Interface

DC
Pin Name Pin No. I/O Description Comment
Characteristics
I2C serial clock (for External pull-up
I2C_SCL 40 OD
external codec) resistor is
required.
I2C serial data (for 1.8 V only.
I2C_SDA 41 OD
external codec) If unused, keep
them open.

Antenna Interfaces

DC
Pin Name Pin No. I/O Description Comment
Characteristics
Main antenna
ANT_MAIN 60 AIO 50 Ω impedance.
interface
50 Ω impedance.
GNSS antenna
ANT_GNSS 49 AI If unused, keep
interface
this pin open.

Other Interface Pins

DC
Pin Name Pin No. I/O Description Comment
Characteristics
VILmin = -0.3 V 1.8 V power
Airplane mode
W_DISABLE# 18 DI VILmax = 0.6 V domain.
control
VIHmin = 1.2 V Pull-up by default.

BG96_Hardware_Design 22 / 78
 LPWA Module Series

VIHmax = 2.0 V In low voltage

level, the module
will enter airplane
mode.
If unused, keep
this pin open.
Application
AP_READY 19 DI VILmin = -0.3 V
processor ready
VILmax = 0.6 V
Force the module
VIHmin = 1.2 V
USB_BOOT 75 DI into emergency
VIHmax = 2.0 V 1.8 V power
download mode
domain.
General-purpose VOLmax = 0.45 V
GPIO26 26 DIO If unused, keep
input/output VOHmin = 1.35 V
these pins open.
VILmin = -0.3 V
General-purpose VILmax = 0.6 V
GPIO64 64 DIO
input/output VIHmin = 1.2 V
VIHmax = 2.0 V

ADC Interfaces

DC
Pin Name Pin No. I/O Description Comment
Characteristics
General-purpose Voltage range:
ADC1 2 AI
ADC interface 0.3–1.8 V If unused, keep
General-purpose Voltage range: them open.
ADC0 24 AI
ADC interface 0.3–1.8 V

RESERVED Pins

Pin Name Pin No. Comment

Keep these pins

RESERVED 11–14, 16, 25, 51, 56, 57, 63, 65, 66, 76–78, 83–88, 92–99
open.

NOTE

Keep all RESERVED pins and unused pins unconnected.

BG96_Hardware_Design 23 / 78
 LPWA Module Series

3.3. Operating Modes

The table below briefly summarizes the various operating modes referred in the following chapters.

Table 5: Overview of Operating Modes

Mode Details

The module is connected to network. Its current consumption varies

Voice/Data
Full Functionality with the network setting and data transfer rate.
Mode The module remains registered on network, and is ready to send and
Idle
receive data. In this mode, the software is active.
The module and the network may negotiate over non-access stratum signaling the
Extended Idle
use of e-I-DRX for reducing power consumption, while being available for mobile
DRX Mode
terminating data and/or network originated procedures within a certain delay
(e-I-DRX)
dependent on the DRX cycle value.
AT+CFUN=4 or W_DISABLE# pin can set the module into airplane mode where the
Airplane Mode
RF function is invalid.
Minimum
AT+CFUN=0 can set the module into a minimum functionality mode without removing
Functionality
the power supply. In this case, both RF function and (U)SIM card are invalid.
Mode
The module remains the ability to receive paging message, SMS and TCP/UDP data
Sleep Mode from the network normally. In this mode, the current consumption is reduced to a low
level.
PSM is similar to power-off, but module remains registered on the network and there
Power Saving
is no need to re-attach or re-establish PDN connections. Its current consumption is
Mode (PSM)
reduced to a minimized level.
The module’s power supply is shut down by its power management unit. In this mode,
Power OFF
the software is inactive, the serial interfaces are inaccessible, while the operating
Mode
voltage (connected to VBAT_RF and VBAT_BB) remains applied.

NOTE

1. For more details about AT+CFUN, see document [2].

2. During e-I-DRX, it is recommended to use UART interface for data communication, as the use of
USB interface will increase power consumption.

BG96_Hardware_Design 24 / 78
 LPWA Module Series

3.4. Power Saving

3.4.1. Airplane Mode

When the module enters airplane mode, the RF function does not work and all AT commands correlative
with RF function will be inaccessible. This mode can be set via the following ways.

Hardware:

W_DISABLE# is pulled up by default. Driving it low will set the module to airplane mode.

Software:

AT+CFUN=<fun> provides choice of the functionality level, through specifying <fun> as 0, 1 or 4.

⚫ AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled.
⚫ AT+CFUN=1: Full functionality mode (by default).
⚫ AT+CFUN=4: Airplane mode. RF function is disabled.

NOTE

1. Airplane mode control via W_DISABLE# is disabled in firmware by default. It can be enabled by
AT+QCFG="airplanecontrol". For more details about the command, see document [3].
2. The execution of AT+CFUN will not affect GNSS function.

3.4.2. Power Saving Mode (PSM)

The module minimizes its power consumption through entering PSM. The mode is similar to power-off, but
the module remains registered on the network and there is no need to re-attach or re-establish PDN
connections. Therefore, the module in PSM cannot immediately respond to your requests.

When the module wants to use the PSM, it shall request an Active Time value during every Attach and
TAU procedures. If the network supports PSM and accepts that the module uses PSM, it will confirm the
usage of PSM by allocating an Active Time value to the module. If the module wants to change the Active
Time value, e.g. when the conditions are changed in the module, the module consequently requests the
value it wants in the TAU procedure.

If PSM is supported by the network, then it can be enabled via AT+CPSMS. See document [2] for details
about AT+CPSMS.

Either of the following methods will wake up the module from PSM:

⚫ Wake up the module by driving PWRKEY low.

⚫ When the TAU timer expires, the module wakes up from PSM automatically.

BG96_Hardware_Design 25 / 78
 LPWA Module Series

3.4.3. Extended Idle Mode DRX (e-I-DRX)

The module (UE) and the network may negotiate over non-access stratum signalling the use of e-I-DRX
for reducing its power consumption, while being available for mobile terminating data and/or network
originated procedures within a certain delay dependent on the DRX cycle value.

Applications that want to use e-I-DRX need to consider specific handling of mobile terminating services or
data transfers, and in particular they need to consider the delay tolerance of mobile terminated data.

In order to negotiate the use of e-I-DRX, the UE requests e-I-DRX parameters during attach procedure
and RAU/TAU procedure. The EPC may reject or accept the UE request for enabling e-I-DRX. In case the
EPC accepts e-I-DRX, the EPC based on operator policies and, if available, the e-I-DRX cycle length value
in the subscription data from the HSS, may also provide different values of the e-I-DRX parameters than
what was requested by the UE. If the EPC accepts the use of e-I-DRX, the UE applies e-I-DRX based on
the received e-I-DRX parameters. If the UE does not receive e-I-DRX parameters in the relevant accept
message because the EPC rejected its request or because the request was received by EPC not
supporting e-I-DRX, the UE shall apply its regular discontinuous reception.

If e-I-DRX is supported by the network, then it can be enabled by AT+CEDRXS=1. See document [2] for
details about AT+CEDRXS.

3.4.4. Sleep Mode

The module is able to reduce its current consumption to a lower value during the sleep mode. The following
sub-chapters describe the power saving procedure of the module.

3.4.4.1. UART Application Scenario

If the host communicates with the module via UART1 interface, the following preconditions can set the
module to sleep mode.

⚫ Execute AT+QSCLK=1 (see document [2]) to enable sleep mode.

⚫ Drive DTR high.

The following figure shows the connection between the module and the host.

BG96_Hardware_Design 26 / 78
 LPWA Module Series

Module Host
RXD TXD

TXD RXD

RI EINT

DTR GPIO

AP_READY GPIO

GND GND

Figure 3: Sleep Mode Application via UART

⚫ Driving the host DTR low will wake up the module.

⚫ When BG96 has a URC to report, RI will wake up the host. See Chapter 3.13.3 for details about RI
behavior.
⚫ AP_READY will detect the sleep state of the host (can be configured to high level or low level
detection). See document [3] for more details about AT+QCFG="apready".

3.5. Power Supply

3.5.1. Power Supply Pins

BG96 provides the following four VBAT pins for connection with an external power supply. There are two
separate voltage domains for VBAT.

⚫ Two VBAT_RF pins for module’s RF part.

⚫ Two VBAT_BB pins for module’s baseband part.

The following table shows the details of VBAT pins and ground pins.

Table 6: VBAT and GND Pins

Pin Name Pin No. Description Min. Typ. Max. Unit

VBAT_RF 52, 53 Power supply for the module’s RF part 3.3 3.8 4.3 V

Power supply for the module’s

VBAT_BB 32, 33 3.3 3.8 4.3 V
baseband part

GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67–74, 79–82, 89–91, 100–102

BG96_Hardware_Design 27 / 78
 LPWA Module Series

3.5.2. Voltage Stability Requirements

The power supply range of the module is from 3.3–4.3 V. Make sure that the input voltage will never drop
below 3.3 V. The following figure shows the voltage drop during burst transmission in 2G network. The
voltage drop will be less in LTE Cat M1 and LTE Cat NB1 networks.

Burst Burst
Transmission Transmission

Load (A)

Power
Supply (V)
Ripple
Drop

Figure 4: Power Supply Limits During Burst Transmission

To decrease voltage drop, a bypass capacitor of about 100 µF with low ESR should be used for VBAT_BB
and VBAT_RF respectively, and a multi-layer ceramic chip capacitor (MLCC) array should also be reserved
due to its low ESR. It is recommended to use three ceramic capacitors (100 nF, 33 pF, 10 pF) for composing
the MLCC array, and place these capacitors close to VBAT pins. The main power supply from an external
application has to be a single voltage source and can be expanded to two sub paths with star structure.
The width of VBAT_BB trace should be not less than 0.5 mm, and the width of VBAT_RF trace should not
be less than 2.7 mm. In principle, the longer the VBAT trace is, the wider it should be.

In addition, to get a stable power source, it is suggested to use a TVS with low leakage current and suitable
reverse stand-off voltage, and also it is recommended to place it as close to the VBAT pins as possible.
The following figure shows the star structure of the power supply.

VBAT

VBAT_RF

VBAT_BB
+ +
C1 C2 C3 C4 C5 C6 C7 C8
D1
TVS 33 pF 10 pF 100 μF
100 μF 100 nF 100 nF 33 pF 10 pF

Module

Figure 5: Star Structure of the Power Supply

BG96_Hardware_Design 28 / 78
 LPWA Module Series

3.5.3. Power Supply Voltage Monitoring

AT+CBC can be used to monitor the VBAT_BB voltage value. For more details, see document [2].

3.6. Turn On

3.6.1. Turn On with PWRKEY

The following table shows the pin definition of PWRKEY.

Table 7: Pin Definition of PWRKEY

Pin Name Pin No. Description DC Characteristics Comment

The output voltage is 0.8 V

Vnom = 0.8 V
PWRKEY 15 Turn on/off the module because of the diode drop
VILmax = 0.5 V
inside the chipset.

When the module is in power off mode, it can be turned on by driving PWRKEY low for at least 500 ms. It
is recommended to use an open drain/collector driver to control the PWRKEY. After STATUS pin outputs
a high voltage level, PWRKEY pin can be released.

A simple reference circuit is illustrated in the following figure.

PWRKEY

≥ 500 ms
4.7K
10 nF
Turn on pulse

47K

Figure 6: Turn On the Module Using Driving Circuit

Another way to control the PWRKEY is using a button directly. When pressing the button, electrostatic
strike may generate from the fingers. Therefore, a TVS component is indispensable to be placed nearby
the button for ESD protection. A reference circuit is shown in the following figure.

BG96_Hardware_Design 29 / 78
 LPWA Module Series

S1
PWRKEY

TVS

Close to S1

Figure 7: Turn On the Module with a Button

The power-up scenario is illustrated in the following figure.

NOTE 1

VBAT 500 ms

PWRKEY VIL 0.5 V

RESET_N
4.8 s

STATUS
(DO)

4.2 s

USB Inactive Active

4.9 s

URAT Inactive Active

Figure 8: Power-up Timing

NOTE

1. Make sure that VBAT is stable before pulling down PWRKEY pin, and keep the interval not less
than 30 ms.
2. PWRKEY is internally pulled up to an internal voltage inside the chipset, and its output voltage is
the internal voltage minus a diode drop in the chipset. After calculated in this way, the PWRKEY

BG96_Hardware_Design 30 / 78
 LPWA Module Series

output voltage is expected to be 0.8 V.

3.7. Turn Off

Either of the following methods can be used to turn off the module normally:

⚫ Turn off the module with PWRKEY.

⚫ Turn off the module using AT+QPOWD.

NOTE

To avoid corrupting the data in the internal flash, do not switch off the power supply when the module
is working. Only after the module is shut down with PWRKEY or AT command can the power supply be
cut off

3.7.1. Turn Off with PWRKEY

Drive PWRKEY low at least 650 ms and then release it, so that the module will execute power-down
procedure. The power-down scenario is illustrated in the following figure.

VBAT

≥ 650 ms ≥2s
PWRKEY

STATUS

Module Running Power-down procedure OFF

Status

Figure 9: Power-down Timing

3.7.2. Turn Off with AT Command

It is also a safe way to use AT+QPOWD to turn off the module, which is similar to turning off the module
via PWRKEY pin. See document [2] for details about AT+QPOWD.

BG96_Hardware_Design 31 / 78
 LPWA Module Series

3.8. Reset

The module can be reset by driving RESET_N low for 150–460 ms.

Table 8: RESET_N Pin Description

Pin Name Pin No. Description DC Characteristics Comment

VIHmax = 2.1 V
RESET_N 17 Reset the module VIHmin = 1.3 V If unused, keep this pin open.
VILmax = 0.5 V

The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button
can be used to control the RESET_N.

RESET_N

150–460 ms
4.7K

Reset pulse

47K

Figure 10: Reference Circuit of RESET_N with a Driving Circuit

S2
RESET_N

TVS

Close to S2

Figure 11: Reference Circuit of RESET_N by Using Button

BG96_Hardware_Design 32 / 78
 LPWA Module Series

The reset scenario is illustrated in the following figure.

VBAT
≤ 460 ms

≥ 150 ms
RESET_N
VIL ≤ 0.5 V

Module Running Resetting Restart

Status

Figure 12: Reset Timing

NOTE

1. Use RESET_N only when you fail to turn off the module with AT+QPOWD and PWRKEY.
2. Ensure that there is no large capacitance on PWRKEY and RESET_N pins.

3.9. (U)SIM Interface

The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Both 1.8 V and 3.0 V (U)SIM cards
are supported.

Table 9: Pin Definition of (U)SIM Interface

Pin Name Pin No. I/O Description Comment

USIM_ 1.8 V power domain.

42 DI (U)SIM card hot plug detect
PRESENCE If unused, keep this pin open.
Either 1.8 V or 3.0 V is supported
USIM_VDD 43 PO (U)SIM card power supply
by the module automatically.

USIM_RST 44 DO (U)SIM card reset

USIM_DATA 45 DIO (U)SIM card data

USIM_CLK 46 DO (U)SIM card clock

USIM_GND 47 - Specified ground for (U)SIM

BG96_Hardware_Design 33 / 78
 LPWA Module Series

card

BG96 supports (U)SIM card hot-plug via USIM_PRESENCE, and both high and low level detections are
supported. The function is disabled by default. See document [2] for more details about AT+QSIMDET.

The following figure shows a reference design of (U)SIM interface with an 8-pin (U)SIM card connector.

VDD_EXT USIM_VDD

51K 15K
USIM_GND 100 nF (U)SIM Card Connector

USIM_VDD
VCC GND
USIM_RST 0R
RST VPP
Module USIM_CLK
CLK IO
USIM_PRESENCE 0R
USIM_DATA 0R

GND
33 pF 33 pF 33 pF
TVS Array

GND GND

Figure 13: Reference Design of (U)SIM Interface with an 8-Pin (U)SIM Card Connector

If (U)SIM card detection function is not needed, keep USIM_PRESENCE unconnected. A reference circuit
for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure.

USIM_VDD

15K
USIM_GND 100 nF
(U)SIM Card Connector
USIM_VDD
VCC GND
USIM_RST 0R
RST VPP
Module USIM_CLK
CLK IO
0R
USIM_DATA 0R

33 pF 33 pF 33 pF

TVS Array

GND GND

Figure 14: Reference Design of (U)SIM Interface with a 6-Pin (U)SIM Card Connector

BG96_Hardware_Design 34 / 78
 LPWA Module Series

To enhance the reliability and availability of the (U)SIM card in applications, follow the criteria below in
(U)SIM circuit design:

⚫ Place the (U)SIM card connector as close to the module as possible. Keep the trace length less than
200 mm.
⚫ Keep (U)SIM card signals away from RF and power supply traces.
⚫ Assure the ground trace between the module and the (U)SIM card connector short and wide. Keep
the trace width of ground and USIM_VDD not less than 0.5 mm to maintain the same electric potential.
Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1 μF, and place it as
close to (U)SIM card connector as possible. If the system ground plane is complete, USIM_GND can
be connected to the system ground directly.
⚫ To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield
them with surrounded ground. USIM_RST should also be surrounded with ground.
⚫ To offer good ESD protection, it is recommended to add a TVS array with parasitic capacitance not
exceeding 15 pF. To facilitate debugging, it is recommended to reserve series resistors for the (U)SIM
signals of the module. The 33 pF capacitors are used for filtering interference of EGSM900. Note that
the (U)SIM peripheral circuit should be close to the (U)SIM card connector.
⚫ The pull-up resistor on USIM_DATA trace can improve anti-jamming capability when long layout trace
and sensitive occasion are applied, and should be placed close to the (U)SIM card connector.

3.10. USB Interface

The module contains one integrated Universal Serial Bus (USB) interface which complies with the USB
2.0 specification and supports high-speed (480 Mbps) and full-speed (12 Mbps) modes.

The USB interface is used for AT command communication, data transmission, GNSS NMEA sentences
output, software debugging and firmware upgrade.

The following table shows the pin definition of USB interface.

Table 10: Pin Definition of USB Interface

Pin Name Pin No. I/O Description Comment

USB_VBUS 8 AI USB connection detect Typ. 5.0 V

USB_DP 9 AIO USB differential data (+)

Require differential impedance of 90 Ω.
USB_DM 10 AIO USB differential data (-)

GND 3 Ground

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For more details about USB 2.0 specification, visit http://www.usb.org/home.

The USB interface is recommended to be reserved for firmware upgrade in your designs. The following
figure shows a reference circuit of USB interface.

Test Points
Minimize these stubs

Module MCU
R3 NM_0R
VDD R4 NM_0R

USB_VBUS ESD Array

L1 USB_DM
USB_DM
USB_DP USB_DP

Close to Module GND

GND

Figure 15: Reference Circuit of USB Interface

A common mode choke L1 is recommended to be added in series between the module and MCU to
suppress EMI spurious transmission. Meanwhile, the 0 Ω resistors (R3 and R4) should be added in series
between the module and the test points to facilitate debugging, and the resistors are not mounted by
default. To ensure the integrity of USB data trace signal, L1, R3 and R4 components must be placed close
to the module, and also these resistors should be placed close to each other. The extra stubs of trace must
be as short as possible.

To meet USB 2.0 specification, comply with the following principles while designing the USB interface.

⚫ It is important to route the USB signal traces as differential pairs with total grounding. The impedance
of USB differential trace is 90 Ω.
⚫ Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is
important to route the USB differential traces in inner-layer of the PCB, and surround the traces with
ground on that layer and with ground planes above and below.
⚫ Junction capacitance of the ESD protection component might cause influences on USB data traces,
so pay attention to the selection of the device. Typically, the stray capacitance should be less than
2 pF.
⚫ Keep the ESD protection components as close to the USB connector as possible.

NOTE

BG96 module can only be used as a slave device.

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3.11. UART Interfaces

The module serves as DCE (Data Communication Equipment), which is connected in the traditional DCE-
DTE (Data Terminal Equipment) mode.

The module provides three UART interfaces: UART1, UART2 and UART3 interfaces. The following are
their features.

⚫ UART1 interface supports 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200 bps, 230400 bps,
460800 bps and 921600 bps baud rates, and the default is 115200 bps. It is used for data transmission
and AT command communication.
⚫ UART2 interface supports 115200 bps baud rate, and it is used for debugging and log output.
⚫ UART3 interface supports 115200 bps baud rate, and it is used for outputting GNSS data and GNSS
NMEA sentences.

The following tables show the pin definition of the three UART interfaces.

Table 11: Pin Definition of UART1 Interface

Pin Name Pin No. I/O Description Comment

Data terminal ready

DTR 30 DI
(sleep mode control)

RXD 34 DI Receive 1.8 V power domain.

TXD 35 DO Transmit

DTE clear to send signal Connect to DTE’s CTS.

CTS 36 DO
from DCE 1.8 V power domain.
DTE request to send Connect to DTE's RTS.
RTS 37 DI
signal to DCE 1.8 V power domain.

DCD 38 DO Data carrier detect

1.8 V power domain.
RI 39 DO Ring indication

NOTE

AT+IPR can be used to set the baud rate of the UART interface, and AT+IFC can be used to set the
hardware flow control (hardware flow control is disabled by default). See document [2] for more details.

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Table 12: Pin Definition of UART2 Interface

Pin Name Pin No. I/O Description Comment

DBG_RXD 22 DI Debug UART receive 1.8 V power domain

DBG_TXD 23 DO Debug UART transmit 1.8 V power domain

Table 13: Pin Definition of UART3 Interface

Pin Name Pin No. I/O Description Comment

UART3_TXD 27 DO UART3 transmit 1.8 V power domain

UART3_RXD 28 DI UART3 receive 1.8 V power domain

The module provides 1.8 V UART interface. A voltage-level translator should be used if your application is
equipped with a 3.3 V UART interface. The voltage-level translator TXS0108EPWR provided by Texas
Instruments is recommended. The following figure shows a reference design.

VDD_EXT VCCA VCCB VDD_MCU

0.1 μF 0.1 μF
10K

120K
OE GND
RI A1 B1 RI_MCU
DCD A2 B2 DCD_MCU
CTS A3 Translator B3 CTS_MCU
RTS A4 B4 RTS_MCU
DTR A5 B5 DTR_MCU
TXD A6 B6 RXD_MCU
RXD A7 B7 TXD_MCU
51K 51K
A8 B8

Figure 16: Reference Design with Translator Chip

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Another example with transistor translation circuit is shown as below. For the design of circuits in dotted
lines, refer to that of circuits in solid lines, but pay attention to the direction of connection.

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4.7K
VDD_EXT VDD_EXT
1 nF
MCU/ARM Module
10K

TXD RXD
RXD TXD
1 nF
10K
VDD_EXT
VCC_MCU 4.7K
RTS RTS
CTS CTS
GPIO DTR
EINT RI
GPIO DCD
GND GND

Figure 17: Reference Design with Transistor Circuit

NOTE

1. Transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps.
2. The module's CTS is connected to the host's CTS, and the module's RTS is connected to the host's
RTS.

3.12. PCM and I2C Interfaces

BG96 provides one Pulse Code Modulation (PCM) digital interface and one I2C interface. The following
table shows the pin definition of the two interfaces which can be applied on audio codec design.

Table 14: Pin Definition of PCM and I2C Interfaces

Pin Name Pin No. I/O Description Comment

PCM_CLK 4 DO PCM clock

PCM_SYNC 5 DO PCM frame sync

1.8 V power domain.
If unused, keep these pins open.
PCM_IN 6 DI PCM data input

PCM_OUT 7 DO PCM data output

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I2C serial clock

I2C_SCL 40 OD External pull-up resistor is required.
(for external codec)
1.8 V only.
I2C serial data
I2C_SDA 41 OD If unused, keep them open.
(for external codec)

The following figure shows a reference design of PCM and I2C interfaces with an external codec IC.

MICBIAS

INP

BIAS
INN
PCM_CLK BCLK
PCM_SYNC WCLK
PCM_IN ADC
PCM_OUT DAC
LOUTP
I2C_SCL SCL
I2C_SDA SDA LOUTN
4.7K

4.7K

Module Codec

1.8 V

Figure 18: Reference Design of PCM Application with Audio Codec

NOTE

PCM and I2C interfaces support VoLTE only. For specific information about the software version of
VoLTE, please contact Quectel Technical Support ([email protected]).

3.13. Indication Signals

3.13.1. Network Status Indication

BG96 provides one network status indication pin: NETLIGHT. The pin is used to drive a network status
indication LED. The following tables describe the pin definition and logic level changes of NETLIGHT in
different network activity status.

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Table 15: Pin Definition of NETLIGHT

Pin Name Pin No. I/O Description Comment

NETLIGHT 21 DO Indicate the module’s network activity status 1.8 V power domain.

Table 16: Working State of NETLIGHT

Pin Name Logic Level Changes Network Status

Flicker slowly (200 ms High/1800 ms Low) Network searching

Flicker slowly (1800 ms High/200 ms Low) Idle

NETLIGHT
Flicker quickly (125 ms High/125 ms Low) Data transfer is ongoing

Always high Voice calling

A reference circuit is shown in the following figure.

VBAT

Module

2.2K

4.7K
NETLIGHT
47K

Figure 19: Reference Design of NETLIGHT

3.13.2. STATUS

The STATUS pin is used to indicate the operation status of the module. It will output high level when the
module is powered on.

The following table describes the pin definition of STATUS.

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 LPWA Module Series

Table 17: Pin Definition of STATUS

Pin Name Pin No. I/O Description Comment

STATUS 20 DO Indicate the module’s operation status 1.8 V power domain.

The following figure shows a reference circuit of STATUS.

VBAT
Module

2.2K

4.7K
STATUS
47K

Figure 20: Reference Design of STATUS

3.13.3. RI

AT+QCFG="risignaltype", "physical" can be used to configure RI behavior. No matter which port URC
is presented on, the URC will trigger the behavior of RI.

The default behaviors of RI are shown as below.

Table 18: Default Behaviors of RI

State Response

Idle RI keeps in high level.

URC RI outputs 120 ms low pulse when a new URC returns.

The default RI behaviors can be configured flexibly by AT+QCFG="urc/ri/ring". For more details, see
document [3].

NOTE

A URC can be outputted from UART port, USB AT port and USB modem port, through configuration via
AT+QURCCFG. The default port is USB AT port.

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3.14. USB_BOOT Interface

BG96 provides a USB_BOOT pin. During development or factory production, USB_BOOT can force the
module to boot from USB port for firmware upgrade.

Table 19: Pin Definition of USB_BOOT Interface

Pin Name Pin No. I/O Description Comment

1.8 V power domain.

Force the module into emergency
USB_BOOT 75 DI Active high.
download mode
If unused, keep it open.

The following figure shows a reference circuit of USB_BOOT interface.

Module

VDD_EXT
Test point 10K
USB_BOOT

TVS Close to test point

Figure 21: Reference Circuit of USB_BOOT Interface

NOTE

It is recommended to reserve the above circuit design during application design.

3.15. ADC Interfaces

The module provides two analog-to-digital converter (ADC) interfaces. AT+QADC=0 can be used to read
the voltage value on ADC0 pin. AT+QADC=1 can be used to read the voltage value on ADC1 pin. For
more details about these AT commands, see document [2].

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To improve the accuracy of ADC voltage values, the trace of ADC should be surrounded by ground.

Table 20: Pin Definition of ADC Interfaces

Pin Name Pin No. Description

ADC0 24 General-purpose ADC interface

ADC1 2 General-purpose ADC interface

The following table describes the characteristics of ADC interfaces.

Table 21: Characteristics of ADC Interfaces

Parameter Min. Typ. Max. Unit

ADC0 Voltage Range 0.3 - 1.8 V

ADC1 Voltage Range 0.3 - 1.8 V

ADC Resolution - - 15 bits

ADC Analog Bandwidth - 100 - kHz

ADC Sampling Rate - 2.4 - MHz

NOTE

1. ADC input voltage must not exceed 1.8 V.

2. It is prohibited to supply any voltage to ADC pins when VBAT is removed.
3. It is recommended to use resistor divider circuit for ADC application, and the divider resistor
accuracy should be not less than 1 %.

3.16. GPIO Interfaces

The module provides two general-purpose input and output (GPIO) interfaces. AT+QCFG="GPIO" can
be used to configure corresponding GPIO pin’s status. For more details about the AT command, see
document [3].

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Table 22: Pin Definition of GPIO Interfaces

Pin Name Pin No. Description

GPIO26 26 General purpose input/output

GPIO64 64 General purpose input/output

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4 GNSS Receiver

4.1. General Description

BG96 includes a fully integrated global navigation satellite system solution that supports GPS, GLONASS,
BDS, Galileo and QZSS.

The module supports standard NMEA 0183 protocol, and outputs NMEA sentences at 1 Hz data update
rate via USB interface by default.

By default, the GNSS engine is switched off. It has to be switched on via AT command. For more details
about GNSS engine technology and configurations, see document [4].

4.2. GNSS Performance

The following table shows the GNSS performance of BG96 module.

Table 23: GNSS Performance

Parameter Description Conditions Typ. Unit

Acquisition Autonomous -146 dBm

Sensitivity Reacquisition Autonomous -157 dBm

Tracking Autonomous -157 dBm

Autonomous 31 s
Cold start @ open sky
XTRA enabled 11.54 s
TTFF
Autonomous 21 s
Warm start @ open sky
XTRA enabled 2.52 s

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Autonomous 2.7 s
Hot start @ open sky
XTRA enabled 1.82 s

Accuracy CEP-50 Autonomous @ open sky 2.5 m

NOTE

1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep
positioning for at least 3 minutes continuously).
2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain
lock within 3 minutes after loss of lock.
3. Acquisition sensitivity: the minimum GNSS signal power at which the module can fix position
successfully within 3 minutes after executing cold start command.

4.3. Layout Guidelines

The following layout guidelines should be taken into account in customers’ designs.

⚫ Maximize the distance between the GNSS antenna and the main antenna.
⚫ Digital circuits such as (U)SIM card, USB interface, camera module, display connector and SD card
should be kept away from the antennas.
⚫ Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar
isolation and protection.
⚫ Keep 50 Ω characteristic impedance for the ANT_GNSS trace.

Refer to Chapter 5.2 for GNSS antenna reference design and antenna installation information.

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5 Antenna Interfaces
BG96 includes a main antenna interface and a GNSS antenna interface. The impedance of antenna ports
is 50 Ω.

5.1. Main Antenna Interface

5.1.1. Pin Definition

The pin definition of main antenna interface is shown below.

Table 24: Pin Definition of Main Antenna Interface

Pin Name Pin No. I/O Description Comment

ANT_MAIN 60 AIO Main antenna interface 50 Ω characteristic impedance

5.1.2. Operating Frequency

Table 25: BG96 Operating Frequency

3GPP Band Transmit Receive Unit

GSM850 824–849 869–894 MHz

EGSM900 880–915 925–960 MHz

DCS1800 1710–1785 1805–1880 MHz

PCS1900 1850–1910 1930–1990 MHz

LTE HD-FDD B1 1920–1980 2110–2170 MHz

LTE HD-FDD B2 1850–1910 1930–1990 MHz

LTE HD-FDD B3 1710–1785 1805–1880 MHz

LTE HD-FDD B4 1710–1755 2110–2155 MHz

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LTE HD-FDD B5 824–849 869–894 MHz

LTE HD-FDD B8 880–915 925–960 MHz

LTE HD-FDD B12 699–716 729–746 MHz

LTE HD-FDD B13 777–787 746–756 MHz

LTE HD-FDD B18 815–830 860–875 MHz

LTE HD-FDD B19 830–845 875–890 MHz

LTE HD-FDD B20 832–862 791–821 MHz

LTE HD-FDD B25 8

1850–1915 1930–1995 MHz

LTE HD-FDD B26 9

814–849 859–894 MHz

LTE HD-FDD B28 703–748 758–803 MHz

5.1.3. Reference Design

A reference design of main antenna interface is shown as below. It is recommended to reserve a π-type
matching circuit for better RF performance, and the π-type matching components (R1/C1/C2) should be
placed as close to the antenna as possible. The capacitors are not mounted by default.

Main
antenna

Module
R1 0R
ANT_MAIN

C1 C2

NM NM

Figure 22: Reference Design of Main Antenna Interface

8 LTE HD-FDD B25 is supported on BG96 of R1.2 hardware version.

9 LTE HD-FDD B26 is supported on BG96 of R1.1 hardware version (support Cat M1 B26 only).

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5.2. GNSS Antenna Interface

The following tables show the pin definition and frequency specification of GNSS antenna interface.

Table 26: Pin Definition of GNSS Antenna Interface

Pin Name Pin No. I/O Description Comment

ANT_GNSS 49 AI GNSS antenna interface 50 Ω impedance

Table 27: GNSS Frequency

Type Frequency Unit

GPS 1575.42 ±1.023 MHz

GLONASS 1597.5–1605.8 MHz

Galileo 1575.42 ±2.046 MHz

BDS 1561.098 ±2.046 MHz

QZSS 1575.42 ±1.023 MHz

A reference design of GNSS antenna interface is shown as below.

VDD

0.1 μF GNSS
10R
Antenna
Module

47nH

0R 100pF
ANT_GNSS

NM NM

Figure 23: Reference Design of GNSS Antenna Interface

BG96_Hardware_Design 50 / 78
 LPWA Module Series

NOTE

1. An external LDO can be selected to supply power according to the active antenna requirement.
2. If the module is designed with a passive antenna, then the VDD circuit is not needed.

5.3. RF Routing Guidelines

For user’s PCB, the characteristic impedance of all RF traces should be controlled to 50 Ω. The impedance
of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant, height from
the reference ground to the signal layer (H), and the clearance between RF traces and grounds (S).
Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The
following are reference designs of microstrip or coplanar waveguide with different PCB structures.

Figure 24: Microstrip Design on a 2-layer PCB

Figure 25: Coplanar Waveguide Design on a 2-layer PCB

BG96_Hardware_Design 51 / 78
 LPWA Module Series

Figure 26: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground)

Figure 27: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground)

To ensure RF performance and reliability, the following principles should be complied with in RF layout
design:

⚫ Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to
50 Ω.
⚫ The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully
connected to ground.
⚫ The distance between the RF pins and the RF connector should be as short as possible, and all the
right-angle traces should be changed to curved ones.
⚫ There should be clearance under the signal pin of the antenna connector or solder joint.
⚫ The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around
RF traces and the reference ground could help to improve RF performance. The distance between
the ground vias and the RF traces should be not less than two times as wide as the RF signal traces
(2 × W).
⚫ Keep RF traces away from interference sources, and avoid intersection and paralleling between traces
on adjacent layers.

For more details about RF layout, see document [5].

BG96_Hardware_Design 52 / 78
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5.4. Antenna Design Requirements

The following table shows the requirements on main antenna and GNSS antenna.

Table 28: Antenna Design Requirements

Antenna Type Requirements

Frequency range: 1559–1609 MHz

Polarization: RHCP or linear
VSWR: ≤ 2 (Typ.)

For passive antenna usage:

GNSS 10
Passive antenna gain: > 0 dBi

For active antenna usage:

Passive antenna gain: > 0 dBi
Active antenna noise figure: < 1.5 dB (Typ.)
Active antenna embedded LNA gain: < 17 dB (Typ.)
VSWR: ≤ 2
Efficiency: > 30 %
Max Input Power: 50 W
LTE/EGPRS Input Impedance: 50 Ω
Cable Insertion Loss:
< 1 dB: LB (<1 GHz)
< 1.5 dB: MB (1–2.3 GHz)

10It is recommended to use a passive GNSS antenna when LTE B13 is supported, as the use of active antenna may
generate harmonics which will affect the GNSS performance.

BG96_Hardware_Design 53 / 78
 LPWA Module Series

5.5. RF Connector Recommendation

If RF connector is used for antenna connection, it is recommended to use the U.FL-R-SMT connector
provided by Hirose.

Figure 28: Dimensions of the Receptacle (Unit: mm)

U.FL-LP serial mated plugs listed in the following figure can be used to match the U.FL-R-SMT.

Figure 29: Specifications of Mated Plugs

BG96_Hardware_Design 54 / 78
 LPWA Module Series

The following figure describes the space factor of mated connectors.

Figure 30: Space Factor of Mated Connectors (Unit: mm)

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 LPWA Module Series

6 Reliability, Radio and Electrical

Characteristics

6.1. Absolute Maximum Ratings

Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed
in the following table.

Table 29: Absolute Maximum Ratings

Parameter Min. Max. Unit

VBAT_BB -0.5 6 V

VBAT_RF -1.2 6 V

USB_VBUS -0.3 5.5 V

Voltage at Digital Pins -0.3 2.3 V

6.2. Power Supply Ratings

Table 30: Power Supply Ratings

Parameter Description Conditions Min. Typ. Max. Unit

The actual input voltages

VBAT_BB and must be kept between the
VBAT 3.3 3.8 4.3 V
VBAT_RF minimum and maximum
values.

IVBAT Peak supply current Maximum power control level - 1.8 2.7 A

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 LPWA Module Series

USB connection
USB_VBUS - 3.0 5.0 5.25 V
detect

6.3. Operating and Storage Temperatures

The operating and storage temperatures of the module are listed in the following table.

Table 31: Operating and Storage Temperatures

Parameter Min. Typ. Max. Unit

Operating Temperature Range 11 -35 +25 +75 ºC

Extended Temperature Range 12 -40 - +85 ºC

Storage Temperature Range -40 - +90 ºC

6.4. Power Consumption

The following table shows power consumption of BG96 module.

Table 32: BG96 Power Consumption

Description Conditions Avg. 13

Unit

Leakage Power-off @ USB/UART disconnected 6.8 μA

PSM PSM @ USB/UART disconnected 8.85 μA

Rock Bottom 14
AT+CFUN=0 @ Sleep mode 0.8 mA

Sleep Mode LTE Cat M1 DRX = 1.28 s 1.54 mA

11 Within the operating temperature range, the module meets 3GPP specifications.
12 Within the extended temperature range, the module remains the ability to establish and maintain functions such as voice,
SMS, data transmission, emergency call, etc., without any unrecoverable malfunction. Radio spectrum and radio network
are not influenced, while one or more specifications, such as Pout, may exceed the specified tolerances of 3GPP. When the
temperature returns to the operating temperature range, the module meets 3GPP specifications again.
13 “Avg.” value means the average current consumption value.
14 “Rock Bottom” of sleep mode means the operation is performed with AT+CFUN=0 and AT+QSLCK=1 (DTR pin at high

level).

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(USB disconnected) LTE Cat NB1 DRX = 1.28 s 2.03 mA

LTE Cat M1
1.0 mA
e-I-DRX = 40.96 s, PTW = 10.24 s
LTE Cat NB1
1.05 mA
e-I-DRX = 40.96 s, PTW = 10.24 s
LTE Cat M1 DRX = 1.28 s 17.6 mA

LTE Cat NB1 DRX = 1.28 s 17.91 mA

Idle State
LTE Cat M1
(USB disconnected) 17.21 mA
e-I-DRX = 40.96 s, PTW = 10.24 s
LTE Cat NB1
17.54 mA
e-I-DRX = 40.96 s, PTW = 10.24 s
LTE HD-FDD B1 @ 22.97 dBm 253.64 mA

LTE HD-FDD B2 @ 23.02 dBm 244.14 mA

LTE HD-FDD B3 @ 23.05 dBm 228.21 mA

LTE HD-FDD B4 @ 23.13 dBm 205.93 mA

LTE HD-FDD B5 @ 22.94 dBm 224.73 mA

LTE HD-FDD B8 @ 22.65 dBm 236.46 mA

LTE Cat M1 Data LTE HD-FDD B12 @ 22.64 dBm 226.45 mA

Transfer
(GNSS OFF) LTE HD-FDD B13 @ 22.88 dBm 246.23 mA

LTE HD-FDD B18 @ 22.99 dBm 22.99 mA

LTE HD-FDD B19 @ 22.74 dBm 224.69 mA

LTE HD-FDD B20 @ 23.45 dBm 261.92 mA

LTE HD-FDD B25 @ 23.31 dBm 210.11 mA

LTE HD-FDD B26 @ 23.55 dBm 242.46 mA

LTE HD-FDD B28 @ 22.69 dBm 223.7 mA

LTE HD-FDD B1 @ 23.21 dBm 187.66 mA

LTE Cat NB1 Data LTE HD-FDD B2 @ 23.17 dBm 177.54 mA

Transfer
(GNSS OFF) LTE HD-FDD B3 @ 23.2 dBm 162.9 mA

LTE HD-FDD B4 @ 23.29 dBm 163.44 mA

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LTE HD-FDD B5 @ 23.09 dBm 192.92 mA

LTE HD-FDD B8 @ 23.01 dBm 176.91 mA

LTE HD-FDD B12 @ 22.65 dBm 168.43 mA

LTE HD-FDD B13 @ 22.66 dBm 184.54 mA

LTE HD-FDD B18 @ 23.03 dBm 194.86 mA

LTE HD-FDD B19 @ 23.1 dBm 193.09 mA

LTE HD-FDD B20 @ 23.08 dBm 194.06 mA

LTE HD-FDD B25 @ 22.82 dBm 166.71 mA

LTE HD-FDD B28 @ 22.95 dBm 158.72 mA

GSM850 4UL/1DL @ 30.22 dBm 600.67 mA

GSM850 3UL/2DL @ 31.43 dBm 519.74 mA

GSM850 2UL/3DL @ 32.46 dBm 391.13 mA

GSM850 1UL/4DL @ 32.65 dBm 225.93 mA

EGSM900 4UL/1DL @ 29.42 dBm 574.3 mA

EGSM900 3UL/2DL @ 30.7 dBm 481.01 mA

EGSM900 2UL/3DL @ 32.25 dBm 418.42 mA

GPRS Data Transfer EGSM900 1UL/4DL @ 32.53 dBm 234.19 mA

(GNSS OFF)
DCS1800 4UL/1DL @ 30.01 dBm 551.54 mA

DCS1800 3UL/2DL @ 29.67 dBm 401.73 mA

DCS1800 2UL/3DL @ 29.85 dBm 288.49 mA

DCS1800 1UL/4DL @ 30.02 dBm 175.51 mA

PCS1900 4UL/1DL @ 29.56 dBm 527.27 mA

PCS1900 3UL/2DL @ 29.68 dBm 409.72 mA

PCS1900 2UL/3DL @ 29.85 dBm 309.9 mA

PCS1900 1UL/4DL @ 30.11 dBm 180.15 mA

EDGE Data Transfer GSM850 4UL/1DL @ 25.94 dBm 394.86 mA

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(GNSS OFF) GSM850 3UL/2DL @ 26.16 dBm 318.38 mA

GSM850 2UL/3DL @ 26.4 dBm 233.13 mA

GSM850 1UL/4DL @ 26.7 dBm 147.14 mA

EGSM900 4UL/1DL @ 25.49 dBm 401.44 mA

EGSM900 3UL/2DL @ 25.72 dBm 323.34 mA

EGSM900 2UL/3DL @ 26.05 dBm 235.55 mA

EGSM900 1UL/4DL @ 26.35 dBm 148.71 mA

DCS1800 4UL/1DL @ 25.16 dBm 378.79 mA

DCS1800 3UL/2DL @ 25.21 dBm 304.75 mA

DCS1800 2UL/3DL @ 25.34 dBm 219.88 mA

DCS1800 1UL/4DL @ 25.54 dBm 135.9 mA

PCS1900 4UL/1DL @ 25.34 dBm 404.94 mA

PCS1900 3UL/2DL @ 25.48 dBm 315 mA

PCS1900 2UL/3DL @ 25.64 dBm 228.05 mA

PCS1900 1UL/4DL @ 25.79 dBm 144.53 mA

NOTE

Sleep mode with UART connected and USB disconnected. The module can enter sleep mode through
executing AT+QSCLK=1 via UART interface and then controlling the module’s DTR pin. For details,
see Chapter 3.4.4.

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Table 33: GNSS Power Consumption

Description Conditions Typ. Unit

Cold Start @ Instrument 36.13 mA

Warm Start @ Instrument 36.10 mA

Acquisition
(AT+CFUN=0)
Hot Start @ Instrument 36.19 mA

Lost State @ Instrument 36.62 mA

Instrument Environment @ Passive Antenna 13.36 mA

Tracking
Open Sky @ Real Network, Passive Antenna 36 mA
(AT+CFUN=0)
Open Sky @ Real Network, Active Antenna 35 mA

6.5. Tx Power

Table 34: BG96 RF Output Power

Frequency Bands Max. RF Output Power Min. RF Output Power

LTE HD-FDD
B1/B2/B3/B4/B5/B8/B12/B13/B18/B19/B20 23 dBm ±2 dB <-39 dBm
/B25 15/B26 16/B28

GSM850/EGSM900 (GPRS) 33 dBm ±2 dB 5 dBm ±5 dB

DCS1800/PCS1900 (GPRS) 30 dBm ±2 dB 0 dBm ±5 dB

GSM850/EGSM900 (EGPRS) 27 dBm ±3 dB 5 dBm ±5 dB

DCS1800/PCS1900 (EGPRS) 26 dBm ±3 dB 0 dBm ±5 dB

15 LTE HD-FDD B25 is supported on BG96 of R1.2 hardware version.

16 LTE HD-FDD B26 is supported on BG96 of R1.1 hardware version (support Cat M1 B26 only).

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6.6. Rx Sensitivity

Table 35: BG96 Conducted RF Receiving Sensitivity

Receiving Sensitivity (dBm)

Network Frequency Bands Primary Diversity
Cat M1/3GPP Cat NB1 17/3GPP

LTE HD-FDD B1 -107.0/-102.7 -112.5/-107.5

LTE HD-FDD B2 -106.7/-100.3 -112.5/-107.5

LTE HD-FDD B3 -106.8/-99.3 -113/-107.5

LTE HD-FDD B4 -106.9/-102.3 -112.5/-107.5

LTE HD-FDD B5 -107.0/-100.8 -114/-107.5

LTE HD-FDD B8 -107.3/-99.8 -113/-107.5

LTE HD-FDD B12 -107.7/-99.3 -113.5/-107.5

LTE Supported -
LTE HD-FDD B13 -106.5/-99.3 -112/-107.5

LTE HD-FDD B18 -107.5/-102.3 -113.5/-107.5

LTE HD-FDD B19 -107.1/-102.3 -114/-107.5

LTE HD-FDD B20 -107.2/-99.8 -114/-107.5

LTE HD-FDD B25 18

-106/-100.3 -112/-107.5

LTE HD-FDD B26 19

TBD/-100.3 TBD/-107.5

LTE HD-FDD B28 -107.2/-100.8 -113/-107.5

Receiving Sensitivity (dBm)

Coding
Network Frequency Bands Primary
Scheme
GPRS/EGPRS/3GPP

CS-2 -112/-103
GPRS GSM850/EGSM900 Supported
CS-4 -106/-100

17 LTE Cat NB1 receiving sensitivity without repetitions.

18 LTE HD-FDD B25 is supported on BG96 of R1.2 hardware version.
19 LTE HD-FDD B26 is supported on BG96 of R1.1 hardware version (support Cat M1 B26 only).

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CS-2 -115/-101
DCS1800/PCS1900 Supported
CS-4 -105/-98

MCS-5 -106/-98
GSM850/EGSM900 Supported
MCS-9 -95/-86
EGPRS
MCS-5 -105/-98
DCS1800/PCS1900 Supported
MCS-9 -95/-86

6.7. ESD Protection

Static electricity occurs naturally and it may damage the module. Therefore, applying proper ESD
countermeasures and handling methods is imperative. For example, wear anti-static gloves during the
development, production, assembly and testing of the module; add ESD protection components to the
ESD sensitive interfaces and points in the product design.

The following table shows the electrostatic discharge characteristics of BG96 module.

Table 36: Electrostatic Discharge Characteristics (25 ºC, 45 % Relative Humidity)

Tested Interfaces Contact Discharge Air Discharge Unit

VBAT, GND ±10 ±15 kV

Main/GNSS Antenna
±10 ±15 kV
Interfaces

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7 Mechanical Information
This chapter describes the mechanical dimensions of the module. All dimensions are measured in
millimeter (mm), and the dimensional tolerances are ±0.2 mm unless otherwise specified.

7.1. Mechanical Dimensions

22.50±0.2 2.3±0.2

Pin 1
26.50±0.2

Figure 31: Module Top and Side Dimensions

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Figure 32: Bottom Dimensions (Bottom View)

NOTE

The package warpage level of the module conforms to the JEITA ED-7306 standard.

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7.2. Recommended Footprint

Figure 33: Recommended Footprint

NOTE

1. Keep at least 3 mm between the module and other components on the motherboard to improve
soldering quality and maintenance convenience.
2. All RESERVED pins must be kept open.
3. For stencil design requirements of the module, see document [6].

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7.3. Top and Bottom Views

Figure 34: Top and Bottom Views of the Module

NOTE

Images above are for illustration purpose only and may differ from the actual module. For authentic
appearance and label, please refer to the module received from Quectel.

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8 Storage, Manufacturing and

Packaging

8.1. Storage Conditions

The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage
requirements are shown below.

1. Recommended Storage Condition: the temperature should be 23 ±5 °C and the relative humidity
should be 35–60 %.

2. Shelf life (in a vacuum-sealed packaging): 12 months in Recommended Storage Condition.

3. Floor life: 168 hours 20 in a factory where the temperature is 23 ±5 °C and relative humidity is below
60 %. After the vacuum-sealed packaging is removed, the module must be processed in reflow
soldering or other high-temperature operations within 168 hours. Otherwise, the module should be
stored in an environment where the relative humidity is less than 10 % (e.g., a dry cabinet).

4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under
the following circumstances:

⚫ The module is not stored in Recommended Storage Condition;

⚫ Violation of the third requirement mentioned above;
⚫ Vacuum-sealed packaging is broken, or the packaging has been removed for over 24 hours;
⚫ Before module repairing.

5. If needed, the pre-baking should follow the requirements below:

⚫ The module should be baked for 8 hours at 120 ±5 °C;

⚫ The module must be soldered to PCB within 24 hours after the baking, otherwise it should be
put in a dry environment such as in a dry cabinet.

20
This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. It is recommended to start
the solder reflow process within 24 hours after the package is removed if the temperature and moisture do not conform to,
or are not sure to conform to IPC/JEDEC J-STD-033. Do not unpack the modules in large quantities until they are ready for
soldering.

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NOTE

1. To avoid blistering, layer separation and other soldering issues, extended exposure of the module
to the air is forbidden.
2. Take out the module from the package and put it on high-temperature-resistant fixtures before
baking. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for the baking procedure.
3. Pay attention to ESD protection, such as wearing anti-static gloves, when touching the modules.

8.2. Manufacturing and Soldering

Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil
openings and then penetrate to the PCB. Apply proper force on the squeegee to produce a clean stencil
surface on a single pass. To guarantee module soldering quality, the thickness of stencil for the module is
recommended to be 0.13–0.15 mm. For more details, see document [6].

The recommended peak reflow temperature should be 235–246 ºC, with 246 ºC as the absolute maximum
reflow temperature. To avoid damage to the module caused by repeated heating, it is recommended that
the module should be mounted only after reflow soldering for the other side of PCB has been completed.
The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are
shown below. .

Temp. (°C)
Reflow Zone
Ramp-up slope: Cool-down slope:
0–3 °C/s C -3–0 °C/s
246
235
217
B D
200
Soak Zone

150 A

100
Ramp-to-soak slope:
0–3 °C/s

Figure 35: Recommended Reflow Soldering Thermal Profile

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Table 37: Recommended Thermal Profile Parameters

Factor Recommended Value

Soak Zone

Ramp-to-soak slope 0–3 °C/s

Soak time (between A and B: 150 °C and 200 °C) 70–120 s

Reflow Zone

Ramp-up slope 0–3 °C/s

Reflow time (D: over 217°C) 40–70 s

Max. temperature 235–246 °C

Cool-down slope -3–0 °C/s

Reflow Cycle

Max. reflow cycle 1

NOTE
1. The above profile parameter requirements are for the measured temperature of the solder joints. Both
the hottest and coldest spots of solder joints on the PCB should meet the above requirements.
2. If a conformal coating is necessary for the module, do NOT use any coating material that may
chemically react with the PCB or shielding cover, and prevent the coating material from flowing into
the module.
3. Avoid using ultrasonic technology for module cleaning since it can damage crystals inside the module.
4. Due to the complexity of the SMT process, please contact Quectel Technical Support in advance for
any situation that you are not sure about, or any process (e.g. selective soldering, ultrasonic soldering)
that is not mentioned in document [6].

8.3. Packaging Specifications

This chapter describes only the key parameters and process of packaging. All figures below are for
reference only. The appearance and structure of the packaging materials are subject to the actual delivery.

The module adopts carrier tape packaging and details are as follow:

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8.3.1. Carrier Tape

Dimension details are as follow:

Figure 36: Carrier Tape Dimension Drawing

Table 38: Carrier Tape Dimension Table (Unit: mm)

W P T A0 B0 K0 K1 F E

44 32 0.35 22.8 26.8 3.1 6.9 20.2 1.75

8.3.2. Plastic Reel

Figure 37: Plastic Reel Dimension Drawing

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Table 39: Plastic Reel Dimension Table (Unit: mm)

øD1 øD2 W

330 100 44.5

8.3.3. Mounting Direction

Figure 38: Mounting Direction

8.3.4. Packaging Process

Place the module into the carrier tape and use

the cover tape to cover it; then wind the heat-
sealed carrier tape to the plastic reel and use
the protective tape for protection. 1 plastic reel
can load 250 modules.

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Place the packaged plastic reel, 1 humidity

indicator card and 1 desiccant bag into a
vacuum bag, vacuumize it.

Place the vacuum-packed plastic reel into the

pizza box.

Put 4 packaged pizza boxes into 1 carton box

and seal it. 1 cartoon box can pack 1000
modules.

Figure 39: Packaging Process

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9 Appendix References

Table 40: Related Documents

Document Name

[1] Quectel_UMTS&LTE_EVB_User_Guide

[2] Quectel_BG96_AT_Commands_Manual

[3] Quectel_BG96_QCFG_AT_Commands_Manual

[4] Quectel_BG96_GNSS_AT_Commands_Manual

[5] Quectel_RF_Layout_Application_Note

[6] Quectel_Module_SMT_Application_Note

Table 41: Terms and Abbreviations

Abbreviation Description

8-PSK 8-Phase Shift Keying

ADC Analog-to-digital Converter

AMR Adaptive Multi-rate

ASM Antenna Switch Modules

bps Bits Per Second

CHAP Challenge Handshake Authentication Protocol

CS Coding Scheme

CTS Clear To Send

DCE Data Communications Equipment

DFOTA Delta Firmware Upgrade Over The Air

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DL Downlink

DRX Discontinuous Reception

DTE Data Terminal Equipment

DTR Data Terminal Ready

DTX Discontinuous Transmission

EDGE Enhanced Data Rates for GSM Evolution

e-I-DRX Extended Idle Mode Discontinuous Reception

EPC Evolved Packet Core

EGPRS Enhanced General Packet Radio Service

EMI Electromagnetic Interference

ESD Electrostatic Discharge

ESR Equivalent Series Resistance

FDD Frequency Division Duplex

FR Full Rate

FTP(S) File Transfer Protocol (Secure)

GLONASS Global Navigation Satellite System (Russia)

GMSK Gaussian Minimum Shift Keying

GNSS Global Navigation Satellite System

GPIO General-Purpose Input/Output

GPRS General Packet Radio Service

GPS Global Positioning System

GSM Global System for Mobile Communications

HSS Home Subscriber Server

HTTP(S) Hypertext Transfer Protocol

I/O Input/Output

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LED Light Emitting Diode

LDO Low-dropout Regulator

LGA Land Grid Array

LNA Low Noise Amplifier

LTE Long Term Evolution

MCS Modulation and Coding Scheme

MCU Microcontroller Unit

ME Mobile Equipment

MLCC Multi-layer Ceramic Chip Capacitor

MO Mobile Originated

MQTT Message Queuing Telemetry Transport

MS Mobile Station (GSM engine)

MSL Moisture Sensitivity Levels

MT Mobile Terminated

NITZ Network Identity and Time Zone

NMEA NMEA (National Marine Electronics Association) 0183 Interface Standard

PA Power Amplifier

PAP Password Authentication Protocol

PCB Printed Circuit Board

PCM Pulse Code Modulation

PDN Packet Data Network

PDU Protocol Data Unit

PING Packet Internet Groper

PMIC Power Management IC

PPP Point-to-Point Protocol

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PSM Power Saving Mode

QZSS Quasi-Zenith Satellite System

RF Radio Frequency

RHCP Right Hand Circularly Polarized

Rx Receive

SAW Surface Acoustic Wave

SISO Single Input Single Output

SMD Surface Mount Device

SMS Short Message Service

SSL Secure Sockets Layer

TAU Tracking Area Update

TCP Transmission Control Protocol

TDD Time Division Duplexing

TLS Transport Layer Security

TTFF Time to First Fix

TX Transmitting Direction

UART Universal Asynchronous Receiver/Transmitter

UDP User Datagram Protocol

UE User Equipment

UL Uplink

URC Unsolicited Result Code

USB Universal Serial Bus

(U)SIM (Universal) Subscriber Identity Module

Vmax Maximum Voltage

Vnom Nominal Voltage

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Vmin Minimum Voltage

VIHmax Maximum High-level Input Voltage

VIHmin Minimum High-level Input Voltage

VILmax Maximum Low-level Input Voltage

VILmin Minimum Low-level Input Voltage

VImax Absolute Maximum Input Voltage

VImin Absolute Minimum Input Voltage

VOHmax Maximum High-level Output Voltage

VOHmin Minimum High-level Output Voltage

VOLmax Maximum Low-level Output Voltage

VOLmin Minimum Low-level Output Voltage

VSWR Voltage Standing Wave Ratio

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