ASSIGNMENT -4 (Unit-4)

Course Digital Electronics (BOE 410)

SEM & Section CSE (DS)-IV Semester, Section- A, B

Date of Assignment 11/06/25

Date of Submission 16/06/25

1. Explain the difference between synchronous and asynchronous sequential circuits with
example. (AKTU- 2024-25 Odd Sem)

Difference Between Synchronous and Asynchronous Sequential Circuits

Feature Synchronous Sequential Circuits Asynchronous Sequential Circuits

Operates with a clock signal. All

Clock No clock signal is used. State changes
changes in state occur at discrete time
Signal occur immediately based on input changes.
intervals synchronized with the clock.

State transitions happen at regular State transitions can happen at any time,
Timing
intervals (triggered by clock edge). depending on input changes.

Easier to design, simulate, and test. More complex due to race conditions and
Complexity
More predictable behavior. hazards; harder to test and debug.

Slower due to dependence on clock

Speed Faster because there’s no clock delay.
cycles.

More reliable due to synchronized Less reliable due to possible instability and
Reliability
operation. glitches.

Asynchronous Counter (Ripple

Synchronous Counter: A binary
Counter): Flip-flops are triggered by the
Example counter using flip-flops triggered by a
output of the previous stage, not a common
common clock.
clock.
 Examples:
1. Synchronous Sequential Circuit Example:

• Binary Synchronous Counter: A 3-bit counter using D flip-flops where all flip-flops
share the same clock signal. On every clock pulse, the counter increments its value.

2. Asynchronous Sequential Circuit Example:

• Asynchronous Latch-Based Circuit: A set-reset (SR) latch changes output state as soon
as the inputs change, without waiting for a clock pulse.

2. What is the significance of state assignment? List the different techniques for state
assignment. (AKTU- 2024-25 Odd Sem)

Significance of State Assignment:

State assignment is the process of assigning unique binary codes to the symbolic states of a
finite state machine (FSM).

This step is crucial because digital circuits operate on binary data. The way states are assigned
binary values affects the complexity, speed, and cost of the resulting sequential circuit.

Importance:
• It allows conversion of a state diagram or state table into a logic circuit.
• A good assignment reduces the number of gates and simplifies logic expressions.
• It helps minimize hardware and improve circuit performance.
• Influences the design of next-state and output logic.

Techniques of State Assignment:

1. Binary Assignment
o States are assigned binary values in sequence (e.g., 00, 01, 10, 11).
o Simple but may lead to complex logic.
2. One-Hot Assignment
o One flip-flop per state; only one flip-flop is ‘1’ at any time.
o Easy implementation in FPGAs but uses more hardware.
3. Gray Code Assignment
o Consecutive states differ by only one bit.
o Minimizes errors due to bit changes and logic glitches.
3. Describe the process of state reduction and state assignment in sequential circuit design.
(AKTU 2023-24)

1. State Reduction
State reduction is the process of minimizing the number of states in a sequential circuit
without changing its external behavior (i.e., the input-output relationship).
Purpose:
• To simplify the design.
• To reduce hardware (fewer flip-flops and logic gates).
• To improve circuit speed and reduce cost.
Steps in State Reduction:
1. Obtain the state table (or state diagram) of the circuit.
2. Identify equivalent states — two states are equivalent if for every input, they produce:
o The same output.
o The same next state (or equivalent next states).
3. Merge equivalent states into one.
4. Create a reduced state table or diagram with fewer states.

2. State Assignment
Once states are reduced, the next step is state assignment, i.e., assigning binary codes to the
symbolic states so they can be implemented using flip-flops.
Purpose:
• Convert abstract states into binary for hardware implementation.
• Minimize logic complexity.
• Ensure proper transitions and avoid race conditions (especially in asynchronous circuits).

Example (Short):
Suppose a state machine has the following symbolic states:
A, B, C, D
• After state reduction, A and B are equivalent → only A, C, D remain.
• In state assignment:
o A = 00
o C = 01
o D = 10
These binary codes are then used to implement the logic circuit.

For Question 2 and 3, check link below:

[Link]
faXGCDVRJcZes7PlEeejtxJUcIA8Rt&index=102
4.

Solution explained in YouTube link: [Link]

5. Explain the term, Hazard. Define different types of Hazards along with detection and
reduction of Hazards

Explained in notes- Chapter 4: Section 4.4 with example.

Also, hazard is explained in YouTube link: [Link]

Hazards in Digital Circuits

A hazard is an unwanted fluctuation in the output of a digital circuit, occurring due to
differences in signal propagation delays. Hazards can cause temporary glitches in the output even
if the circuit is logically correct.
These glitches can be problematic in asynchronous circuits or high-speed synchronous systems,
as they may lead to incorrect system behavior.

Types of Hazards
1. Static Hazard:
 oOccurs when the output is expected to remain constant (static) after a change in
input, but temporarily changes due to delay mismatches.
o Types:
▪ Static-1 Hazard: The output momentarily drops to 0 when it should
remain 1.
▪ Static-0 Hazard: The output momentarily rises to 1 when it should
remain 0.
2. Dynamic Hazard:
o Occurs when the output toggles multiple times during a single input change.
o More likely in complex circuits with multiple propagation paths.

Detection of Hazards
1. Static Hazards:
o Use Karnaugh Maps (K-Maps) to identify adjacent 1s (for Static-1) or adjacent
0s (for Static-0) that are not covered by the same product/sum term.
2. Dynamic Hazards:
o Look for circuits with multiple propagation paths where an input change affects
multiple gates simultaneously.

Reduction of Hazards
1. Static Hazards:
o Add redundant logic to cover gaps in K-Maps.
o Example: Use additional minterms or maxterms to eliminate static glitches.
2. Dynamic Hazards:
o Minimize propagation paths with consistent delays.
o Avoid paths with significantly varying delays.

Applications of Hazard-Free Design

• Asynchronous Circuits: Prevent glitches that can disrupt state transitions.
• Synchronous Systems: Avoid unnecessary power consumption or erroneous clocked
outputs.
• Safety-Critical Systems: Ensures reliability in medical devices or aerospace systems.
6. What are Essential Hazards? (short question AKTU 2024–25 Odd Sem)
An essential hazard is a type of hazard that occurs in asynchronous sequential circuits due to
unequal delays in different signal paths, even if the circuit is free from static and dynamic hazards.

It arises when a single input change causes the circuit to go through an unintended or unstable
state, not because of logic design errors, but due to the physical delays in the feedback or signal
lines.

Explanation:
• Occurs only in asynchronous circuits.
• Even with proper logic design and hazard-free assignments, essential hazards may appear
if:
a. The feedback path is slower than the input path.
b. The circuit interprets old state feedback due to delay and goes to a wrong state.

7. Illustrate the working and applications of Asynchronous sequential circuits.

Explained in notes- Chapter 4: Section 4.2- Analysis Procedure

Also, Asynchronous sequential circuit is explained in YouTube link:
[Link]

Asynchronous Sequential Circuits

Asynchronous sequential circuits are digital circuits where the state transitions depend directly
on the input signals without a global clock to synchronize them. These circuits change their state
as soon as the input changes, resulting in faster response times compared to synchronous circuits.
Working of Asynchronous Sequential Circuits
1. Input Changes:
o Asynchronous circuits detect changes in input signals instantaneously, triggering
state transitions. The circuit doesn’t wait for a clock pulse.
2. State Transition:
o The circuit transitions between states based on a feedback mechanism using
latches or flip-flops.
o The output is often a function of both current inputs and feedback signals.
3. Feedback Loops:
o Unlike synchronous circuits, the use of feedback paths introduces the possibility
of hazards or glitches during transitions.
 4. Stable State:
o The circuit eventually settles into a stable state once inputs stabilize. Proper
design ensures the elimination of unstable oscillations.
5. Critical Considerations:
o Race conditions: Need careful design to ensure correct state transitions.
o Static/Dynamic Hazards: Can cause glitches; must be minimized using hazard-
free logic.
Applications of Asynchronous Sequential Circuits
1. Control Systems:
o Used in systems where immediate response to inputs is critical, such as elevators
or vending machines.
2. Event-Driven Systems:
o Systems like keyboards or telephone exchanges rely on asynchronous circuits to
detect keypresses or call signals without waiting for clock pulses.
3. Data Communication:
o Asynchronous circuits play a crucial role in handshaking protocols for serial data
transfer, ensuring reliable communication between devices with mismatched
speeds.
4. Low-Power Electronics:
o Lack of a clock reduces power consumption, making these circuits suitable for
battery-powered devices like sensors and IoT devices.
5. Embedded Systems:
o Frequently used in applications requiring minimal latency, such as robotics and
real-time processors.

Advantages
• Faster response due to clock independence.
• Efficient for systems requiring variable or irregular input timings.
Disadvantages
• Complex to design and prone to instability if not carefully implemented.
• More susceptible to hazards and race conditions compared to synchronous circuits.

8. What is Race-Free State Assignment? Why is it necessary in Asynchronous Sequential

Circuits? (AKTU 2024–25 Odd Sem)

Race-free state assignment is a technique used in asynchronous sequential circuits to assign

binary codes to states in such a way that no critical races occur during state transitions.
 A race condition happens when two or more binary variables change at the same time, and
the final state depends on which one changes first. If this leads to an incorrect state, it's called a
critical race.

A race-free assignment ensures that:

• Only one bit changes during a transition from one state to another.
• This avoids unpredictable behavior and ensures circuit stability.

Why is it Necessary in Asynchronous Sequential Circuits?

Asynchronous circuits do not use a clock; state transitions occur immediately in response to
input changes. Therefore:
1. Multiple bit changes at once can lead to unstable or wrong transitions.
2. Race-free assignment ensures predictable and safe transitions.
3. It improves the reliability and robustness of the circuit.
4. Prevents hazards and glitches during state changes.

Methods to Achieve Race-Free State Assignment:

• Adding intermediate states (using extra states to break multiple-bit transitions into
single-bit ones).
• Using Gray code (where only one bit changes between any two adjacent states).
• Shared-row or unique-row techniques in flow table design.

[Link]

9. Discuss the concept of race-free state assignment and how it is achieved.

(AKTU 2023–24 Odd Sem)

Race-free state assignment is a method used in asynchronous sequential circuits to ensure

that during any state transition, only one bit of the state changes at a time.
This prevents the occurrence of critical races that can cause the circuit to move to an incorrect
or unstable state.

In asynchronous circuits:

• There is no clock to synchronize changes.

• If two or more bits in a state change simultaneously, and if those changes don't occur at
exactly the same time (due to propagation delays), the circuit might pass through
undefined or unwanted states.
• This can cause logic errors, glitches, or system failure.
Several methods are used to ensure that only one bit changes during a state transition:

1. Gray Code Assignment

• Assign binary codes to states such that only one bit changes between any two adjacent
states.
• Helps prevent races since changes occur one bit at a time.

Example:
State Binary Code

A 00

B 01

C 11

D 10

2. Adding Intermediate States

If two states differ in more than one bit, introduce a temporary (intermediate) state that
allows the transition to occur in two steps, with one bit changing at each step.

3. Shared-Row or Unique-Row Techniques

• Used in flow table design.

• Modify the flow table so that transitions between states occur through codes that differ by
only one bit.

Suppose:

• State A = 00
• State B = 11

Transition from A → B changes both bits → possible race.

Solution: Add an intermediate state, e.g.,

 • State A = 00
• State X = 01
• State B = 11

Now, A → X → B (one-bit changes only in each step) → race-free.

[Link]

10. Differentiate Critical and Non Critical race with example.

Ans: Explained in notes- Chapter 4: Section 4.3

Related link: [Link]

11.

[Link]

12.

[Link]