MIS 6010: IT INFRASTRUCTURE
Assignment #2
Given on: 11th February 2025 Due: 23rd February 2025
Lecturer: Gerald Chege, PhD (gchege@[Link];
This Assignment has two Sections, namely, Sections I and II. Section I contains
sample questions for your practice while Section II contains work for submission
and assessment. Submit ALL the THREE Questions in Section II.
SECTION I – SAMPLE QUESTIONS FOR YOUR PRACTICE
Question #1
Execution time in a multiprocessor system can be split into computing time
for
the routines plus routing time spent sending data from one processor to
another.
Consider the execution time and routing time given in the following table. In
this
case, the routing time is an important component of the total time.
a) For each doubling of the number of processors, determine the ratio of
new to old computing time and the ratio of new to old routing time.
b) Find the computing time and routing time for a system with one
processor.
Hint: Pitfall - Improving an aspect of a computer and expecting a
proportional improvement in overall performance is subject to Amdahl’ s law
which states:
T affected
T improved = +T unaffected
improvement factor
Example: Multiply accounts for 80s out of a total of 100s computation time
How much improvement in multiply performance required to get 5× overall?
T improved = 100s/5 = 20s;
T affected = 80s;
T unaffected = 100s -80s
= 20s ;
Improvement factor = n;
Hence,
80
20= +20
n
Hence, can’t be done!
Question #2
For the following problems, the table holds MIPS assembly code fragments.
You will be asked to evaluate each of the code fragments, familiarizing you
with the different MIPS branch instructions.
i) For the loops written in MIPS assembly above, assume that the register $t1
is initialized to the value 15. What is the value in register $s2 assuming the
$s2 is initially zero?
ii) For each of the loops above, write the equivalent C code routine. Assume
that the registers $s1, $s2, $t1, and $t2 are integers A, B, i, and temp,
respectively.
iii) For the loops written in MIPS assembly above, assume that the register
$t1 is initialized to the value N. How many MIPS instructions are executed?
Question #3
Translate the following C code to MIPS. Assume that the variables f, g, h, i,
and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively.
Assume that the base address of the arrays A and B are in registers $s6 and
$s7, respectively. Assume that the elements of the arrays A and B are 4-byte
words:
B[8] = A[i] + A[j];
Question #4
a) Translate the following MIPS code to C. Assume that the variables f, g, h, i,
and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively.
Assume that the base address of the arrays A and B are in registers $s6 and
$s7, respectively.
addi $t0, $s6, 4
add $t1, $s6, $0
sw $t1, 0($t0)
lw $t0, 0($t0)
add $s0, $t1, $t0
b) For each MIPS instruction in Q4 above, show the value of the opcode (OP),
source register (RS), and target register (RT) fields. For the I-type
instructions, show the value of the immediate field, and for the R-type
instructions, show the value of the destination register (RD) field.
Question #5
In the following problems, the data table contains bits that represent the
opcode
of an instruction. You will be asked to interpret the bits as MIPS instructions
into
assembly code and determine what format of MIPS instruction the bits
represent.
a 0000 0010 0001 0000 1000 0000 0010 0000two
b 0000 0001 0100 1011 0100 1000 0010 0010two
i) For the binary entries above, what instruction do they represent?
ii) What type (I-type, R-type, J-type) instruction do the binary entries above
represent?
iii) If the binary entries above were data bits, what number would they
represent in hexadecimal?
SECTION II – WORK FOR SUBMISSION & ASSESSMENT
Question #1
A pitfall, related to the execution of programs in multiprocessor systems, is
expecting improvement in performance by improving only the execution
time of part of the routines. The following table shows the execution time of
five routines
of a program running on different numbers of processors (case (a) and case
(b)).
No.
i) Find the total execution time and by how much it is reduced if the time of
routines A, C, and E is improved by 20% for each case.
iii) How much is the total time reduced if routine B is improved by 15% for
each case?
iii) How much is the total time reduced if routine D is improved by 20% for
each case?
Question #2
For the MIPS assembly instructions below, what is the corresponding C
statement? Assume that the variables f, g, h, i, and j are assigned to
registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base
address of the arrays A and B are in registers $s6 and $s7, respectively.
Explain your reasoning.
sll $t0, $s0, 2
add $t0, $s6, $t0
sll $t1, $s1, 2
add $t1, $s7, $t1
lw $s0, 0($t0)
addi $t2, $t0, 4
lw $t0, 0($t2)
add $t0, $t0, $s0
sw $t0, 0($t1)
Question #3
The following table holds some C code for two problems (a & b). You will be
required to evaluate these C code statements in MIPS assembly code.
a) for (i=0; i < a; i++)
a +=b;
b) for (i=0; i < a; i++)
for (j=0; i<b; i++)
D[4*j] = i+j;
i) For the table above, translate the C code to MIPS assembly code for each
case. Assume that the values of a, b, i, and j are in registers $s0, $s1, $t0, and
$t1, respectively. Also, assume that register $s2 holds the base address of
the array D.
ii) How many MIPS instructions does it take to implement the C code for case
(b) [the nested loops]? If the variables a and b are initialized to 10 and 3 and
all elements of D are initially 0, what is the total number of MIPS instructions
that is executed to complete the loops in case (b)?
