ACHARYA INSTITUTE OF TECHNOLOGY

Soladevanahalli, Bengaluru – 560107

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING

Electronics Principles and Circuits

(BEC303)

KIRAN KUMAR T
Assistant Professor, Department of ECE
Acharya Institute of Technology
Soladevanahalli, Bengaluru – 560107

2024-25
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MODULE-3

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Linear OPAMP circuits

Linear opamp circuits uses negative feedback, the gain due to –ve feedback is called closed loop voltage
gain AV(CL). In linear opamp circuit the output is with in saturation voltage levels.

The examples of Linear opamp circuits are

1. Inverting Amplifier
2. Noninverting Amplifier
3. Summing Amplifier circuit
4. D to A converters
5. Differentiators, Integrators etc.

Inverting Amplifier
Following figure shows the inverting amplifier. It has negative feedback where part of the Vout
is connected to inverting input terminal

The Vin is applied to inverting terminal through R1 resistor, where as non inverting terminal is
connected to ground. Due to virtual ground concept the voltage at inverting terminal V2 = 0v.

From figure
𝑉𝑖𝑛−𝑉2 𝑉𝑖𝑛−0 𝑉𝑖𝑛
I1 = = =
𝑅1 𝑅1 𝑅1

𝑉2−𝑉𝑜𝑢𝑡 0−𝑉𝑜𝑢𝑡 −𝑉𝑜𝑢𝑡

I2 = = =
𝑅𝑓 𝑅𝑓 𝑅𝑓

At node A, I1 = I2

𝑉𝑖𝑛 −𝑉𝑜𝑢𝑡
Therefore =
𝑅1 𝑅𝑓

𝑉𝑜𝑢𝑡 −𝑅𝑓
Av(cl) = =
𝑉𝑖𝑛 𝑅1

Av(cl) is called closed loop voltage gain. The –ve sign indicates, the o/p voltage is out of phase
(180o) with input voltage

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Non Inverting Amplifier

The following figure shows the non inverting amplifier circuit. This circuit also uses negative
feedback. The input voltage Vin is applied to non inverting input terminal and inverting terminal
is grounded through R1 resistor.

Due to virtual ground concept the inverting terminal voltage is same ad non inverting terminal
voltage Vin.

From figure current I1 is given by

𝑉𝑖𝑛−0 𝑉𝑖𝑛
I1 = =
𝑅1 𝑅1
current I2 is given by

𝑉𝑜𝑢𝑡−𝑉𝑖𝑛
I2 =
𝑅𝑓

At node A, I1 = I2

𝑉𝑖𝑛 𝑉𝑜𝑢𝑡−𝑉𝑖𝑛
Therefore =
𝑅1 𝑅𝑓

(𝑉𝑜𝑢𝑡 − 𝑉𝑖𝑛)𝑅1 = 𝑉𝑖𝑛 𝑅𝑓

𝑉𝑜𝑢𝑡 𝑅1 − 𝑉𝑖𝑛 𝑅1 = 𝑉𝑖𝑛 𝑅𝑓

𝑉𝑜𝑢𝑡 𝑅1 = 𝑉𝑖𝑛 (𝑅𝑓 + 𝑅1)

𝑉𝑜𝑢𝑡 (𝑅𝑓+𝑅1) 𝑅𝑓
Av(cl) = = 𝑅1
= 1 + 𝑅1
𝑉𝑖𝑛

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1. The summing Amplifier circuit.

1.1 Inverting Summing Amplifier:
Summing Amplifier circuit are used to combine the 2 or more inputs into a single output.
Following Figure shows the inverting summing amplifier.

The output voltage Vout is given by

Vout = AV1 V1 + AV2 V2

Where AV1 = - Rf/ R1

AV2 = - Rf / R2

−𝑅𝑓 −𝑅𝑓
Therefore Vout = 𝑅1
𝑉1 + 𝑅2
𝑉2

If all resistor are same values ( Rf = R1 = R2 = R )

Vout = - (V1 + V2)

1.2 The Subtractor

The following figure shows the Subtrator . This circuit is combination of inverting amplifier with
gain = 1 and inverting summing circuit.

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The output of inverting amplifier is –V1, since the gain = 1. Now –V1 and V2 are two inputs of following
summer circuit. This circuit also has unity gain because of same R values. the output voltage will be

Vout = - ( -V1 + V2 )

Therefore Vout = V1 - V2

Thus the circuit works as subtractor.

1.3 Summing on both inputs

The following circuit shows the summing circuit of opamp where both inverting and non inverting
input terminals are fed with input voltages. V1 and V2 are applied to inverting input terminal and
V3 and V4 are applied to non inverting input terminal.

The Output voltage is given by

Using super position theorem, the voltage gain of individual input channels can be written as

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Example Problem

1. In Fig. R1 = 1 kΩ, R2 = 2 kΩ, R3 = 3 kΩ, R4 = 4 kΩ, R5 = 5 kΩ, and Rf = 1 kΩ. What is the voltage
gain of each channel?

2. In Fig. R1 = 1 kΩ, R2 = 2 kΩ, R3 = 3 kΩ, R4 = 4 kΩ, R5 = 5 kΩ, and Rf = 6 kΩ. What is the voltage
gain of each channel? What is the output voltage if v1 = 1 mV, v2 = 2 mV, v3 = 3 mV, and v4 = 4 mV?

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1.4 The Averager

Following figure shows is an averager. A circuit whose output equals the average of the input voltages.

Each input channel has a voltage gain of :

When all amplified outputs are added, we get an output that is the average of all input voltages.

2. D to A converter:

In digital electronics, a digital-to-analog (D/A) converter takes a binary represented value and converts it
into a voltage or current. This voltage or current will be proportional to the input binary value.

Two methods of D/A conversion are often used.

1. The binary-weighted D/A converter

2. The R/2R ladder D/A converter

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2.1 The binary-weighted D/A converter

Following figure shows the binary-weighted D/A converter. The circuit is same as summing
amplifier and produces an output voltage equal to the weighted sum of the inputs. The weight is same as
the gain of the channel.

The channel gains are

The output voltage Vout

The following table shows the output voltage for 4 bits inputs in terms of V3,V2,V1,V0. When viewed on
an oscilloscope, the output voltage Vout of the D/A converter will look like the negative-going staircase
shown in below Figure.

Staircase waveform

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The disadvantage of binary-weighted D/A converter are

1. When a higher number of inputs is used, a higher number of different resistor values is
required. The accuracy and stability of the D/A converter depends on the absolute
accuracy of the resistors.
2. Loading problems can also exist with this type of D/A converter because
each input has a different input impedance value.

2.1 The R/2R ladder D/A converter.

The following figure shows the circuit diagram of 4 bit R/2R ladder D/A converter. It overcomes the
limitation of binary weighted D/A converter because it uses only two resistor values 10KΩ and 20KΩ in
R/2R ladder network.

In Figure DO, D1, D2, D3 are switches(bits) and it will be connected to either Vref = +5v (Logic 1) or
ground - 0V (Logic 0). The ladder network converts the possible binary input values from 0000 through
1111 to one of 16 unique output voltage levels. D0 is considered to be the least significant input bit
(LSB), while D3 is the most significant bit (MSB).

To determine the D/A converter’s output voltage, first find the binary input value to its decimal-
equivalent value BIN. This can be done by:

-----------------> 1

Then, the output voltage will be found by:

-----------> 2

Where N = 4 (number of bits)

Example : Consider the binary input 1001, then D0 = 1, D1 = 0, D2 = 0 and D3 = 1. From figure Vref =
+5v and N = 4. From equation-1 first find the Decimal-equivalent value BIN.

Then find the Vout ( analog output) using equation-2.

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Nonlinear OPAMP circuits.

The nonlinear opamp circuits usually have no feedback or used +ve feedback. Because of very
high open loop gain, even very small value of input voltage makes the output of opamp to saturate
± Vsat levels. Where Vsat voltage will be approximately one voltage less than supply Vcc voltage.
Example : if VCC is +15V then the output voltage equals to ± Vsat approximately ± (15-1) = ±
14V.

Consider the following opamp circuit, where there is no feedback from output. The V1 voltage is
noninverting input terminal voltage and V2 is inverting input terminal voltage.

1. When V1 > V2 , ( noninverting terminal input voltage

is greater than inverting terminal input voltage ) then the
output voltage
Vout = + Vsat

2. When V2 > V1, ( inverting terminal input voltage is

greater than noninverting terminal input voltage ) then
the output voltage
Vout = - Vsat

The example circuits for non linear opamp circuits are

1. Comparators
2. Wave shapers etc…

3.1 Comparators with Zero Reference

i ) Non-inverting comparator with Zero Reference.

The following figure shows the non-inverting comparator with zero reference. The input
voltage Vin in applied to non-inverting terminal and inverting terminal is fed with zero
volts(Grounded). So the reference voltage for comparison is Zero volts

Fig: Circuit Diagram

When Vin > 0v, the output voltage Vout = + Vsat

When Vin < 0v, the output voltage Vout = - Vsat

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The following figures shows the input and output wave form for input voltage of 2Vp-p.
and Transfer characteristics (Vout Vs. Vin)

Fig: Transfer Characteristics

Fig : Input and output wave forms

This circuit also called zero crossing detector as whenever input voltage crosses zero voltage
level the output changes its status between +Vsat and -Vsat.

ii) Inverting comparator with Zero Reference.

The following figure shows the inverting comparator with zero reference. The input voltage Vin is
applied to inverting terminal and non-inverting terminal is fed with zero volts(Grounded). So the
reference voltage for comparison is Zero volts.

Fig: Circuit Diagram

When Vin > 0v, the output voltage Vout = - Vsat

When Vin < 0v, the output voltage Vout = + Vsat

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The following figures shows the input and output wave form for input voltage of 2Vp-p.
and Transfer characteristics (Vout Vs. Vin)

Fig : Input and output wave form Fig: Transfer Characteristics

3.2 Comparators with Non-Zero Reference:

i) Non-inverting comparator with Non-zero Reference (trip point):

The following figure shows the non-inverting comparator with Non-zero reference. In this circuit the Vin
voltage is applied to non-inverting input terminal and a fixed reference voltage Vref (trip point) is applied
to the inverting input terminal.

Figure : Circuit Diagram

When Vin > Vref, the output voltage Vout = +Vsat

When Vin < Vref , the output voltage Vout = - Vsat

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The Vref voltage is obtained from voltage divider network which uses R1 and R2 resistors. T he Vref
voltage is given by

The Vref voltage will be Positive if VCC is used and it will be negative if –VEE is used.

The following figure shows the input and output waveform and Transfer characteristics if Vref is
Positive(+Vref)

Fig : Input and Output waveforms Fig : Transfer Characteristics

The following figure shows the input and output waveform and Transfer characteristics if Vref is
Negative (-Vref).

Fig : Transfer Characteristics

Fig : Input and Output waveforms

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The Bypass Capacitor reduces the amount of power-supply ripple and other noise appearing at the
inverting input. To be effective, the cutoff frequency of this bypass circuit should be much lower
than the ripple frequency of the power supply. The cutoff frequency is given by:

Example Problems:
1. In Fig, the input voltage is a sine wave with a peak value of 10 V. What is the trip point of the
circuit? What is the cutoff frequency of the bypass circuit? What does the output waveform look
like?

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2. In Fig. the dual supply voltages are ±15V. If R1 = 47 kΩ and R2 = 12 kΩ, what is the
reference voltage? If the bypass capacitance is 0.5 µF, what is the cutoff frequency?

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3.3 Comparators with Hysteresis.

If the input to a comparator contains a large amount of noise, the output will be erratic when vin is near the trip point.
One way to reduce the effect of noise is by using a comparator with positive feedback. A comparator using positive
feedback usually called a Schmitt trigger. The positive feedback produces two separate trip points that prevent a
noisy input from producing false transitions.

Two types of Schmitt trigger:

1. Inverting Schmitt trigger.
2. Non-inverting Schmitt trigger.

1. Inverting Schmitt trigger

Following figure shows the inverting Schmitt trigger circuit. In the circuit input Vin is
applied to inverting input terminal and a feedback signal is applied to noninverting terminal. This
ensures positive feedback.

Fig : Circuit diagram of Inverting Schmitt trigger.

In the circuit we get two reference voltages(triggering points) at non inverting terminal for
comparing with Vin. The two reference voltages are UTP and LTP.

The UTP is called as Upper Triggering Point and it is calculated when output is at +Vsat.
The LTP is called as Lower Triggering Point and it is calculated when output is at –Vsat.

When the output is at +Vsat, the non inverting terminal get a UTP ref voltage which is given by

𝑅1
𝑈𝑇𝑃 = ( ) (+𝑉𝑠𝑎𝑡)
𝑅1 + 𝑅2
𝑅1
If (𝑅1+𝑅2) is considered as feedback factor B
Then UTP = + B Vsat.
Similarly when the output is at -Vsat, the non inverting terminal get a LTP ref voltage which is
given by
𝑅1
𝐿𝑇𝑃 = ( ) (−𝑉𝑠𝑎𝑡)
𝑅1 + 𝑅2

LTP = - B Vsat.

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The difference between these trip points is defined as the hysteresis.

The circuit operation :

Consider the output voltage at +Vsat. This gives a non-inverting terminal ref voltage UTP. When
the input voltage goes more than UTP, the output shifts form +Vsat to –Vsat.

Now the output voltage is –Vsat, this changes the a non-inverting terminal ref voltage from UTP
to LTP and now the new ref voltage is LTP. Till this LTP point the output is –Vsat only. As
soon the input voltage goes less than LTP, the output shifts from –Vsat to +Vsat. This cycle
continues, as summary we can write

When Vin > UTP, Vout = - Vsat

When Vin < LTP, Vout = +Vsat

Following figure shows the input and output waveforms of inverting Schmitt trigger.

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The following figure shows the transfer characteristics. This is also called Hysteresis curve.

Example Problems

1. If Vsat = 13.5 V, what are the trip points and hysteresis in Fig.?

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2. If Vsat = 13.5 V, what are the trip points and hysteresis in Fig.?

3. Design an inverting Schmitt trigger circuit for UTP = 2V and LTP = -2V, Assume Vsat=13.5V

Solution:

W.K.T the feed back fraction B of inverting Schmitt trigger is given by

𝑅1
𝐵= ( )
𝑅1 + 𝑅2

UTP = + B Vsat or LTP = - B Vsat

B = UTP / Vsat B = LTP / -Vsat
B = 2 / 13.5 = 0.148 B = -2 / -13.5 = 0.148

Therefore

𝑅1
(𝑅1+𝑅2) = 0.148

R1 = 0.148R1 + 0.148R2
0.852R1 = 0.148R2

Let R1 = 1KΩ then

R2 = (0.852 * 1K)/0.148
R2 = 5.756 KΩ

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2. Non-inverting Schmitt trigger

Following figure shows the inverting Schmitt trigger circuit. In the circuit input Vin is applied to non
inverting input terminal and a feedback signal is also applied to noninverting terminal. This ensures
positive feedback.

The equations for the trip points of a noninverting Schmitt trigger are given by:

The circuit operation :

If the output is +Vsat , the feedback voltage to the noninverting input is positive, which reinforces
the positive saturation. Similarly, if the output is -Vsat, the feedback voltage to the noninverting
input is negative, which reinforces the negative saturation.
Assume that the output is negatively saturated. The feedback voltage will hold the output in
negative saturation until the input voltage becomes slightly more positive than UTP. When this
happens, the output switches from negative to positive saturation. Once in positive saturation, the
output stays there until the input voltage becomes slightly less than LTP. Then, the output can
change back to the negative state.
Following figures shows the input and output waveforms and Hysteresis curve for non-inverting
Schmitt trigger.

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Why Hysteresis is desirable in Schmitt trigger circuits?

Hysteresis is desirable in a Schmitt trigger because it prevents noise from causing false triggering.
If the peak-to-peak noise voltage is less than the hysteresis, the noise cannot produce false
triggering. For instance, if UTP = +1 V and LTP = -1 V, then H = 2 V. In this case, the Schmitt
trigger is immune to false triggering as long as the peak-to-peak noise voltage is less than 2 V.

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Oscillators
Many electronic devices require a source of energy at a specific frequency which may range from a few Hz to
several MHz. This is achieved by an electronic device called an oscillator. Oscillators can produce sinusoidal or
non-sinusoidal (e.g. square wave) waves.

Theory of Sinusoidal Oscillators

An electronic device that generates sinusoidal oscillations of desired frequency is known as a sinusoidal
oscillator. A transistor/opamp amplifier with proper positive feedback can act as an oscillator i.e., it can
generate oscillations without any external signal source.

Fig 2.1
Consider the above figure 2.1, in figure Av is the amplifier voltage gain and B is feedback factor of feedback
circuit. The amplifier output Vout is given by
Vout = Av * Vin
This output voltage drives the feedback circuit that is usually a resonant circuit. Because of this, we get
maximum feedback at one frequency. The feedback voltage Vf at point x in figure is given by

Vf = Vout * B
Vf = Av*Vin* B

Where B is feedback factor.

The phase shift through the amplifier and feedback is equivalent to 00. Because amplifier produces 1800 phase
shift and feedback circuit also produces 1800 phase shift, so total loop phase shift is 00 . This is called positive
feedback as feedback voltage is in phase with input voltage.

Suppose we connect point x to point y and simultaneously remove voltage source vin, then the feedback
voltage Av*B*(vin) drives the input of the amplifier, as shown in Fig. 2.2

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Fig 2.2
In figure 2.2, the Av * B is called loop gain. If it is not equal to 1, then the circuit produces damped
Oscillation.

Vout Vout

If Av*B < 1 If Av*B > 1

If Loop gain is Av*B = 1 then we get sustained oscillations or undammed oscillations which is show below

Av * B = 1

Noise acts as input voltage :

When we first turn on the power, the only signals in the system are the noise voltages
generated by the resistors. These noise voltages are amplified and appear at the output terminals.
The amplified noise, which contains all frequencies, drives the resonant feedback circuit.

By deliberate design, we can make the loop gain greater than 1 and the loop phase shift equal to
0° at the resonant frequency. Above and below the resonant frequency, the phase shift is different
from 0°. As a result, oscillations will build up only at the resonant frequency of the feedback
circuit.

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Types of Sinusoidal Oscillators

LC Oscillators (Feedback circuit consists Inductors (L) and Capacitors(C)):

1. Colpitt’s Oscillators.
2. Hartley Oscillators.
3. Crystal Oscillators

RC Oscillators (Feedback circuit consists Resistors (R) and Capacitors(C)):

1. RC Phase shift Oscillators.
2. Wein Bridge Oscillators.

1. Colpitt’s Oscillator:
Fig. 2.3 shows a Colpitt's oscillator. It uses two capacitors and placed across a common inductor
L and the center of the two capacitors is tapped. The tank circuit is made up of C1, C2 and L.

Fig 2.3 : Colpitt’s Oscillator

The frequency of oscillations is determined by the values of C1, C2 and L and is given by fr :

Where C is given by

Circuit operation : When the circuit is turned on, the capacitors C1 and C2 are charged. The
capacitors discharge through L,setting up oscillations of frequency determined by exp fr. The

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output voltage of the amplifier appears across C1 and feedback voltage is developed across C2.
The voltage across it is 180° out of phase with the voltage developed across C1 (Vout) as shown
in Fig 2.4. It is easy to see that feedback voltage (voltage across C2 ) to the transistor provides
positive feedback.

A phase shift of 180° is produced by the transistor and a further phase shift of 180° is
produced by C1 − C2 voltage divider. In this way, feedback is properly phased to produce
continuous undamped oscillation.

Fig 2.4 : Feedback circuit

The Feedback factor B = Vf / Vout = Xc2 / Xc

For the oscillator to start, the minimum voltage gain is:

2. Hartley Oscillators:
Fig. 2.5 shows a Hartley oscillator. It uses two Inductors and placed across a common Capcitor C
and the center of the two inductor is tapped. The tank circuit is made up of L1, L2 and C.

The frequency of oscillations is determined by the values of L1, L2 and C and is given by fr :

Where L is given by L = L1 + L2

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Fig 2.5 : Hartley Oscillator

Circuit operation : When the circuit is turned on, the capacitors C charged. The capacitors
discharge through L1 and L2 ,setting up oscillations of frequency determined by exp fr. The output
voltage of the amplifier appears across L1 and feedback voltage is developed across L2. The
voltage across it is 180° out of phase with the voltage developed across L1 (Vout) as shown in Fig
2.6. It is easy to see that feedback voltage (voltage across L2 ) to the transistor provides positive
feedback.

Fig 2.6 : Feedback circuit

The Feedback factor B = Vf / Vout = XL2 / XL1

For the oscillator to start, the minimum voltage gain is

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Example problems :

1. What is the frequency of oscillation in Fig.? What is the feedback fraction? How much voltage
gain does the circuit need to start oscillating ?

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2. A Hartley oscillator like the one in Fig. has L1 = 1µH and L2 = 0.2 µH. What is the feedback
fraction? What is the frequency of oscillation if C = 1000pF? The minimum voltage gain needed
to start oscillations?

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3. Crystal Oscillators
Fig. 2.7 shows a Crystal oscillator. It is very stable oscillator compare to other oscillators, so most
of the electronic devices uses this type of oscillator for its operation.

It uses Quartz Crystal which has great mechanical strength and simplicity of manufacture. Quartz
crystal exhibit the piezoelectric effect.

Piezoelectric effect : when we apply an a.c. voltage across quartz crystal, they vibrate at the
frequency of the applied voltage. conversely, Conversely, if you mechanically force them to
vibrate, they generate an ac voltage of the same frequency.. This is called piezoelectric effect.

Equivalent circuit of Crystal:

i. When the crystal is not vibrating, it is equivalent to capacitance Cm because it has two metal
plates separated by a dielectric which is shown below. This capacitance is known as mounting
capacitance Cm.

ii. When a crystal vibrates, *it is equivalent to R –L – Cs series circuit. Therefore, the equivalent
circuit of a vibrating crystal is R – L – Cs series circuit shunted by the mounting capacitance Cm
as shown in Fig. below.

The series resonant frequency fs of a crystal is the resonant frequency of the LCR branch and
it is given by

The parallel resonant frequency fp of the crystal is the frequency is due to Cm and Cs and it is
given by

Where

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Fig 2.7 Crystal Oscillator

Figure 2.7 shows a Colpitts crystal oscillator. The capacitive voltage divider produces the feedback
voltage for the base of the transistor. The crystal acts like an inductor that resonates with C1 and
C2. The oscillation frequency is between the series and parallel resonant frequencies of the crystal.

Example Problem:

1. A crystal has these values : L = 3H, Cs = 0.05pF, R = 2KΩ and Cm = 10pF. What are the
series and parallel resonant frequencies of the crystal ?

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4. RC Phase Shift Oscillator :

RC Phase shift oscillator uses phase shift circuit. A phase-shift circuit essentially consists of an R-
C network as shown in figure 4.1. This circuit is also called as lead circuit, where V1’ across R
leads the applied voltage V1 by angle Øo. The proper values of R and C should be selected such
that the Øo = 60o . If such three RC networks are used as shown in figure 4.2, the total phase angle
will be 180 o between V2 and V1. This network is used as feedback circuit in the RC phase shift
Oscillator which is shown in figure 4.3.

Fig 4.1 Fig 4.2

Fig 4.3
The inverting amplifier produces 180 degree phase shift and feedback circuit produces another
180 degree, so total loop phase shift is 360 degree, the circuit produces oscillations. The frequency
of oscillations is given by

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5. The Wien Bridge Oscillator:

This type of Oscillator used to generate the frequency of the signal which ranges for 5Hz to 1MHz.
The Oscillator uses Lead and Lag circuit as feedback circuit.

The lead Circuit:

In Lead circuit (coupling circuit) the phase angle between input and output is calculated using

From above equation and half circle diagram it is clear that the phase angle is positive, it means
the Vout leads the Vin by an angle from 0o to +90o.
.

The Lag Circuit:

In Lag circuit (Bypass circuit) the phase angle between input and output is calculated using

From above equation and half circle diagram it is clear that the phase angle is negative, it means
the Vout lags the Vin by an angle from 0o to -90o.

The combination of Lead and Lag Circuit:

Figure 5.1 shows the feedback resonant (Lead and Lag) circuit. At very low frequencies, the series
capacitor appears open to the input signal, and there is no output signal. At very high frequencies,

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the shunt capacitor looks shorted, and there is no output. In between these extremes, the output
voltage reaches a maximum value. The frequency where the output is maximum is the resonant
frequency fr. At this frequency, the feedback fraction B reaches a maximum value of 1⁄3 (Fig 5.2).

Fig 5.1 : Lead-lag Circuit Fig 5.2: Feedback Factor Fig 5.3: Phase response

At resonant frequency fr.,due to lead and lag circuit angle concept, the over all phase angle of the
feedback circuit is 0o (Fig 5.3).

From above discussion it is clear that from feed back circuit at resonant frequency fr, the feed
back factor (B) is 1/3 and produced phase shift is 00.

The wien bridge oscillator circuit:

Fig 5.4 : Wien bridge oscillator circuit

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Figure 5.4 shows the wien bridge oscillator circuit. There it both positive feedback and negative
feedback. Form circuit it is clear that, the output of feedback circuit is input for noninverting
amplifier and from the analysis of non-inverting amplifier the gain is given by

At resonant frequency the feedback circuit has B = 1/3. So the overall loop gain
AB = 3*(1/3) = 1.
The feedback circuit has phase shift of 0o and non-inverting amplifier circuit phase shift is also 0o
so the overall circuit phase shift will be 0o . These two condition produces the circuit to oscillate
at fr which is given by

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The 555 Timer:

It is a widely used timer IC to generate clock signals and timing applications. It is an 8 pin IC
which works with supply voltage VCC between +4.5V to +18V. The following figures shows the
pinout and simplified internal block diagram.

Fig : Pinout of 555 timer

Fig : Simplified Internal Block diagram

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It mainly consists of
a. Three - 5KΩ,
b. Two - comparators,
c. One - S R flip-flop
d. One - NPN transistor.

Three 5KΩ with VCC and Ground pins forms the voltage divider network. This gives two
reference voltage for one of the input pins of comparator. The reference voltages are LTP and
UTP. The LTP ref voltage is 1/3 VCC and UTP ref voltage is 2/3 VCC.

The Transistor used as Switch, If S-R latch output Q is High then this transistor conducts, acts as
a close switch and connects the Pin -7 to ground. Usually in application circuits a capacitor is
connected between pin -7 and ground, so when Transistor conducts, it discharges the capacitor
instantly.

One of the input for upper comparator is ref voltage of UTP and another input is Pin-6(Threshold)

If Pin-6 voltage > UTP : The Upper comparator gives High output (non-inv input is greater than
inv input)
If Pin-6 voltage < UTP : The Upper comparator gives Low output (inv input is greater than non-
inv input)

Similarly,

One of the input for Lower comparator is ref voltage of LTP and another input is Pin-2(Trigger)

Pin-2 voltage < LTP: Lower comparator gives High output (non-inv input is greater than inv
input)
Pin-2 voltage > LTP:: Lower comparator gives Low output (inv input is greater than non-inv
input)

The S R flip-flop is fed with two comparator outputs.

a. If upper comparator provides high output then S = 1, so Q = 1 and Q = 0, Output (Pin-3) will be
low and at the same time transistor conducts and acts as close switch.

b. If lower comparator provides High output then R = 1, so Q = 0 and Q = 1, Output (Pin-3) will
be High and at the same time transistor does not conducts and acts as open switch.

Pin 4 is used to reset the output voltage to zero. Pin 5 is used to control the output frequency when
the 555 timer is used in the astable mode. In many applications, these two pins are made inactive
as follows: Pin 4 is connected to VCC, and pin 5 is bypassed to ground through a capacitor.

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Monostable Operation using 555 timer

Following figures shows the Monostable operation using 555 timer. The circuit has an external
resistor R and a capacitor C. The voltage across the capacitor is used for the threshold voltage to
pin 6. When the trigger arrives at pin 2, the circuit produces a rectangular output pulse from pin 3.

Fig : Monostable operation using 555 timer IC

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Circuit operation:

Initially, the Q output of the RS flip-flop is high. This conducts the transistor (acts as close switch) and
clamps the capacitor voltage at ground. The circuit will remain in this state until a trigger arrives. Since Q
is high, Q is low so output is also low.

When the trigger input falls to slightly less than 1/3VCC, the lower comparator resets the flip-flop. Since
Q has changed to low, the transistor goes into cutoff, allowing the capacitor to charge. At this time, Q has
changed to high so output is high. The capacitor now charges exponentially as shown in waveform.

When the capacitor voltage is slightly greater than 2/3 VCC, the upper comparator sets the flip-flop. So Q
= 1 and makes transistor to conduct and acts as close switch. This discharges the capacitor almost instantly.
At the same time Q = 0 so output is low. This will be low conditions until another input triggers.

The width of the pulse is given by W = 1.1RC

Fig : Waveforms

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Example Problem

1. In Fig., VCC = 12 V, R = 33 kΩ, and C = 0.47 µF. What is the minimum trigger voltage that produces
an output pulse? What is the maximum capacitor voltage? What is the width of the output pulse?

2. In Fig., VCC = 15 V, R = 10MΩ, and C = 470 µF. What is the minimum trigger voltage that produces
an output pulse? What is the maximum capacitor voltage? What is the width of the output pulse?

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Astable Operation using 555 timer

Following figures shows the Astable operation using 555 timer. The circuit has an external resistors R1,
R2 and a capacitor C.

Fig : Astable operation using 555 timer IC

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Circuit operation:
From figure the reference voltage points for comparator is UTP = 2/3 Vcc and LTP = 1/3 Vcc.
When Q is low, the transistor is cut off and the capacitor is charging through a total resistance of R1+R2.
Because of this, the charging time constant is (R1 + R2)* C. At the same time Q = 1, so output is High.

As the capacitor charges, the threshold voltage (pin 6) increases. When the capacitor voltage exceeds 2/3
Vcc, the upper comparator sets the flip-flop. So Q high, the transistor conducts and grounds pin 7. The
capacitor now discharges through R2. Therefore, the discharging time constant is R2*C. At the same time
Q = 0, so output is Low.

When the capacitor voltage drops to slightly less than VCC/3, the lower comparator resets the flip-flop, so
Q is again Low. This process continues and generates the clock signals as shown below waveforms.

Fig : Astable operation waveforms

The ON period (W) of the clock cycle is given by

The one clock cycle time period T is given by

The frequency of clock cycle f = 1/T and it is given by

The Duty cycle D (%) is given by

D (%) = ( Ton / T ) * 100

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Example Problem

1. The Astable operation 555 timer has R1 = 75 kΩ, R2 = 30 kΩ, and C = 47 nF. What is frequency of
the output signal? What is the duty cycle?

2. The Astable operation 555 timer has R1 = 75 kΩ, R2 = 75 kΩ, and C = 47 nF. What is frequency of
the output signal? What is the duty cycle?

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