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Ipack2022 97424

The conference paper discusses the evolution of delamination at the chip-underfill (UF) interface in flip-chip ball grid array (FCBGA) packages under fatigue loading and high automotive temperatures. It highlights the significance of interfacial fracture toughness and the impact of sustained thermal exposure on the reliability of electronic components used in automotive applications. The study employs experimental methods to analyze crack growth rates and fracture toughness, contributing to the understanding of failure modes in automotive electronics.

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0% found this document useful (0 votes)
79 views9 pages

Ipack2022 97424

The conference paper discusses the evolution of delamination at the chip-underfill (UF) interface in flip-chip ball grid array (FCBGA) packages under fatigue loading and high automotive temperatures. It highlights the significance of interfacial fracture toughness and the impact of sustained thermal exposure on the reliability of electronic components used in automotive applications. The study employs experimental methods to analyze crack growth rates and fracture toughness, contributing to the understanding of failure modes in automotive electronics.

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nuaa.wangming
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© © All Rights Reserved
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Available Formats
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net/publication/366114430

Evolution of Propensity for Chip-UF FCBGA Interface Delamination Under


Fatigue-Loading and Sustained High Automotive Temperatures

Conference Paper · December 2022


DOI: 10.1115/IPACK2022-97424

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Pradeep Lall Aathi Raja Ram


Auburn University Auburn University
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A
Proceedings of the ASME 2022 International Technical Conference and Exhibition on

tte
Packaging and Integration of Electronic and Photonic Microsystems

nd
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InterPACK2022
October 25-27, 2022, Garden Grove, California

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IPACK2022-97424

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EVOLUTION OF PROPENSITY FOR CHIP-UF FCBGA INTERFACE DELAMINATION UNDER
FATIGUE-LOADING AND SUSTAINED HIGH AUTOMOTIVE TEMPERATURES

Pradeep Lall1 Aathi Raja Ram Pandurangan Jaimal Williamson


Auburn University Auburn University Texas Instruments
NSF-CAVE3 Electronics NSF-CAVE3 Electronics Dallas, TX 75243
Research Center Research Center
Department of Mechanical Department of Mechanical
Engineering, Engineering,
Auburn, AL, 36849 Auburn, AL, 36849
Tele: +1(334)844-3424
E-mail: lall@[Link]

ABSTRACT 1. INTRODUCTION
Underhood applications in automotive are increasingly Automotive underhood applications are becoming more
using electronics systems for safety and critical functions. In dependent on electronic components for the safety and critical
flip-chip ball grid array (FCBGA) packages, underfill (UF) functions of the automotive. The electronic components in these
forms the integral mechanical support between the substrate and applications are usually subjected to very high thermo-
die. In addition, underfills protect the chip against shock, mechanical loads during operation. FCBGA packages are one of
vibration, moisture, and radiation. Underfills provide great the major critical components used in these applications.
mechanical support to the solder interconnects and limit the Underfills filled with silica are widely used in FCBGAs to fill
amount of plastic work during temperature excursions. the gap between chip die and substrate. Underfills support the
Delamination is of the significant failure modes observed at solder and chip interconnects and protect them from high
chip-UF interfaces. Chip-UF interfaces have not been studied thermo-mechanical loads. Chip-UF interfaces have been studied
widely under cyclic fatigue loading with sustained high- based on simulations in [1]. Experimental delamination of the
temperature exposure. Chip-UF bi-material samples are chip-UF interface under thermal fatigue loading has been studied
prepared and subjected to long-term high-temperature aging at in [2].
100oC and then tested under four-point bend fatigue loading. In FCBGAs chip-UF interface has been one of the most
The specimens have been exposed to isothermal aging for 30 critical interfaces in determining the functional reliability of the
days, 60 days, 90 days, 120 days, and 180 days. The interfacial electronic system. The interfacial strength of the
crack growth rate with respect to the number of fatigue cycles silicon/underfill interface has been studied in [3]. The
has been determined from the experiment. The steady-state components in these underhood electronics are categorized
energy release rate and range of mode-I stress intensity values based on the reliability requirement as grade-0, grade-1, grade-
(ΔKI) have been computed for each of the test conditions. Paris 2, and grade-3 by the Automotive Electronics Council (AEC).
power law has been used to establish the relationship between The electronics under the grade-0 category are expected to
the crack growth rate and the range of stress intensity factors. survive thermal exposure over a wide range from -40oC to
Paris exponents (A,n) are determined from the relationship to +150oC over a long period.
understand the evolution in interfacial fracture toughness with Various interfacial layers of electronic packages have been
respect number of days of aging under fatigue loading. studied in detail, though Chip-UF interfacial reliability has not
Keywords: Isothermal Exposure, FCBGA, Thermal Aging, been studied widely yet. EMC/PCB interfaces are studied under
Interfacial Fracture Toughness, Delamination, Chip/Underfill. mechanical loads in [4]. Similarly, silicon/underfill interfaces
have been studied under mode-I mechanical loading in [5].

1
Contact author: lall@[Link]; +1(334)844-3424

1 Copyright © 2022 by ASME


Under sustained thermo-mechanical loading, delamination
occurs at the chip-UF interface. The interfacial crack propagates
to the solder interconnects, resulting in system failure.
Chip-UF interfacial delamination is one of the critical
failure modes for electronic components under very high
thermo-mechanical loads. The interfacial fracture toughness of
the chip-UF interface evolves with sustained thermal exposure
and mechanical loading. This study focuses on understanding
the evolution in interfacial fracture toughness in chip-UF
interface with respect to sustained high-temperature exposure.
Under bending loads, crack initiates and propagates along FIGURE 2: DICED WAFER SAMPLE WITH KAPTON TAPE FOR
the chip-UF interface. In this study, two different chip-UF PRE-CRACK
interfaces are studied. The underfills are selected based on the
The advances in underfilling in FCBGA and reliability have
end applications in automotive applications. The samples are
been studied in detail in [11]. The mold is sprayed with a PTFE
subjected to isothermal aging at 100oC and tested at pristine, 30
release agent for easier removal of the samples. The beam
days, 60 days, 90 days, and 120 days aging conditions. The
samples of 45mm are placed between the two pieces of the mold.
samples are subjected to quasi-static four-point bend fatigue.
Metal clips of various sizes are used to hold the two pieces of the
The interfacial crack initiation with respect to the number of
mold together. An exacto knife of 0.2mm thickness has been
cycles has been determined. The fracture toughness of the chip-
used to create a pre-crack in the samples as shown in FIGURE
UF interface has been determined from the test results. Fracture
3. The mold is pre-heated at 100oC for 10 mins. After
toughness of the chip-UF interface quantifies the interfacial
preheating, underfill is dispensed into the mold over the chip.
strength of the chip-UF interface. The life prediction under
The specimen is cured and polished to produce the chip-UF
fatigue loading has been characterized by Paris in [6]. The four-
interfacial sample in FIGURE 4. This particular interfacial
point bend loading is a mode-I bend loading and provides mode-
geometry has been chosen based on available interfacial stress
I fracture toughness (KI) values.
intensity parameters computations in the literature. FIGURE 5
shows the chip-UF sample’s schematic with the sample’s
2. EXPERIMENTAL METHODS dimensions. A vertical pre-crack is created on the underfill side
of the bi-material specimen before testing under four-point bend
2.1 Test Vehicle loading. TABLE 1 shows the properties of the underfills. UF2
Two different chip-UF interfaces are studied and named and UF3 have a young’s modulus of 12 GPa, with a curing
Underfill 2 (UF2) and Underfill 3 (UF3). The evolution of bulk temperature of 165oC for 2 hours. The underfills vary based on
properties of UF1, UF2, UF3, and UF4 has been studied in detail the viscosity and transition temperatures.
in our previous work [7]. Various dissimilar interfaces have
been studied for delamination in [8], [9], and [10]. Interfacial
specimens of 45mmx8mmx1mm are used in the study. A Teflon
coated steel mold as shown in FIGURE 1 is used to prepare the
chip-UF interfacial samples. Beam samples of 45mm are
prepared from an 8-inch wafer of 600um. A horizontal pre-crack
of 0.4mm has been created in the beam samples, using a thin
kapton tape as shown in FIGURE 2.

FIGURE 3: CHIP PLACED INSIDE THE MOLD WITH EXACTO


KNIFE FOR VERTICAL PRE-CRACK
FIGURE 1: TEFLON COATED MOLD

2 Copyright © 2022 by ASME


FIGURE 4: CHIP-UF INTERFACE SAMPLE AFTER CURING
AND POLISHING

FIGURE 5: CHIP-UF INTERFACE SAMPLE WITH DIMENSIONS

The characteristics of the underfill and the filler content in each


underfill have been shown in TABLE 2. Both the underfill are
have similar characteristics. FIGURE 6: FOUR POINT BEND TEST SET UP

TABLE 1: PROPERTIES OF THE UNDERFILLS


Young’s Viscosity Cure CTE
Tg
Underfill Modulus [Pa.s] Profile ≦Tg
[℃]
[GPa] @25oC (oC/Hrs) [ppm/℃]
UF-2 7.13 55 150/2 115 23
UF-3 6 20 150/2 107 29
FIGURE 7: CHIP-UF FATIGUE TEST LAYOUT
TABLE 2: CHARACTERISTICS OF THE UNDERFILLS
Young’s Viscosity Cure CTE
Tg
Underfill Modulus [Pa.s] Profile ≦Tg
[℃]
[GPa] @25oC (oC/Hrs) [ppm/℃]
UF-2 7.13 55 150/2 115 23
UF-3 6 20 150/2 107 29

2.2 Experimental Setup


The bi-material specimens from various aging conditions
are tested under four-point bend loading in a fatigue loading
setup. A span ratio of 2 has been followed in the four-point bend
fixture with a 1KN load cell. The interfacial fatigue
delamination of Epoxy/PCB interfaces have been studied in [12].
A constant downward displacement of 0.436mm has been
configured for the fatigue cycles. FIGURE 6 shows the four-
point test fixture with the test specimen. FIGURE 7 shows the
schematic of the chip-UF sample under four-point bend fatigue
loading. FIGURE 8 shows the experimental test setup. A load
cell of sensitivity 10.73mV/N has been used. The fatigue cycles
are recorded using a Nikon digital camera for DIC capture at 25
frames per second. Similar digital image correlation techniques
are used in tracking the crack propagation in [13], [14], and [15]. FIGURE 8: CHIP-UF INTERFACE SPECIMEN UNDER FOUR-
POINT BEND LOADING

3 Copyright © 2022 by ASME


3. FRACTURE TOUGHNESS CALCULATIONS Where,   tan 1  2  (9)

3.1 Fracture Toughness Calculations       ln r     8    ln r  (10)


The interfacial fracture toughness values of all the chip-UF This K I is computed using the Equation:
interfaces are determined Under fatigue loading. Similar studies
on bi-material specimens have been studied previously K I  Re  K e j   K cos  (11)
[Charalambides 1989; Hutchinson 1987]. The strain energy K II  Im  K e j   K sin  (12)
release rate shows steady-state characteristics. Previously, the
expressions for fracture toughness at the interface of a bi- The range of stress intensity factor values determined using
material specimen have been studied for structural materials. Equation (12) are further used in the Paris power relationship
Since the crack geometry is identical to the four-point flexure between change in stress intensity factor and crack growth rate.
test investigated by Charalambides [10], the expressions
previously developed for the fracture toughness of the bi- 3.2 Fatigue Calculations
material specimen have been used for the current effort. The Under fatigue loading, the sub-critical crack growth can be
steady-state value,  ss is given by computing the difference in characterized by the range of stress intensity factors as postulated
by Paris in [6]. The pre-cracked specimen is subjected to four-
the strain energy between the cracked and uncracked beam
point bend cyclic fatigue loading, as shown in FIGURE 8. The
[Charalambides 1989, 1990]:
load cell output of the cyclic fatigue loading has been shown in
ss =
 
M 2 1-ν 22  1 λ  (1)
FIGURE 9. σm= (σmax+σmin)/2 provides the mean value of the
 -  cyclic stress. Δσ = σmax-σmin provides us with the stress
2E 2  I2 IC 
amplitude.
Where λ=E 2 (1-ν12 )/E1 (1-ν 22 ) ; where ν and E are the
Poisson’s ratio and Young’s modulus of the materials. Material-
1 is the underfill, and Material-2 is the Silicon chip. Subscript-1
thus corresponds to underfill and subscript-2 corresponds to
chip. M and I2 are the applied moment and moment of inertia
per unit width, respectively. When P is applied load, b is the
sample width, and L is the gage length we have
M=P  /2b (2)
I 2 =h 32 /12 (3)
h13 h 32 h1h 2  h1  h 2  (4)
2

IC   
12 12 4  h1   h 2 
Where h2 is the thickness of the chip. The bi-material constant, FIGURE 9: CYCLIC LOADING – TYPICAL LOAD CELL
OUTPUT.
 for plane strain, is defined by following Rice and Sih [1965]
and Rice [1988]:
 3  41 1  (5)
  
1 G1 G2
 ln  
2  3  4 2  1 
 G G1 
 2

The modulus of the K is related to the plane strain energy release


rate,  [Kanninen and Popelar 1985]:
4 cosh 2     ss (6)
K 
 1  1 1   2 
  
 G1 G2 
A simplifying assumption has been made to allow the relative
displacements of the two surfaces of the crack, 8   u x    u y
in the Equation based on experimental measurements:
(7)
 u x    u y 
2 2
u x  iu y  e j
This allows    8 . The phase angle  is computed as follows: FIGURE 10: TYPICAL PLOT OF CRACK LENGTH VS NUMBER
OF CYCLES
   (8)

4 Copyright © 2022 by ASME


The crack length with respect to the number of fatigue
cycles has been determined from the experiment. The
quantitative prediction of residual life for a crack of a certain size
applicable in the growth rates in the range of 10-3 mm/cycle to
10-6 mm/cycle is given by Paris power law (13)
da (13)
 C( K) n

dN
Where, C and n are the intercept and slope of the log-log plot of
da/dN and ΔK, respectively. In region III, the crack growth rate
increase is unstable with small changes in stress intensity factor
fluctuations.

FIGURE 12: LOAD CELL OUTPUT OF CYCLIC LOADING

FIGURE 13: CRACK LENGTH VERSUS NUMBER OF


CYCLES_CHIP-UF2 PRISTINE

FIGURE 11: TYPICAL PLOT OF FATIGUE GROWTH RATE


VERSUS STRESS INTENSITY FACTOR

The instantaneous crack length is plotted against the number


of fatigue cycles as shown in FIGURE 10. The stress intensity
factor fluctuations (ΔK) within each cycle have been determined
from the experimental results. The whole data can be reduced
into a single curve by presenting in terms of crack growth rate
per cycle (da/dN) with respect to the fluctuation in stress
intensity data (ΔK). A sample log-log plot of the Paris power-
law relationship has been shown in FIGURE 11. The ΔK is
below the threshold to initiate crack propagation in Region I of
FIGURE 11. In region II, the crack growth rate is varying
linearly with the ΔK.
FIGURE 14: da/dN vs ΔK_CHIP-UF 2_PRISTINE
4. RESULTS AND DISCUSSION
A pre-crack length of 0.4mm is created in the bi-material The samples are tested for 1000 cycles at Pmax = 4.14551N
specimen before the experiment. The chip-UF samples are tested and Pmin = -3.10878N. The cyclic fatigue loading output from the
under four-point bend cyclic loading. The Pmin and Pmax loads load cell has been shown in FIGURE 12 indicating the maximum
are determined from the experiment. The samples aged at 100oC and minimum loads under which the samples are tested. The bi-
for 30 days, 60 days, 90 days, and 120 days were tested under material specimens are speckle coated using black and white
four-point bend fatigue loading. paints for DIC measurement. The fatigue experiment has been
captured using a high-resolution camera at 25 frames per second.

5 Copyright © 2022 by ASME


FIGURE 15: da/dN vs ΔK_CHIP-UF 2_30 DAYS AGED AT 100OC FIGURE 18: da/dN vs ΔK_CHIP-UF 2_120 DAYS AGED AT
100OC

FIGURE 16: da/dN vs ΔK_CHIP-UF 2_60 DAYS AGED AT 100OC


FIGURE 19: da/dN vs ΔK_CHIP-UF 3_PRISTINE

FIGURE 17: da/dN vs ΔK_CHIP-UF 2_90 DAYS AGED AT 100OC FIGURE 20: da/dN vs ΔK_CHIP-UF 3_30 DAYS AGED AT 100OC
The captured experimental video has been processed using Similarly, FIGURE 15, FIGURE 16, FIGURE 17, and
digital correlation techniques to track the interfacial crack FIGURE 18 show the da/dN versus ΔK plots for chip-UF2
growth. The instantaneous crack length has been plotted against interface with 30 days, 60 days, 90 days, and 120 days aging
the number of fatigue cycles as shown in FIGURE 13. Region I conditions. Similarly, FIGURE 19, FIGURE 20, FIGURE 21,
is removed from the plot and only region II with the steady crack FIGURE 22, and FIGURE 23 show the da/dN versus ΔK plots
growth has been plotted in log-log scale in log-log plot FIGURE for chip-UF3 interfaces with pristine, 30 days, 60 days, 90 days,
14. The intercept and slope of region II has been determined to and 120 days aging conditions.
find the C and n of Equation (13). The C and n values are 3E-06
and 7.0177 for pristine conditions of Chip-UF2.

6 Copyright © 2022 by ASME


pristine and 30 days aging conditions. However, with further
aging, we see that the values diverge after 60 days of aging. The
steady increase in slope, n indicates a steady degradation in the
interfacial fracture toughness with respect to aging. The slope
values are tabulated in TABLE 3.

FIGURE 21: da/dN vs ΔK_CHIP-UF 3_60 DAYS AGED AT 100OC

FIGURE 24: SLOPE COMPARISON FROM PARIS POWER LAW


RELATIONSHIP da/dN VERSUS ΔK

TABLE 3: SLOPE COMPARISON FROM PARIS LAW


RELATIONSHIP da/dN VERSUS ΔK
Chip-UF2 Chip-UF3
Aging n n
FIGURE 22: da/dN vs ΔK_CHIP-UF 3_90 DAYS AGED AT 100OC Pristine 7.0177 7.1557
30 days 5.5707 5.5879
60 days 6.5456 5.6597
90 days 6.8955 5.9312
120 days 7.7624 6.1885

5. SUMMARY AND CONCLUSIONS


Interfacial fracture toughness at the chip-UF interface has
been investigated as a function of aging time when exposed to
high temperatures for extended periods of time. Two different
underfills are studied to understand the reliability of the
respective interfaces. The interfacial samples aged at 100oC for
30 days, 60 days, 90 days, and 120 days are tested under four-
point bend cyclic fatigue loading. The fatigue experiments are
recorded using a high-definition camera. The crack growth rate
at the interface with respect to the number of cycles has been
FIGURE 23: da/dN vs ΔK_CHIP-UF 3_120 DAYS AGED AT
determined using a micro-imaging camera and crack tracking
100OC
methodology. The crack growth rate and ΔK values at the
The computed slope values for each test condition are interface have been computed. Paris power law was then applied
compared against each other in FIGURE 24 to understand the to find the Paris exponents’ and the results indicate an increase
change in interfacial properties with respect to aging. We see a in value over the aging period. This phenomenon explains that
drop in the slope with 30 days of aging for both the underfills, the interface bond between chip-UFs degrades at a high
which indicates an increase in the interfacial fracture toughness. temperature, which makes sense since various researchers have
However, with 60 days, 90 days and 120 days of aging, we see a shown that oxidation and micro-crack formation occurs when we
steady increase in the slope (n) for both the underfills. The stress age the underfills for sustained periods at high temperature [7].
intensity factor values appear to be the same for the underfills at The Chip-UF2 interface has a steep degradation compared to
Chip-UF3 which has a stable degradation pattern over the same

7 Copyright © 2022 by ASME


period. These features should be noted in case of applications of Conference on Thermal and Thermomechanical Phenomena in Electronic
Systems (iTherm) (pp. 708-718). IEEE.
these underfills in the field to improve the reliability of FCBGAs
at high temperatures. The change in stress intensity could also
be attributed to the change in cross-linking density of the
underfill materials

ACKNOWLEDGEMENTS
Semiconductor Research Corporation under Task-ID 3077
sponsored this work. The authors thank the Task Liaisons for
discussion in the course of the research program.

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