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MPMC Module 3

The document discusses two common branch prediction strategies in microprocessors: static and dynamic branch prediction. Static prediction relies on predetermined rules, while dynamic prediction adapts based on runtime behavior, improving accuracy but requiring more hardware. It also compares the branch handling of the Intel 80386, which lacks prediction, to the Pentium series that introduced both static and dynamic prediction methods, highlighting significant differences in performance and pipeline stalls.

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18 views3 pages

MPMC Module 3

The document discusses two common branch prediction strategies in microprocessors: static and dynamic branch prediction. Static prediction relies on predetermined rules, while dynamic prediction adapts based on runtime behavior, improving accuracy but requiring more hardware. It also compares the branch handling of the Intel 80386, which lacks prediction, to the Pentium series that introduced both static and dynamic prediction methods, highlighting significant differences in performance and pipeline stalls.

Uploaded by

shreyashsubhash3921
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

MPMC

Self-Learning – Mod 3
Q1) Describe two common branch prediction strategies used in
modern microprocessors.
Ans :-1) Static Branch Prediction:
This method relies on predetermined rules or patterns to predict
branch outcomes. It doesn't adapt based on runtime behavior.
Common Techniques:
1. Backward Taken, Forward Not Taken (BTFNT): Assumes
backward branches (typically loops) are taken, while forward
branches (like if-else conditions) are not taken.

2. Fixed Prediction: Always assumes a branch is taken or not


taken, regardless of past behavior.

 Advantages: Simple and requires no additional hardware.

 Disadvantages: Less accurate than dynamic methods, leading


to more pipeline stalls.

2) Dynamic Branch Prediction:


This strategy utilizes hardware mechanisms to analyze runtime
behavior and make predictions based on past execution patterns.
Common Techniques:
1. One-Bit Predictor: Uses a single-bit history to remember if the last
instance of the branch was taken or not.
2. Two-Bit Saturating Counter: More advanced, requiring two
wrong predictions before changing the prediction, reducing
mispredictions in cases of occasional changes.

3. Tournament Predictors: Combine multiple predictors (e.g., global


and local predictors) and select the best one dynamically.

 Advantages: Adapts to program behavior, improving accuracy.

 Disadvantages: Requires extra hardware and power.

Q2) What strategy does the 80386 use, and how does it differ from
more advanced processors like the Pentium series
Ans :- 80386 (Intel 80386) Branch Handling
The Intel 80386 does not have branch prediction. Instead, it relies on
static branch execution, meaning:
1. It always assumes that a branch is not taken until it is
resolved.
2. If the branch is taken, the pipeline gets flushed, causing a
delay (pipeline stall).
3. This results in higher branch misprediction penalties and
slower execution for branch-heavy code.
Pentium Series (Pentium, Pentium Pro, and beyond)
 Intel Pentium (P5) introduced static branch prediction:
1. If the branch is backward (loop), it assumes it will be taken.
2. If the branch is forward (like an if-else), it assumes it will not
be taken.
3. This reduces stalls compared to 80386 but is still limited.
 Pentium Pro and later models introduced dynamic branch
prediction:
1. Uses branch history tables (BHT) to store past outcomes and
predict future behavior.
2. Two-bit saturating counters help prevent frequent
mispredictions.
3. Later models use tournament predictors, which combine local
and global prediction strategies.

 Key Differences
Feature Intel 80386 Intel Pentium Intel Pentium Pro &
(P5) Beyond

Branch None (always Static Dynamic (Branch


Prediction assumes "not (BTFNT) History Table, Two-bit
taken") predictors)

Pipeline Stalls High (due to Moderate Low (better branch


frequent prediction reduces
flushing) stalls)

Performance Poor for Improved but Highly optimized for


Impact branch-heavy still limited branch-heavy
code workloads

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