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MTA Test 2 Microprocessor Microcontroller

The document contains a series of multiple-choice questions related to the JNC 2050H instruction set and various assembly language instructions. Each question includes options and the correct answer, covering topics such as instruction types, opcode values, data movement instructions, and the effects of specific operations on registers. Additionally, it addresses the behavior of the stack pointer and the results of arithmetic and logical operations on register contents.

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Soumitra Bhowmik
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0% found this document useful (0 votes)
20 views7 pages

MTA Test 2 Microprocessor Microcontroller

The document contains a series of multiple-choice questions related to the JNC 2050H instruction set and various assembly language instructions. Each question includes options and the correct answer, covering topics such as instruction types, opcode values, data movement instructions, and the effects of specific operations on registers. Additionally, it addresses the behavior of the stack pointer and the results of arithmetic and logical operations on register contents.

Uploaded by

Soumitra Bhowmik
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as TXT, PDF, TXT or read online on Scribd

JNC 2050H is

A. One Byte Instruction


B. Two Byte Instruction
C. Three Byte Instruction
D. Four Byte Instruction
MARKS: 1
ANSWER: C

Opcode of instruction ADD D is


A. 10000000
B. 10000010
C. 11000000
D. 01000111
MARKS: 1
ANSWER: B

Instructions MOV A,M and MOV M,A are defined as


A. MOV A,M copies data from memory to register and MOV M,A copies data from
register to memory
B. MOV M,A copies data from memory to register and MOV A,M copies data from
register to memory
C. Both MOV A,M and MOV M,A copies data from register to memory
D. Both MOV A,M and MOV M,A copies data from memory to register
MARKS: 1
ANSWER: A

Which of the following statement is true


A. Only STA instruction is used to load data in memory
B. Only SHLD instruction is used to load data in memory
C. Only MVI instruction is used to load data in memory
D. All instructions STA, SHLD, MVI are used to load data in memory
MARKS: 1
ANSWER: D

Instruction MVI is used to load data in


A. 8 bit register
B. 16 bit register
C. Both 8 bit and 16 bit registers
D. Neither 8 bit nor 16 bit registers
MARKS: 1
ANSWER: A

Which of the following statement is true


A. Only LDA instruction is used to load data in accumulator
B. Only LXI instruction is used to load data in accumulator
C. Only MVI instruction is used to load data in accumulator
D. Both LDA and MVI instructions are used to load data in accumulator
MARKS: 1
ANSWER: D

Which of the following statement is true


A. Only LDA instruction is used to load data in H-L pair
B. Only LXI instruction is used to load data in H-L pair
C. Only LHLD instruction is used to load data in H-L pair
D. Both LXI and LHLD instructions are used to load data in H-L pair
MARKS: 1
ANSWER: D

If the crystal with 8085 is 2MHz, the time required to execute an instruction
of 20T states is
A. 20 micro seconds
B. 40 micro seconds
C. 10 micro seconds
D. 5 micro seconds
MARKS: 1
ANSWER: C

Let the contents of register A (ACC) is CBH. After execution of instruction SUI
E9H contents of register A (ACC) is
A. B4H
B. E9H
C. CBH
D. E2H
MARKS: 1
ANSWER: D

Let the content of register A (ACC) is CBH. After execution of instruction INR
A content of the register A is
A. CBH
B. BCH
C. CCH
D. BBH
MARKS: 1
ANSWER: C

Let the contents of register A (ACC) and register B are 93H and B7H
respectively. After execution of instruction ANA B contents of register A (ACC) and
register B are
A. 93H and B7H
B. 93H and 93H
C. B7H and B7H
D. B7H and 93H
MARKS: 1
ANSWER: A

Let the contents of register A (ACC) and register B are 97H and 65H
respectively. After execution of instruction XRA B contents of register A (ACC) and
register B are
A. 97H and 65H
B. 97H and 97H
C. F2H and 65H
D. 65H and F2H
MARKS: 1
ANSWER: C

Let the contents of register A (ACC) and register B are 97H and 65H
respectively. After execution of instruction CMP B contents of register A (ACC) and
register B are
A. 97H and 65H
B. 97H and 97H
C. 65H and 65H
D. 65H and 97H
MARKS: 1
ANSWER: A

Let the contents of register A (ACC) and register B are CBH and E9H
respectively. After execution of instruction ADD B status of Flag register (F) is
A. S=1, Z=0, CY=1, AC=1, P=1
B. S=0, Z=0, CY=1, AC=1, P=1
C. S=0, Z=0, CY=0, AC=1, P=1
D. S=1, Z=1, CY=0, AC=0, P=1
MARKS: 1
ANSWER: A

Let the contents of register A (ACC) and register B are 15H and 93H
respectively. After execution of instruction CMP B status of Flag register (F) is
A. S=0, Z=0, CY=0, AC=1, P=1
B. S=0, Z=0, CY=0, AC=1, P=0
C. S=1, Z=1, CY=0, AC=0, P=1
D. S=1, Z=0, CY=1, AC=1, P=1
MARKS: 1
ANSWER: D

When a subroutine is called the address of the instruction next to call is


saved in
A. Stack pointer
B. Program counter
C. Instruction decoder
D. Program status word
MARKS: 1
ANSWER: A

Let the content of register A (ACC) is AAH. After execution of instruction RLC
content of the register A and carry flag(CY) are
A. 15H and 0
B. 51H and 1
C. 55H and 1
D. AEH and 1
MARKS: 1
ANSWER: C

Let the content of register A (ACC) is AAH. After execution of instruction RAL
content of the register A and carry flag(CY) are
A. 15H and 0
B. 51H and 1
C. AAH and 1
D. 54H and 1
MARKS: 1
ANSWER: D

Let the content of the stack pointer is 2000H. After execution of PUSH
instruction, content of the stack pointer is
A. 2000H
B. 2001H
C. 1FFFH
D. 1FFEH
MARKS: 1
ANSWER: D

Let the content of H-L register pair is 2050H. After execution of instruction
DAD H content of H-L register pair is
A. 2050
B. 3050
C. 40A0
D. 30A0
MARKS: 1
ANSWER: C

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