MEMORY MANAGEMENT

 In a uni-programming system, main memory is divided into two parts: one part for
the operating system (resident monitor, kernel) and one part for the user program
currently being executed.
 In a multiprogramming system, the “user” part of memory must be further subdivided
to accommodate multiple processes. The task of subdivision is carried out
dynamically by the operating system and is known as memory management.
 Binding of Instructions and Data to Memory
 Address binding of instructions and data to memory addresses can happen at
three different stages.
1. Compile time: The compile time is the time taken to compile the program or source
code. During compilation, if memory location known a priori, then it generates absolute
codes.
2. Load time: It is the time taken to link all related program file and load into the main
memory. It must generate relocatable code if memory location is not known at compile
time.
 3. Execution time: It is the time taken to execute the program in main memory by
processor. Binding delayed until run time if the process can be moved during its
execution from one memory segment to another. Need hardware support for address
maps (e.g., base and limit registers).

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 Mr. Patil G. S.
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Logical and Physical-Address Map
 An address generated by the CPU is commonly referred to as a logical address
or a virtual address whereas an address seen by the main memory unit is
commonly referred to as a physical address.
 The set of all logical addresses generated by a program is a logical-address
space whereas the set of all physical addresses corresponding to these logical
addresses is a physical- address space.
 Logical and physical addresses are the same in compile-time and load-time
address- binding schemes; logical (virtual) and physical addresses differ in
execution-time address- binding scheme.
 The Memory Management Unit is a hardware device that maps virtual to
physical address. In MMU scheme, the value in the relocation register is added
to every address generated by a user process at the time it is sent to memory .

Dynamic Loading
 It loads the program and data dynamically into physical memory to obtain
better memory-space utilization.
 With dynamic loading, a routine is not loaded until it is called.
 The advantage of dynamic loading is that an unused routine is never loaded.
 This method is useful when large amounts of code are needed to handle
infrequently occurring cases, such as error routines.
 Dynamic loading does not require special support from the operating system.
Dynamic Linking
 Linking postponed until execution time.
 Small piece of code (stub) used to locate the appropriate memory-resident
library routine.
 Stub replaces itself with the address of the routine and executes the routine.
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  Operating system needed to check if routine is in processes memory address.
 Dynamic linking is particularly useful for libraries.
Overlays
 Keep in memory only those instructions and data that are needed at any given
time.
 Needed when process is larger than amount of memory allocated to it.
 Implemented by user, no special support needed from operating system,
programming design of overlay structure is complex.

Swapping
 A process can be swapped temporarily out of memory to a backing store (large disc),
and then brought back into memory for continued execution.
 Roll out, roll in: A variant of this swapping policy is used for priority-based
scheduling algorithms. If a higher-priority process arrives and wants service, the
memory manager can swap out the lower-priority process so that it can load and
execute the higher-priority process. When the higher-priority process finishes, the
lower-priority process can be swapped back in and continued. This variant of
swapping is called roll out, roll in.
 Major part of swap time is transfer time; total transfer time is directly proportional
to the amount of memory swapped.
 Modified versions of swapping are found on many systems (UNIX, Linux, and
Windows)

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MEMORY ALLOCATION
 The main memory must accommodate both the operating system and the various
user processes. We need to allocate different parts of the main memory in the most
efficient way possible.
 The main memory is usually divided into two partitions: one for the resident
operating system, and one for the user processes. We may place the operating system
in either low memory or high memory. The major factor affecting this decision is the
location of the interrupt vector. Since the interrupt vector is often in low memory,
programmers usually place the operating system in low memory as well.
There are following two ways to allocate memory for user processes:
1. Contiguous memory allocation
2. Non contiguous memory allocation
1. Contiguous Memory Allocation
 Here, all the processes are stored in contiguous memory locations. To load multiple
processes into memory, the Operating System must divide memory into multiple
partitions for those processes.
 Hardware Support: The relocation-register scheme used to protect user processes
from each other, and from changing operating system code and data. Relocation
register contains value of smallest physical address of a partition and limit register
contains range of that partition. Each logical address must be less than the limit
register.
 According to size of partitions, the multiple partition schemes are divided into two
types:
i. Multiple fixed partition/ multiprogramming with fixed task(MFT)
ii. Multiple variable partition/ multiprogramming with variable task(MVT)

i. Multiple fixed partitions(MFT): Main memory is divided into a number of static

partitions at system generation time. In this case, any process whose size is less than
or equal to the partition size can be loaded into any available partition. If all partitions
are full and no process is in the Ready or Running state, the operating system can
swap a process out of any of the partitions and load in another process, so that there
is some work for the processor.
 Advantages: Simple to implement and little operating system overhead.
 Disadvantage: * Inefficient use of memory due to internal fragmentation.
* Maximum number of active processes is fixed.

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ii. Multiple variable partitions: (MVT) With this partitioning, the partitions are of
variable length and number. When a process is brought into main memory, it is allocated
exactly as much memory as it requires and no more.

 Advantages: No internal fragmentation and more efficient use of main memory

 Disadvantages: Inefficient use of processor due to the need for compaction to
counter external fragmentation

Internal and External fragmentation

 Memory fragmentation is a prevalent problem in operating systems that can result in
the inefficient use of memory resources. There are two types of fragmentation:
internal and external, and they both have an impact on memory allocation and use. In
this article, we are going to study the difference between Internal and External
fragmentation in detail.

 What is Internal Fragmentation?

 Internal fragmentation happens when the memory is split into mounted-sized blocks.
Whenever a method is requested for the memory, the mounted-sized block is allotted
to the method. In the case where the memory allotted to the method is somewhat
larger than the memory requested, then the difference between allotted and
requested memory is called internal fragmentation. We fixed the sizes of the memory
blocks, which has caused this issue. If we use dynamic partitioning to allot space to
the process, this issue can be solved.

 Internal Fragmentation

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 The above diagram clearly shows the internal fragmentation because the difference
between memory allocated and required space or memory is called Internal
fragmentation.
 What is External Fragmentation?
 External fragmentation happens when there's a sufficient quantity of area within the
memory to satisfy the memory request of a method. However, the process’s memory
request cannot be fulfilled because the memory offered is in a non-contiguous
manner. Whether you apply a first-fit or best-fit memory allocation strategy it'll
cause external fragmentation.

 External Fragmentation
In the above diagram, we can see that, there is enough space (55 KB) to run a process-07
(required 50 KB) but the memory (fragment) is not contiguous. Here, we use
compaction, paging, or segmentation to use the free space to run a process.

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Compaction

Compaction is a technique to collect all the free memory present in the form of
fragments into one large chunk of free memory, which can be used to run other
processes.

It does that by moving all the processes towards one end of the memory and all the
available free space towards the other end of the memory so that it becomes contiguous.
It is not always easy to do compaction. Compaction can be done only when the relocation
is dynamic and done at execution time. Compaction can not be done when relocation is
static and is performed at load time or assembly time.
Before Compaction
Before compaction, the main memory has some free space between occupied space.
This condition is known as external fragmentation . Due to less free space between
occupied spaces, large processes cannot be loaded into them.
Main Memory

Occupied space

Free space

Occupied space

Occupied space

Free space
After Compaction
After compaction, all the occupied space has been moved up and the free space at the
bottom. This makes the space contiguous and removes external fragmentation.
Processes with large memory requirements can be now loaded into the main memory.
.

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PAGING
 Main memory is divided into a number of equal-size blocks, are called frames.
Each
 process is divided into a number of equal-size block of the same length as
frames, are called Pages. A process is loaded by loading all of its pages into
available frames (may not be contiguous).
 (Diagram of Paging hardware)

Process of Translation from logical to physical addresses

 Every address generated by the CPU is divided into two parts: a page number
(p) and a page offset (d). The page number is used as an index into a page table.
 The page table contains the base address of each page in physical memory.
This base address is combined with the page offset to define the physical
memory address that is sent to the memory unit.
 If the size of logical-address space is 2m and a page size is 2n addressing units
(bytes or words), then the high-order (m – n) bits of a logical address designate
the page number and the n low-order bits designate the page offset. Thus, the
logical address is as follows
 Where p is an index into the page table and d is the displacement within the
page.
Example:
 Consider a page size of 4 bytes and a physical memory of 32 bytes (8 pages), we show
how the user's

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 view of memory can be mapped into physical memory. Logical address 0 is page 0,
offset 0. Indexing into the page table, we find that page 0 is in frame 5. Thus, logical
address 0 maps to physical address 20 (= (5 x 4) + 0). Logical
 address 3 (page 0, offset 3) maps to
 physical address 23 (= (5 x 4) + 3). Logical
 address 4 is page 1, offset 0; according to the page table, page 1 is mapped to frame
 6. Thus, logical address 4 maps to physical address 24 (= (6 x 4) + 0). Logical address
13 maps to physical address 9(= (2 x 4)+1).

Hardware Support for Paging: Each operating system has its own methods for storing
page tables. Most operating systems allocate a page table for each process. A pointer
to the page table is stored with the other register values (like the instruction counter)
in the process control block. When the dispatcher is told to start a process, it must
reload the user Implementation of Page Table
 Generally, Page table is kept in main memory. The Page Table Base Register (PTBR)
points to the page table. And Page-table length register (PRLR) indicates size of the
page table.
 In this scheme every data/instruction access requires two memory accesses. One
for the page table and one for the data/instruction.
 The two memory access problem can be solved by the use of a special fast-lookup
hardware cache called associative memory or translation look-aside buffers
(TLBs).
Paging Hardware With TLB
The TLB is an associative and high-speed memory. Each entry in the TLB consists of
two parts: a key (or tag) and a value. The TLB is used with page tables in the following
way. Page 59

 The TLB contains only a few of the page-table entries. When a logical address is
generated by the CPU, its page number is presented to the TLB.
 If the page number is found (known as a TLB Hit), its frame number is immediately
available and is used to access memory. It takes only one memory access.
 If the page number is not in the TLB (known as a TLB miss), a memory reference to
the page table must be made. When the frame number is obtained, we can use it to
access memory. It takes two memory accesses.
 In addition, it stores the page number and frame number to the TLB, so that they
will be found quickly on the next reference.
 If the TLB is already full of entries, the operating system must select one for
replacement by using replacement algorithm.

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 (Paging hardware with TLB)
The percentage of times that a particular page number is found in the TLB is called
the
hit ratio. The effective access time (EAT) is obtained as follows:
EAT= HR x (TLBAT + MAT) + MR x (TLBAT + 2 x MAT)
Where HR: Hit Ratio, TLBAT: TLB access time, MAT: Memory access time, MR: Miss
Ratio..

Segmentation

Segmentation is a memory-management scheme that supports user view of memory.

A program is a collection of segments. A segment is a logical unit such as: main program,

procedure, function, method, object, local variables, global variables, common block,
stack, symbol table, arrays etc.

A logical-address space is a collection of segments. Each segment has a name and a

length. The user specifies each address by two quantities: a segment name/number and an
offset.

Hence, Logical address consists of a two tuple: <segment-number, offset> Segment

table maps two-dimensional physical addresses and each entry in table has: base – contains

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the starting physical address where the segments reside in memory. limit – specifies the
length of the segment.

Segment-table base register (STBR) points to the segment table’s location in memory.

Segment-table length register (STLR) indicates number of segments used by a program.

(Diagram of Segmentation Hardware)

The segment number is used as an index into the segment table. The offset d of the logical
address must be between 0 and the segment limit. If it is not, we trap to the operating
system that logical addressing attempt beyond end of segment. If this offset is legal, it is
added to the segment base to produce the address in physical memory of the desired byte.

Consider we have five segments numbered from 0 through 4. The segments are stored in
physical memory as shown in figure. The segment table has a separate entry for each
segment, giving start address in physical memory (or base) and the length of that segment
(or limit). For example, segment 2 is 400 bytes long and begins at location 4300. Thus, a
reference to byte 53 of segment 2 is mapped onto location 4300 + 53 = 4353.

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Virtual Memory:
Virtual memory is a memory management technique used by operating systems to give
the appearance of a large, continuous block of memory to applications, even if the physical
memory (RAM) is limited. It allows larger applications to run on systems with less RAM.
 The main objective of virtual memory is to support multiprogramming, The main
advantage that virtual memory provides is, a running process does not need to be
entirely in memory.
 Programs can be larger than the available physical memory. Virtual Memory provides
an abstraction of main memory, eliminating concerns about storage limitations.
 A memory hierarchy, consisting of a computer system's memory and a disk, enables a
process to operate with only some portions of its address space in RAM to allow more
processes to be in memory.

A virtual memory is what its name indicates- it is an illusion of a memory that is larger
than the real memory. We refer to the software component of virtual memory as a virtual
memory manager. The basis of virtual memory is the noncontiguous memory allocation
model. The virtual memory manager removes some components from memory to make
room for other components.
The size of virtual storage is limited by the addressing scheme of the computer system
and the amount of secondary memory available not by the actual number of main storage
locations.
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Demand paging:-
Demand paging is a memory management scheme used in operating systems to
improve memory usage and system performance. Let's understand demand paging
with real life example Imagine you are reading a very thick book, but you don’t want
to carry the entire book around because it’s too heavy. Instead, you decide to only
bring the pages you need as you read through the book. When you finish with one
page, you can put it away and grab the next page you need.
In a computer system, the book represents the entire program, and the pages
are parts of the program called “pages” of memory. Demand paging works similarly:
instead of loading the whole program into the computer’s memory at once (which can
be very large and take up a lot of space), the operating system only loads the
necessary parts (pages) of the program when they are needed.
This concept says that we should not load any pages into the main memory
until we need them, or keep all pages in secondary memory until we need them.

• Demand paging guarantees that the system brings into primary memory only
those pages that processes actually need. It involves interaction between hardware
and software component of the virtual memory.
• Paging with swapping method will become as demand paging concept.
Process's logical address space is stored on the secondary storage device.
• Demand paging requires that the page map table for each process keep track
of each page as it is loaded or removed from primary memory..

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 • When user want to execute a process, user swap a process into a memory.
Lazy swapper is used for swapping the process into memory. Lazy swapper swaps
the pages whenever needed.

Page Replacement algorithms:-

Page replacement algorithms are techniques used in operating systems to manage
memory efficiently when the physical memory is full. When a new page needs to be loaded
into physical memory, and there is no free space, these algorithms determine which existing
page to replace.

If no page frame is free, the virtual memory manager performs a page replacement
operation to replace one of the pages existing in memory with the page whose reference
caused the page fault. It is performed as follows: The virtual memory manager uses a page
replacement algorithm to select one of the pages currently in memory for replacement,
accesses the page table entry of the selected page to mark it as “not present” in memory,
and initiates a page-out operation for it if the modified bit of its page table entry indicates
that it is a dirty page.
Common Page Replacement Techniques
 First In First Out (FIFO)
 Optimal Page replacement
 Least Recently Used (LRU)
 Most Recently Used (MRU)

A. First In First Out (FIFO)

This is the simplest page replacement algorithm. In this algorithm, the operating system
keeps track of all pages in the memory in a queue, the oldest page is in the front of the
queue. When a page needs to be replaced page in the front of the queue is selected for
removal.
Example 1: Consider page reference string 1, 3, 0, 3, 5, 6, 3 with 3-page frames. Find the
number of page faults using FIFO Page Replacement Algorithm.

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 FIFO - Page Replacement
Initially, all slots are empty, so when 1, 3, 0 came they are allocated to the empty slots ---> 3
Page Faults.
when 3 comes, it is already in memory so ---> 0 Page Faults. Then 5 comes, it is not available
in memory, so it replaces the oldest page slot i.e 1. ---> 1 Page Fault. 6 comes, it is also not
available in memory, so it replaces the oldest page slot i.e 3 ---> 1 Page Fault. Finally, when 3
come it is not available, so it replaces 0 1-page fault.

B. Optimal Page Replacement

In this algorithm, pages are replaced which would not be used for the longest duration of
time in the future.
Example: Consider the page references 7, 0, 1, 2, 0, 3, 0, 4, 2, 3, 0, 3, 2, 3 with 4-page frame.
Find number of page fault using Optimal Page Replacement Algorithm.

Optimal Page Replacement

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Initially, all slots are empty, so when 7 0 1 2 are allocated to the empty slots ---> 4 Page faults
0 is already there so ---> 0 Page fault. when 3 came it will take the place of 7 because it is not
used for the longest duration of time in the future---> 1 Page fault. 0 is already there so ---> 0
Page fault. 4 will takes place of 1 ---> 1 Page Fault.

C. Least Recently Used

In this algorithm, page will be replaced which is least recently used.
Example Consider the page reference string 7, 0, 1, 2, 0, 3, 0, 4, 2, 3, 0, 3, 2, 3 with 4-page
frames. Find number of page faults using LRU Page Replacement Algorithm.

Least Recently Used - Page Replacement

Initially, all slots are empty, so when 7 0 1 2 are allocated to the empty slots ---> 4 Page faults
0 is already there so ---> 0 Page fault. when 3 came it will take the place of 7 because it is
least recently used ---> 1 Page fault
0 is already in memory so ---> 0 Page fault.
4 will takes place of 1 ---> 1 Page Fault
Now for the further page reference string ---> 0 Page fault because they are already available
in the memory.

D. Most Recently Used (MRU)

In this algorithm, page will be replaced which has been used recently. Belady's anomaly
can occur in this algorithm.
Example 4: Consider the page reference string 7, 0, 1, 2, 0, 3, 0, 4, 2, 3, 0, 3, 2, 3 with 4-page
frames. Find number of page faults using MRU Page Replacement Algorithm.

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 Most Recently Used - Page Replacement

Initially, all slots are empty, so when 7 0 1 2 are allocated to the empty slots ---> 4 Page
faults
0 is already their so--> 0 page fault
when 3 comes it will take place of 0 because it is most recently used ---> 1 Page fault
when 0 comes it will take place of 3 ---> 1 Page fault
when 4 comes it will take place of 0 ---> 1 Page fault
2 is already in memory so ---> 0 Page fault
when 3 comes it will take place of 2 ---> 1 Page fault
when 0 comes it will take place of 3 ---> 1 Page fault
when 3 comes it will take place of 0 ---> 1 Page fault
when 2 comes it will take place of 3 ---> 1 Page fault
when 3 comes it will take place of 2 ---> 1 Page fault

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Allocation of frames
An important aspect of operating systems, virtual memory is implemented using
demand paging. Demand paging necessitates the development of a page-replacement
algorithm and a frame allocation algorithm. Frame allocation algorithms are used if you
have multiple processes; it helps decide how many frames to allocate to each process. There
are various constraints to the strategies for the allocation of frames:

 You cannot allocate more than the total number of available frames.

 At least a minimum number of frames should be allocated to each process. This

constraint is supported by two reasons. The first reason is, as less number of frames
are allocated, there is an increase in the page fault ratio, decreasing the performance
of the execution of the process. Secondly, there should be enough frames to hold all
the different pages that any single instruction can reference.

Frame allocation algorithms - The two algorithms commonly used to allocate frames to a
process are:

1. Equal allocation: In a system with x frames and y processes, each process gets equal
number of frames, i.e. x/y. For instance, if the system has 48 frames and 9 processes,
each process will get 5 frames. The three frames which are not allocated to any
process can be used as a free-frame buffer pool.

 Disadvantage: In systems with processes of varying sizes, it does not make

much sense to give each process equal frames. Allocation of a large number of
frames to a small process will eventually lead to the wastage of a large number
of allocated unused frames.

2. Proportional allocation: Frames are allocated to each process according to the

process size. For a process pi of size si, the number of allocated frames is ai =
(si/S)*m, where S is the sum of the sizes of all the processes and m is the number of
frames in the system. For instance, in a system with 62 frames, if there is a process of
10KB and another process of 127KB, then the first process will be allocated
(10/137)*62 = 4 frames and the other process will get (127/137)*62 = 57 frames.

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Thrashing :-
Thrashing is a condition or a situation when the system is spending a major portion of its
time servicing the page faults, but the actual processing done is very negligible.

Causes of thrashing:

1. High degree of multiprogramming.

2. Lack of frames.

3. Page replacement policy.

Thrashing's Causes

Thrashing has an impact on the operating system's execution performance. Thrashing also
causes serious performance issues with the operating system. When the CPU's usage is low,
the process scheduling mechanism tries to load multiple processes into memory at the
same time, increasing the degree of Multi programming.

In this case, the number of processes in the memory exceeds the number of frames
available in the memory. Each process is given a set number of frames to work with.

Thrashing occurs when a system spends more time swapping pages in and out of memory
than executing processes, leading to a significant drop in performance. Learning techniques
to handle thrashing is crucial for optimizing system performance.

If a high-priority process arrives in memory and the frame is not vacant at the moment, the
other process occupying the frame will be moved to secondary storage, and the free frame
will be allotted to a higher-priority process.

We may also argue that as soon as the memory is full, the procedure begins to take a long
time to swap in the required pages. Because most of the processes are waiting for pages, the
CPU utilization drops again.

As a result, a high level of multi programming and a lack of frames are two of the most
common reasons for thrashing in the operating system.

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The basic concept involved is that if a process is allocated to few frames, then there will be
too many and too frequent page faults. As a result, no useful work would be done by the
CPU and the CPU utilization would fall drastically. The long-term scheduler would then try
to improve the CPU utilization by loading some more processes into the memory thereby
increasing the degree of multi programming. This would result in a further decrease in the
CPU utilization triggering a chained reaction of higher page faults followed by an increase in
the degree of multi programming, called Thrashing.

Locality Model -
A locality is a set of pages that are actively used together. The locality model states that as a
process executes, it moves from one locality to another. A program is generally composed of
several different localities which may overlap.

For example, when a function is called, it defines a new locality where memory references
are made to the instructions of the function call, it's local and global variables, etc. Similarly,
when the function is exited, the process leaves this locality.

Input/Output (I/O) operations are how a computer communicates with external devices
such as hard drives, keyboards, printers, and network interfaces. These operations involve
transferring data into and out of the system whether it’s reading a file, saving a document,
printing, or sending data over a network.

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Since I/O devices are much slower than the CPU, efficient management of I/O requests is
crucial. This is where I/O Scheduling Algorithms come in. These algorithms determine the
order in which I/O requests are handled to improve system performance, reduce wait
times, and ensure fairness among processes. Common algorithms include FCFS (First-Come-
First-Serve), SSTF (Shortest Seek Time First), and SCAN.

I/O Management
In simple terms, I/O (Input/Output) refers to the communication between a computer
system and the outside world. This could be:

 Reading a file from a hard drive

 Saving a document

 Printing a page

 Transferring data over a network

 Using a keyboard or mouse

How I/O Operations Are Performed

I/O operations involve communication between the CPU and external devices like hard
drives, keyboards, and printers. These operations are managed by the operating system,
device drivers, and other system programs. Following are the steps involved in I/O
Operations:

1. I/O Request Initiation: When a user or program requests an I/O operation (like opening
a file), the OS communicates with the device driver to handle the request.

2. I/O Traffic Controller: The I/O Traffic Controller keeps track of the status of all devices,
control units, and communication channels. It ensures that devices are ready and available
to handle the request.

3. I/O Scheduler: The I/O Scheduler determines the order in which I/O requests are
processed. It manages access to devices based on priority, fairness, and availability to
optimize system performance.

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4. I/O Device Handler: The I/O Device Handler manages device interrupts and oversees
the data transfer. It ensures that data is transferred between the device and memory (or
CPU) properly.

5. Completion and Notification: Once the I/O operation is complete, the OS informs the
program or user that the task is finished.

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Principles of I/O Hardware

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Disk structure
Hard Disk is a secondary storage device. It is a type of electro mechanical
device. A hard disk stores and retrieves digital data using magnetic storage. Disk is
rigid rapidly rotating platters coated with magnetic material.
Hard Disk Pack consist of more than one disk.
How Data is Stored in a Hard Disk ?
● Data is stored in Disk in form of tracks and sectors.
● Disk surface is divided in to tracks.
● Track is further dived in to sectors.
● Sector is the addressable unit in disk.
Basic picture for disk storage concept is given below.

Disk Structure in OS
Disk structure is as shown in following figure

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Step wise description of Disk Structure is given below
● Disk surface divided into tracks
● A read/write had positioned just above the disk surface
● Fixed had disk
● Moving had disk
● Information stored by magnetic recording on the track under read/write had
● Designed for large amount of storage
● Primary design consideration cost, size, and spееd
Hardwar for disk system
● Disk drive, Duvic motor, Read/write had, Associated logic
Disk controller
● Determines the logical interaction with the computer
● Can service more than on drive (overlapped skis)
Cylinder
● The same numbered tracks on all the disk surfaces
● Each track contains bеtwееn 8 to 32 sectors

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 Sector
● Smallest unit of information that can be read from/written into disk
● Rang from 32 bytes to 4096 bytes
Disk Performance Parameters
Some important parameters used to measure the performance of hard disk are
as follow Sееk time
● Seek Time is time required by read/write hеad to movе to rеquеstеd track
● Includеs thе initial startup timе and thе timе rеquirеd to travеrsе thе tracks
to bе crossеd oncе thе accеss arm is up to spееd.
Latеncy or rotational dеlay
● Timе rеquirеd for thе rеquеstеd sеctor to comе undеr thе rеad/writе hеad.
● Rotational delay is generally the half of the time taken in one rotation.

Disk scheduling algorithms

Disk scheduling algorithms are crucial in managing how data is read from
and written to a computer's hard disk. These algorithms help determine the order in
which disk read and write requests are processed, significantly impacting the speed
and efficiency of data access. Common disk scheduling methods include First-Come,
First-Served (FCFS), Shortest Seek Time First (SSTF), SCAN, C-SCAN, LOOK, and C-
LOOK. By understanding and implementing these algorithms, we can optimize system
performance and ensure faster data retrieval.
 Disk scheduling is a technique operating systems use to manage the order in which
disk I/O (input/output) requests are processed.
 Disk scheduling is also known as I/O Scheduling.
 The main goals of disk scheduling are to optimize the performance of disk operations,
reduce the time it takes to access data and improve overall system efficiency.
In this article, we will explore the different types of disk scheduling algorithms
and their functions. By understanding and implementing these algorithms, we can
optimize system performance and ensure faster data retrieval.
Importance of Disk Scheduling in Operating System
 Multiple I/O requests may arrive by different processes and only one I/O request can
be served at a time by the disk controller. Thus other I/O requests need to wait in the
waiting queue and need to be scheduled.
 Two or more requests may be far from each other so this can result in greater disk
arm movement.
 Hard drives are one of the slowest parts of the computer system and thus need to be
accessed in an efficient manner.
Key Terms Associated with Disk Scheduling
 Seek Time: Seek time is the time taken to locate the disk arm to a specified track
where the data is to be read or written. So the disk scheduling algorithm that gives a
minimum average seek time is better.
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 Rotational Latency: Rotational Latency is the time taken by the desired sector of the
disk to rotate into a position so that it can access the read/write heads. So the disk
scheduling algorithm that gives minimum rotational latency is better.
 Transfer Time: Transfer time is the time to transfer the data. It depends on the
rotating speed of the disk and the number of bytes to be transferred.
 Disk Access Time:
Disk Access Time = Seek Time + Rotational Latency + Transfer Time
Total Seek Time = Total head Movement * Seek Time

Disk Access Time and Disk Response Time

 Disk Response Time: Response Time is the average time spent by a request waiting
to perform its I/O operation. The average Response time is the response time of all
requests. Variance Response Time is the measure of how individual requests are
serviced with respect to average response time. So the disk scheduling algorithm that
gives minimum variance response time is better.

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