The 2024 IEEE 74th

Electronic Components
and Technology Conference
May 28 – 31, 2024

2024 Advance Program

Gaylord Rockies Resort & Convention Center
Denver, Colorado, USA

Sponsored by

For more information visit [Link]

 INTRODUCTION FROM THE IEEE 74TH ECTC PROGRAM CHAIR MICHAEL MAYER
The 2024 IEEE 74th Electronic Components and Technology Conference (ECTC)
at the Gaylord Rockies Resort & Convention Center, Denver Colorado • May 28 - 31, 2024
On behalf of the Program Committee and On the morning of Wednesday, May 29, 2024, ECTC’s keynote presentation
Executive Committee, it is my pleasure to invite on Petascale photonic chip connectivity for energy-efficient AI computing
you to IEEE’s 74th Electronic Components and is scheduled, presented by Prof. Keren Bergman (Columbia University) and
Technology Conference (ECTC), which will be invited by Karlheinz Bock (TU Dresden), the conference’s General Chair.
held at the Gaylord Rockies Resort & Convention Additionally, a Diversity and Career Growth Panel and Reception on May 29,
Center, Denver, Colorado, from May 28 to 2024, from 6:30 p.m. to 7:30 p.m., chaired by Cristina Amon (University of
31, 2024. This premier international annual Toronto) for ITherm and Vidya Jarayam (Intel) for ECTC. A Plenary Session
conference, sponsored by the IEEE Electronics on the Future of Semiconductor Industry is planned for Thursday, May 30,
Packaging Society (EPS), brings together key 2024, from 8:00 a.m. to 9:15 a.m., chaired by Rozalia Beica (Averatek) and
stakeholders of the global microelectronic Farhang Yazdani (BroadPak). A panel session on Workforce Challenges
packaging industry, such as semiconductor and in Education and Workforce Development in the New Chips Economy,
electronics manufacturing companies, design organized by the IEEE EPS President, includes chairs Patrick Thompson
houses, semiconductor foundry and assembly/testing service providers, (Texas Instruments), Mark Poliks (Binghamton University), Jeff Suhling
substrate makers, equipment manufacturers, material suppliers, research (Auburn University), and Kitty Pearsall (Boss Precision Inc.).
institutions, universities, and investors, all under one roof. More than 1600 Supplementing the technical program, ECTC also offers Professional
people attended the fully in-person ECTC 2023, and this year we plan for a Development Courses (PDCs) and ECTC Exhibits. Co-located with the IEEE
solely in-person conference again. ITherm Conference, the 74th ECTC will offer 16 CEU-approved PDCs,
At the 74th ECTC, 375+ technical papers will be presented across 36 organized by Kitty Pearsall and Jeffrey Suhling. The PDCs take place on
oral sessions and 5 interactive presentation sessions. Key topics include Tuesday, May 28th and are taught by distinguished experts in their respective
advancements in packaging technologies, heterogeneous integration, systems fields.
design (Sessions 1, 7), and next-generation substrate manufacturing (Session The Exhibits at ECTC run from Wednesday May 29th to Thursday May
13). Reliability aspects will cover advanced substrates, high-density packages, 30th and showcase the latest technologies and products offered by leading
and harsh environment reliability (Sessions 4, 16, 29, 35). Topics in assembly companies in the electronic components, materials, packaging, and services
and manufacturing technology include 3D integration, bonding, and die fields. More than one hundred exhibiting companies will be present
bond/board-level reliability (Sessions 10, 23, 27). Topics about RF, high- Wednesday and Thursday starting at 9 a.m. ECTC also offers attendees
speed components and systems include antenna-in-package design, signal numerous opportunities for networking and discussion with colleagues during
integrity, and chiplet interconnect validation (Sessions 18, 22, 26). Emerging coffee breaks, daily luncheons, and nightly receptions.
technologies topics include digital healthcare, AI, quantum computing,
and additive manufacturing for printed electronics (Sessions 5, 11, 17). Whether you are an engineer, a manager, a student, or an executive, ECTC
Interconnection technology sessions cover topics like die-to-wafer hybrid offers something unique for everyone in the microelectronics packaging and
bonding, ultra-fine pitch technologies, and copper hybrid bonding (Sessions components industry. I invite you to make your plans now to join us for the
2, 8, 14, 32). Materials and processing topics include advanced processes for 74th ECTC and to be a part of all the exciting technical and professional
chip stacking, hybrid bonding materials, polymer packaging innovations, and opportunities.
fine-pitch materials/processes (Sessions 9, 15, 21, 33). Thermal/mechanical I want to thank our sponsors, exhibitors, authors, speakers, PDC instructors,
simulation and characterization topics include reliability simulations, AI in session chairs, and program committee members, as well as all the volunteers
modeling, advances in flex and redistribution layer technologies, process/ who help make the 74th ECTC a success. I look forward to meeting you at
hybrid bonding modeling, and thermal management solutions (Sessions the Gaylord Rockies Resort & Convention Center, Denver, Colorado, from
6, 12, 24, 30, 36). Photonics topics include co-packaged optics, optical May 28 to 31, 2024.
interconnections, and photonics integration, materials, and processes
(Sessions 3, 28, 34). Interactive presentations (Sessions 37-41) include Michael Mayer
innovations in bonding, power delivery systems, optimization algorithms, 74th ECTC Program Chair
packaging for specific semiconductor devices, and reliability assessments. The Email: mmayer@[Link]
74th ECTC offers a platform for exploring cutting-edge microelectronic
packaging advancements, fostering innovation, and addressing critical
challenges. Index
The ECTC this year presents seven special sessions with industry experts, ECTC Registration ................................................................................... 3, 31, 32
including five on Tuesday, each lasting 90 minutes. One session, chaired General Information ..................................................................................................3
by Przemyslaw Gromala (Robert Bosch GmbH) and Erik Jung (Fraunhofer Hotel Information ...............................................................................................3, 31
IZM), delves into Industry-Government Co-Investments for the Advanced
Electronics Sector globally. Another, chaired by Ran Tao (NIST) and Benson
Conference Overview ..............................................................................................4
Chan (Binghamton University), focuses on advancing metrology for next- Tuesday Special Sessions .........................................................................................4
generation microelectronics. An afternoon session on Thermal Management Conference Panel Sessions................................................................................5, 6
for AI, chaired by Zhi Yang (Groq) and Sevket Yuruker (Tesla), explores ECTC Morning Keynote Speaker.......................................................................5
innovative solutions for power-hungry AI/ML applications. Following that, an
RF Packaging session above 100 GHz, chaired by Maciej Wojnowski (Infineon
2024 IEEE EPS Seminar.............................................................................................5
Technologies AG) and Ivan Ndip (Fraunhofer IZM/Brandenburg University Luncheons and Evening Receptions .................................................................6
of Technology), is scheduled. Additionally, a Young Professionals Networking Executive and Program Committees ......................................................... 7-8
Event on May 28, 2024, from 7:00 p.m. to 7:45 p.m., chaired by Aakrati Jain Professional Development Courses .........................................................9-14
(IBM), and an IEEE EPS Seminar on Substrates for Chiplets on the same day
Area Attractions ...................................................................................................... 14
from 7:45 p.m. to 9:15 p.m., chaired by Takashi Hisada and Yasumitsu Orii
(Rapidus Corporation), are scheduled for Tuesday. Program Sessions ..............................................................................................15-30
2024 ECTC Exhibition ..........................................................................................31

2
 74th ECTC ADVANCE REGISTRATION

Advance Registration Hotel Accommodations

Online registration is available at [Link]. For more Rooms for ECTC attendees have been reserved at the Gaylord
information on registration rates, terms, and conditions, Rockies Resort & Convention Center. The special conference rate for
see page 32. a single/double occupancy room is:
Register early … save US $150 or more! All registrations received after US $229.00 per night
May 3, 2024, will be considered Door Registrations. Those who register
This price includes single or double occupancy in one room.
in advance can pick up their registration packets at the ECTC
Registration Desk in the Square Area, near the Cocoa Bean coffee shop. Please note these rooms are on a first come, first serve basis. If the
conference rate is no longer available, attendees will be offered the
On-Site Registration Schedule next best price available.
Registration will be held in the Rockies Square Area on the lobby level. Room reservations must be made directly with the hotel by May 3,
Monday, May 27, 2024 3:00 p.m. – 6:00 p.m. 2024, and before rooms run out, to ensure our preferred conference
Tuesday, May 28, 2024 6:45 a.m. – 7:45 p.m.* rate. All reservations made after the cutoff date of May 3, 2024 at
*6:45 a.m. – 8:00 a.m.: Morning PDCs & morning ECTC Special Session only 5 p.m. Mountain Time are accepted on a space and rate availability
Wednesday, May 29, 2024 6:45 a.m. – 4:00 p.m. basis. If you need to cancel a reservation, please do so by 5
Thursday, May 30, 2024 7:30 a.m. – 4:00 p.m. p.m. Mountain Time, AT LEAST 5 days prior to arrival for a
Friday, May 31, 2024 7:30 a.m. – 12:00 Noon full refund. Check-in time: 4 p.m. Check-out time: 11 a.m.
The above schedule for Tuesday will be rigorously enforced to
prevent students from being late for their courses. Note about Hotel Rooms
Attendees should note that only reputable sites should be used to
General Information
book a hotel room for the 2024 ECTC. Be advised that you may
Conference organizers reserve the right to cancel or change the receive emails about booking a hotel room for ECTC 2024 from
program without prior notice. The Gaylord Rockies Resort & 3rd party companies. These emails and sites are not to be trusted.
Convention Center, as well as the ECTC, are both smoke free There are scam artists out there and if it’s too good to be true it
environments.
likely is. The only formal communication ECTC will convey about
hotel rooms will come in the form of ECTC emailings to subscribers
ITherm 2024
or ECTC emails from our Executive Committee. ECTC’s only
ITherm is co-located with ECTC! All ITherm sessions and exhibits take authorized site for reserving a room is through our website (www.
place in the Gaylord Rockies Resort & Convention Center. For more [Link]). However, you may use other trusted sites to book travel.
information about ITherm 2024 please visit [Link]. Should you have any questions about booking a hotel room please
contact ECTC staff at lrenzi@[Link].
Loss Due to Theft
Conference management is not responsible for loss or theft of
Transportation Services
personal belongings. Security for each individual’s belongings is the
individual’s responsibility. There is no complimentary transportation to and from the hotel
and airport. All attendees must make their own transportation
ECTC Sponsors arrangements.
With over seven decades of history and experience behind us, ECTC
is recognized as the premier semiconductor packaging conference
and offers an unparalleled opportunity to build relationships with
more than 1,500 individuals and organizations committed to driving
innovation in semiconductor packaging.
We have a limited number of sponsorship opportunities in a variety
of packages to help get your message out to attendees. These include
Platinum, Gold, Silver, Program, and several other sponsorship
options that can be customized to your company’s interest. If you
would like to enhance your presence at ECTC and increase your
impact with a sponsorship, please take a look at our sponsorship
brochure on the website [Link] under “Sponsors”.
To sign-up for sponsorship or to get more details, please contact
Alan Huffman at [Link]@[Link] or +1-336-380-5124.
3
 74th ECTC CONFERENCE OVERVIEW

2024 ECTC Special Session on 2024 ECTC Special Session on

Industry-Government Co-InvestmentsI Thermal Management for AI
Exploring the Impact of Industry-Government Efficient and Innovative Thermal Management for
Co-Investments for the Advanced Electronics Sector in Power Hungry AI/ML Applications: Challenges and
North America, Asia and Europe Opportunities
Tuesday, May 28, 2024, 8:30 a.m. – 10:00 a.m. Tuesday, May 28, 2025, 1:30 p.m. – 3:00 p.m.
Chairs: Przemyslaw Gromala, Robert Bosch GmbH and Erik Jung, Chairs: Zhi Yang, Groq and Sevket Yuruker, Tesla
Fraunhofer IZM
The rapid advancement
Essential to the of artificial intelligence
global economy and (AI) and machine learning
innovation landscape, (ML) technologies has
the semiconductor led to the proliferation
and microelectronics of high-power AI/ML
packaging industries are applications in various
seeing government led domains, such as
investment programs. autonomous vehicles,
The introduction of high performance
the CHIPS and Science computing and natural
Act (Creating Helpful language processing. However, this growth is accompanied by escalating thermal
Incentives to Produce Semiconductors for America) in the United States has challenges that can critically impact the performance, reliability, and lifespan of
been inspiring similar programs, e.g. in Europe the European Chips Act. entire systems. The non-uniform distribution of heat sources on AI/ML hardware
further complicates cooling strategies. Moreover, the reliance on traditional
Speakers in this special session discuss programs and co-investments for
thermal management techniques may prove inadequate in addressing emergent
the United States, Europe, India and East Asia, including job creation, supply
challenges.
chain resilience, and enhanced technological innovation. We will examine
the prospects of global collaborations and partnerships between national To address these challenges, several industry and academia experts are discussing
semiconductor and microelectronic packaging centers and industry leaders. the current status and opportunities for innovative thermal management
The session will also discuss mechanisms for knowledge exchange, joint developments/ methodologies in this special session.
research initiatives, and mutually beneficial outcomes. PKi Wook Jung, Samsung; Igor Arsovski, Groq; Mudasir Ahmad, Google; Tiwei Wei,
Elisabeth Steimetz, EPoSS, Europe; Rao Tummala, Advisor to the Government Purdue University; Christopher Ortiz, Ansys
of India; Subramanian S. Iyer, National Advanced Packaging Manufacturing
Program, USA; Gordon Harling, CMC Microsystems, Canada; Kwang-Seong Choi,
Electronics and Telecommunications Research Institute, Korea
2024 ECTC Special Session RF Packaging
for Above 100 GHz
2024 ECTC Special Session on Metrology RF Packaging for Communication and Sensing
Challenges and Opportunities in Advancing Metrology Applications above 100 GHz – Technologies, Design
for Next-Generation Microelectronics Challenges and Emerging Solutions
Tuesday, May 28, 2024, 10:30 a.m. – 12:00 p.m. Tuesday, May 28, 2024, 3:30 p.m. – 5:00 p.m.
Chairs: Ran Tao, NIST and Benson Chan, Binghamton University Maciej Wojnowski, Infineon Technologies AG and Ivan Ndip,
Fraunhofer IZM/Brandenburg University of Technology
Metrology plays
a pivotal role in In this session, experts
semiconductor research from industry and
and manufacturing academia will present
and is critical to the the latest developments
success of this industry. in RF packaging for
Advancements communication and radar
in measurement sensing applications above
science, material 100 GHz. The panel will
characterization, begin with a presentation
instrumentation, of emerging applications,
testing, and manufacturing capabilities are critically needed to drive product resulting challenges
innovation and ensure quality, yield, and manufacturing efficiency. During the and opportunities for
panel discussion, experts will share their insights on the metrology challenges RF packaging. The experts will share the latest developments in RF packaging
and opportunities that today’s semiconductor industry is facing across every materials and technologies. Emerging RF system integration platforms will be
segment of the supply chain, with a focus on advanced semiconductor presented, stressing the importance of material characterization and modeling
packaging for next-generation microelectronics (e.g., heterogeneous integration, as well as co-design and co-simulation techniques. The panel will conclude
wafer level packaging, hybrid bonding, etc.). with examples of recent R&D results for novel D-band waveguide interfaces
in packages for 6G data links over plastic microwave fiber (PMF), antennas-in-
Marla Dowell, NIST; Gaurang Choksi, Intel Corporation; Zhihua Zou, TSMC; package (AiP) and phased array front-end AiP modules.
Chet Lenox, KLA Corporation
Swaminathan Sankaran, Texas Instruments; Martin Letz, Schott AG;
Alberto Valdes-Garcia, IBM Research; Madhavan Swaminathan, Penn State University;
Uwe Maass, Fraunhofer IZM
4
 2024 ECTC Heterogeneous Integration Roadmap (HIR) 2024 Keynote Speaker
Workshop Petascale Photonic Chip Connectivity for Energy
Four Technical Sessions, spanning morning and afternoon of Efficient AI Computing
Tuesday, May 28, 2024 Wednesday, May 29, 2024, 8:00 a.m. – 9:15 a.m.
Chairs: Ravi Mahajan, Intel Corporation and William Chen, ASE
Prof. Keren Bergman, Columbia University
• Engineering Chiplets for
the AI Era High-performance data centers are increasingly
• Challenges and bottlenecked by the energy and communications
Innovations in Thermal costs of interconnecting numerous compute
Engineering from Fan-out and memory resources. Current systems face a
to 2.5D and 3D Stacking gap of nearly two orders of magnitude between
• Packaging Challenges on-chip, intra-socket, communication capacities,
and Innovation for Future and the capacities of links transporting data over
Communication Systems longer distances. The per bit energy cost of data
• Chip Acts’ Roundtable movement dominates that of data processing, as
Chat does density, throughput, and latency. Integrated
silicon photonics offer the opportunity of optical
connectivity that delivers high off-chip communication bandwidth densities
2024 ECTC Young Professionals Networking Event with low power consumption. To realize these benefits deeply embedded
Tuesday, May 28, 2024, 7:00 p.m. – 7:45 p.m.
packaging of photonics with the compute and memory is critical. This talk
will cover these multi-chip packaging challenges as well as approaches for
Chair: Aakrati Jain, IBM
leveraging dense wavelength-division multiplexing photonic IO that can scale
Join us for an invaluable opportunity to connect to realize Petabit/s chip escape bandwidths with sub-picojoule/bit energy
with industry leaders and fellow emerging talents! consumption.
Tailored specifically for young professionals,
including current graduate students, this event
is crafted with your needs in mind. Engage in
dynamic interactions with senior EPS members
and professionals through a series of active and
engaging activities. Seize the chance to delve
deeper into packaging-related topics, pose career 2024 ECTC/ITherm Diversity and Career
questions, and connect with industry professionals
for a valuable learning experience. Growth Panel and Reception Wednesday
Effective Practices to Attract, Promote and Retain a
2024 IEEE EPS Seminar on Substrates for Chiplets Diverse Workforce
Wednesday, May 29, 2024, 6:30 p.m. – 7:30 p.m.
Substrate-Scaling Challenges in Chiplet Integration
Chairs: Cristina Amon, University of Toronto / ITherm and
Tuesday, May 28, 2024, 7:45 p.m. – 9:15 p.m. Vidya Jarayam, Intel / ECTC
Chairs: Takashi Hisada, Rapidus Corporation and Yasumitsu Orii, Semiconductor,
Rapidus Corporation electronic packaging
Chiplet is driving and energy-related
performance scaling companies are
and cost efficiency of planning to grow
advanced semiconductor their workforces to
systems. There are meet the current and
difficult challenges for expected demands due
the substrates in chiplet to policy incentives and
integration such as domestic investments,
very large size of the including the CHIPS
substrates, fine line and Act. To achieve
space ground rule with business and economic success, we will need to attract a broader group of
multiple layers, mechanical stress, reliability, and complexity of design. students to the relevant fields and expand beyond the traditional pool of
candidates to include women and underrepresented minorities from rural
The EPS Seminar organized by TC6 (High-Density Substrate and Board) will candidates to veterans and mid-career retrainees. This panel will focus on
discuss technical and business challenges of chiplet on large substrates. We how best practices in Diversity, Equity and Inclusion have been implemented
will have 7 panelists, and each panelist will give a short talk presenting insights and can be used to attract students and hire, develop, promote and retain
on technology trends, technical challenges, application requirements, recent employees within organizations to meet their goals.
technical updates and more covering package form factors, design tools,
materials, manufacturing tools, and assembly processes for advanced chiplet The panelists will introduce some of the challenges faced by women,
integration, followed by a panel discussion. minorities , and underrepresented groups, as well as share their
organization’s strategies for professional development, promotion, retention,
Gang Duan, Intel; Kinya Ichikawa, TSMC; Kenneth Larsen, Synopsys; Masahisa Ose, and success. This will be followed by an interactive Q&A with the audience.
Resonac; Jeff Turner, AMAT; Yu-Po Wang, SPIL; Rozalia Beica, Averatek
After the panel session, a social and networking reception will be held. All
ECTC and ITherm attendees are invited to join in on this engaging discussion
and the reception afterwards.
Kylie Patterson, NIST-CHIPS Program Office; Allyson Stewart, Marvell Inc.;
Al Ortega, Villanova University; Arron Gregory, NREL

These sessions are open to all conference attendees.

5
 2024 ECTC Plenary Session on Luncheons
Future of Semiconductor Industry
ECTC will be offering a daily luncheon (Tuesday – Friday)
The Future of Semiconductor Industry. Emerging Start- for all attendees registered for the full conference. Lunch
ups and Material Innovations in Advanced Packaging tickets, found in your registration badge holder, must be
Thursday, May 30, 2024, 8:00 a.m. – 9:15 a.m. presented for entrance into the lunch room. Lost lunch
Chairs: Rozalia Beica, Averatek and Farhang Yazdani, BroadPak tickets will cost $100 to replace. Please come and enjoy
Styled as a start-up time with other attendees and colleagues in the industry!
competition, this Lunch times will vary, see below for specific details for
session looks at next each day.
generation materials
and companies. Tuesday: 12:00 Noon – 1:15 p.m.
It features presentations Wednesday: 12:45 p.m. – 2:00 p.m.
from start-up Thursday: 12:45 p.m. – 2:00 p.m. – Sponsored
companies and by: The IEEE Electronics Packaging
reviewed by a panel
Society (EPS)
of judges from the
industry and investment Friday: 12:45 p.m. – 2:00 p.m. – Don’t miss
community. Topics include Materials & Processes for MicroLED and out on this lunch! We will be raffling
System-In-Package, Thermal Management, Dielectrics & Metallization for off a number of prizes including
High End IC Substrates a hotel stay, free conference
Victor Chiriac, Global Cooling Technology Solutions; Wayne Rickard, Terecircuits; registrations, and many industry
Stefan Prastine, Thintronics; Mohsen Asad, Hyperloom gadgets!

2024 IEEE EPS President’s Panel Session

General Chair’s Speakers Reception
on Workforce
Challenges in Education and Workforce Development in Tuesday, May 28, 2024 • 6:00 p.m. – 7:00 p.m.
the New Chips Economy (by invitation only)
Friday, May 31, 2024, 8:00 a.m. – 9:15 a.m.
ECTC Student Reception
Chairs: Patrick Thompson, Texas Instruments, Mark Poliks,
Binghamton University, Jeff Suhling, Auburn University and Kitty Tuesday, May 28, 2024 • 5:00 p.m. – 6:00 p.m.
Pearsall, Boss Precision Inc.
Hosted by Texas Instruments, Inc.
The semiconductor and
packaging industries are
currently experiencing
unparalleled growth,
driven by demand in areas Students, have you ever wondered what career opportunities
such as AI, transportation
electrification, digital exist in the industry and how you could use your technical
manufacturing, data skills and innovative talent? If so, you are invited to attend
centers, mobile devices, the ECTC Student Reception, where you will have the
hybrid flexible electronics,
virtual reality, and
opportunity to talk to industry professionals about what
photonics and MEMS. helped them be successful in their first job search and reach
This expansion has their current positions. You will have the chance to enjoy good
prompted substantial food and network with industry leaders and achievers. Don’t
global investments in
new fabs and packaging miss the opportunity to interact with people that you might
infrastructure, supported not have the chance to meet otherwise!
by government spending
in North America, Exhibitor Reception
Europe, and Asia.
Wednesday, May 29, 2024 • 5:30 p.m. – 6:30 p.m.
However, the parallel
surge in demand for Open to all conference attendees.
skilled labor poses a considerable challenge, with estimates indicating a
threefold increase in headcount required over the next five years. The 74th ECTC Gala Reception
industry is seeking individuals with multidisciplinary education, ranging from
technician degrees to Ph.D. degrees. The panel will explore workforce Thursday, May 30, 2024 • 6:30 p.m.
needs, industry perspectives on student preparation, global approaches to Hosted by Koh Young Technology
electronics packaging education, and innovative strategies to attract students
to the semiconductor packaging field.
John Oakley, Semiconductor Research Corporation; Toni Mattila, Business Finland;
Robert Geer, SUNY Polytechnic University: Wenhui Zhu, Central South University:
Jim Wieser, Texas Instruments All badged attendees and their guests are invited to attend
a reception hosted by Gala Reception sponsors.

6
Executive Committee S. B. Park Isaac Robin Abothu Yoshihisa Kagawa
Chair Binghamton University Siemens Healthineers Sony
Karlheinz Bock sbpark@[Link] [Link]@[Link] [Link]@[Link]
TU Dresden
[Link]@[Link] Scott Savage Karlheinz Bock Seung Yeop Kook
Medtronic Microelectronics Center TU Dresden GlobalFoundries
Vice-General Chair [Link]@[Link] [Link]@[Link] [Link]@[Link]
Florian Herrault
PseudolithIC, Inc. Christian Schmidt Xinpei Cao Kangwook Lee
floherrault@[Link] NVIDIA Corporation Henkel Corporation SK Hynix
christians@[Link] [Link]@[Link] [Link]@[Link]
Program Chair
Michael Mayer Jeffrey Suhling Benson Chan Li Li
University of Waterloo Auburn University Binghamton University Infinera
mmayer@[Link] jsuhling@[Link] chanb@[Link] packaging@[Link]

Assistant Program Chair Paul Tiner Vaidyanathan Chelakara Changqing Liu

Przemyslaw Gromala Texas Instruments Cisco Loughborough University
Robert Bosch GmbH p-tiner@[Link] cvaidy@[Link] [Link]@[Link]
pgromala@[Link] Rabindra N. Das Wei-Chung Lo
Pei-Haw Tsao
Jr. Past General Chair Mediatek MIT Lincoln Labs ITRI, Industrial Technology Research Institute
Ibrahim Guven [Link]@[Link] [Link]@[Link] lo@[Link]
Virginia Commonwealth University Dongming He Nathan Lower
iguven@[Link] Dongji Xie
NVIDIA Corporation Qualcomm Technologies, Inc. Consultant
Sr. Past General Chair ECTC dongjix@[Link] dhe@[Link] nplower@[Link]
Rozalia Beica Florian Herrault James Lu
Averatek Assembly & Manufacturing Technology
Chair PseudolithIC, Inc Rensselaer Polytechnic Institute
[Link]@[Link] floherrault@[Link] luj@[Link]
Habib Hichri
Sponsorship Chair Ajinomoto Fine-Techno USA Corporation Jae-Woong Jeong Vempati Srinivasa Rao
Alan Huffman hichrih@[Link] KAIST IME A-star
SkyWater Technology jjeong1@[Link] vempati@[Link]
[Link]@[Link] Assistant Chair
Ralph Zoberbier Hee Seok Kim Katsuyuki Sakuma
Finance Chair Evatec AG University of Washington Tacoma IBM Research
Patrick Thompson [Link]@[Link] heeskim@[Link] ksakuma@[Link]
Texas Instruments, Inc.
[Link]@[Link] Sai Ankireddi Jong-Hoon Kim Jean-Charles Souriau
Maxim Integrated Washington State University Vancouver CEA Leti
Publications Chair [Link]@[Link] [Link]@[Link] jcsouriau@[Link]
Henning Braunisch Christo Bojkov
Intel Corporation Qorvo Ramakrishna Kotlanka Chuan Seng Tan
braunisch@[Link] [Link]@[Link] Analog Devices Nanyang Technological University
[Link]@[Link] tancs@[Link]
Publicity Chair Pascale Gagnon
Eric Perfecto IBM Canada Santosh Kudtarkar Chih-Hang Tung
IBM Research pgagnon@[Link] Analog Devices Taiwan Semiconductor Manufacturing Company
[Link]@[Link] [Link]@[Link] chtungc@[Link]
Mark Gerber
Treasurer Advanced Semiconductor Engineering, Inc. Kevin J. Lee Tiwei Wei
Tom Reynolds [Link]@[Link] Qorvo Corporation Purdue University
T3 Group LLC [Link]@[Link] tiwei@[Link]
[Link]@[Link] Omkar Gupte
AMD Yang Liu Matthew Yao
Exhibits Chair [Link]@[Link] Nokia Bell Labs GE Aerospace
Sam Karikalan yang3d@[Link] [Link]@[Link]
Broadcom Limited Paul Houston
samkarikalan@[Link] Engent Chukwudi Okoro Dingyou Zhang
[Link]@[Link] Corning Broadcom Inc.
IT Coordinator OkoroC@[Link] [Link]@[Link]
Bora Baloglu Li Jiang
Texas Instruments Dishit Parekh Wei Zhou
Intel Corporation Intel Micron
[Link]@[Link] l-jiang1@[Link]
[Link]@[Link] zhouwei@[Link]
Professional Development Course Chair Zia Karim
Yield Engineering Systems C. S. Premachandran Materials & Processing
Kitty Pearsall GlobalFoundries Chair
Boss Precision, Inc. zkarim@[Link]
319prem@[Link] Qianwen Chen
[Link]@[Link] Wei Koh IBM Research
Pacrim Technology Jintang Shang chenq@[Link]
Conference Management Southeast University
Lisa Renzi Ragar kohmail@[Link]
shangjintang@[Link] Assistant Chair
Renzi & Company, Inc. Wenhao (Eric) Li Vidya Jayaram
lrenzi@[Link] Intel Corporation Rohit Sharma Intel Corporation
[Link]@[Link] IIT Ropar [Link]@[Link]
IEEE EPS Representative rohit@[Link]
Annette Teng Venkata Mokkapati Tanja Braun
AIM Photonics AT & S Nancy Stoffel Fraunhofer IZM
ateng@[Link] [Link]@[Link] National Institute of Standards and Technology [Link]@[Link]
nstoffel1194@[Link]
Applied Reliability Jae-Woong Nah Yu-Hua Chen
Chair IBM Corporation Ran Tao Unimicron
Vikas Gupta jnah@[Link] National Institute of Standards and Technology yh_chen@[Link]
ASE US, Inc [Link]@[Link]
[Link]@[Link] Valerie Oberson Jae Kyu Cho
IBM Canada Ltd W. Hong Yeo GlobalFoundries
Assistant Chair Georgia Institute of Technology [Link]@[Link]
Sandy Klengel voberson@[Link]
whyeo@[Link]
Fraunhofer Institute for Microstructure of Materials Jason Rouse Bing Dang
and Systems Hongqing Zhang IBM Corporation
Taiyo America, Inc. IBM Corporation
[Link]@[Link] jhrouse@[Link] dangbing@[Link]
zhangh@[Link]
Seung-Hyun Chae Andy Tseng Yung-Yu Hsu
SK Hynix Interconnections Meta Platforms, Inc.
Qualcomm Technologies, Inc. Chair
[Link]@[Link] andytseng2000@[Link] [Link]@[Link]
Chaoqi Zhang
Tz-Cheng Chiu Jobert Van Eisden Qualcomm Technologies, Inc. Lewis Huang
National Cheng Kung University ATOTECH USA LLC [Link]@[Link] Senju Electronic
tcchiu@[Link] [Link]-Eisden@[Link] lewis@[Link]
Assistant Chair
Darvin R. Edwards Jan Vardaman Ou Li C. Robert Kao
Edwards Enterprise Consulting, LLC TechSearch International Advanced Semiconductor Engineering, Inc. National Taiwan University
darvin.edwards1@[Link] jan@[Link] [Link]@[Link] crkao@[Link]
Deepak Goyal Shaw Fong Wong Jian Cai Alvin Lee
Intel Corporation Intel Corporation Tsinghua University Brewer Science
[Link]@[Link] jamescai@[Link] alee@[Link]
[Link]@[Link]
Nokibul Islam C. Key Chung Yi Li
JCET Group Jin Yang
Samsung Electronics TongFu Microelectronics Co. Ltd. Intel Corporation
[Link]@[Link] chungckey@[Link] [Link]@[Link]
[Link]@[Link]
Tae-Kyu Lee David Danovitch Ziyin Lin
Cisco Systems, Inc. Katie Yu University of Sherbrooke Intel Corporation
taeklee@[Link] NXP [Link]@[Link] [Link]@[Link]
[Link]@[Link]
Pilin Liu Gang Duan Yan Liu
Intel Corporation Cong Zhao Intel Medtronic Inc. USA
[Link]@[Link] Meta [Link]@[Link] [Link]@[Link]
zhaocong@[Link]
Varughese Mathew Bernd Ebersberger Mikel Miller
NXP Semiconductors Emerging Technologies Infineon Technologies Apple Inc.
[Link]@[Link] Chair [Link]@[Link] mikel_miller@[Link]
Zhuo Li
Keith Newman Fudan University Takafumi Fukushima Praveen Pandojirao-S
AMD zhuo_li@[Link] Tohoku University Johnson & Johnson
[Link]@[Link] fukushima@[Link] praveen@[Link]
Assistant Chair
Donna M. Noctor Tengfei Jiang Thom Gregorich Mark Poliks
Nokia University of Central Florida Infinera Binghamton University
[Link]@[Link] [Link]@[Link] tmgregorich@[Link] mpoliks@[Link]
7
 Dwayne Shirley Eric Tremble Charles Nan-Cheng Chen Patrick McCluskey
Marvell Semiconductor, Inc. Marvel Shanghai Jiao Tong University University of Maryland
shirley@[Link] etremble@[Link] [Link]@[Link] mcclupa@[Link]
Ivan Shubin Kuo-Chung Yee Craig Gaw Jiamin Ni
Raytheon Technologies Taiwan Semiconductor Manufacturing Corporation, Inc. NXP Semiconductor IBM
ishubin@[Link] kcyee@[Link] [Link]@[Link] nijiamin8910@[Link]
Bo Song Photonics Abhilash Goyal Erkan Oterkus
HP Inc. Chair Velodyne LIDAR, Inc. University of Strathclyde
[Link]@[Link] Richard Pitwon [Link]@[Link] [Link]@[Link]
Resolute Photonics Ltd
Yoichi Taira [Link]@[Link] Xiaoxiong (Kevin) Gu Suresh K. Sitaraman
Keio University Metawave Georgia Institute of Technology
taira@[Link] Assistant Chair xgu@[Link] [Link]@[Link]
Takaaki Ishigure
Frank Wei Keio University Rockwell Hsu Zhi Yang
DISCO Corporation ishigure@[Link] Cisco Systems, Inc. Groq
frank_w@[Link] rohsu@[Link] zyang@[Link]
Ankur Agrawal
Lingyun (Lucy) Wei Intel Corporation Lih-Tyng Hwang Ning Ye
Dupont [Link]@[Link] National Sun Yat-Sen University Western Digital
[Link]@[Link] Stephane Bernabe FiftyOhm@[Link] [Link]@[Link]
CEA Leti
Kimberly Yess [Link]@[Link] Lianjun Liu G. Q. (Kouchi) Zhang
Brewer Science NXP Semiconductor, Inc. Delft University of Technology (TUD)
kyess@[Link] Surya Bhattacharya [Link]@[Link] [Link]@[Link]
IME
Myung Jin Yim bhattass@[Link] Sungwook Moon Xiaowu Zhang
Apple Inc. Samsung Electronics Institute of Microelectronics (IME)
myung27@[Link] Christopher Bower [Link]@[Link] xiaowu@[Link]
X-Display Company, Inc.
Hongbin Yu chris@[Link] Ivan Ndip Tieyu Zheng
Arizona State University Fraunhofer IZM/Brandenburg University of Technology Microsoft Corporation
yuhb@[Link] Nicolas Boyer (BTU) tizheng@[Link]
Ciena [Link]@[Link]
Zhangming Zhou nboyer@[Link] Jiantao Zheng
Qualcomm P. Markondeya Raj Hisilicon
[Link]@[Link] Mark Earnshaw Florida International University [Link]@[Link]
Nokia mpulugur@[Link]
Packaging Technologies [Link]@[Link] Interactive Presentations
Chair Hideki Sasaki Chair
Jie Fu Gordon Elger Rapidus Corporation Pavel Roy Paladhi
Apple Inc. Technische Hochschule Ingolstadt [Link]@[Link] IBM Corporation
fujie6@[Link] [Link]@[Link] rpaladhi01@[Link]
Li-Cheng Shen
Assistant Chair Z. Rena Huang Assistant Chair
Rensselaer Polytechnic Institute Universal Scientific Industrial Co. Ltd. (USI)
Mike Gallagher li-cheng_shen@[Link] Frank Libsch
DuPont Electronic and Imaging zrhuang@[Link]
IBM
[Link]@[Link] Ajey Jacob Srikrishna Sitaraman libsch@[Link]
University of Southern California (USC) Marvell Technology
Lihong Cao [Link]@[Link] Karan Bhangaonkar
Advanced Semiconductor Engineering, Inc. ajey@[Link]
Intel Corporation
[Link]@[Link] Aditya Jain Manos M. Tentzeris [Link]@[Link]
Lightmatter Georgia Institute of Technology
Glenn Ning Ge etentze@[Link] Rao Bonda
TetraMem ajain@[Link]
Amkor Technology
[Link]@[Link] Soon Jang Chuei-Tang Wang [Link]@[Link]
ficonTEC USA Taiwan Semiconductor Manufacturing Company
Kuldip Johal (TSMC) Biao Cai
MKS Instruments- MSD [Link]@[Link]
ctwang10492@[Link] IBM Corporation
[Link]@[Link] Harry G. Kellzi biaocai@[Link]
Micropac Industries Maciej Wojnowski
Sam Karikalan Infineon Technologies AG Joshua Dillon
Broadcom Inc. harrykellzi@[Link]
[Link]@[Link] Marvell Govt. Solutions
[Link]@[Link] Hideyuki Nasu JoshuaFDillon@[Link]
Furukawa Electric Yong-Kyu Yoon
Beth Keser [Link]@[Link] University of Florida Mark Eblen
Intel Corporation ykyoon@[Link] Kyocera International SC
bethk@[Link] Vivek Raghuraman [Link]@[Link]
Broadcom Corporation Thermal/Mechanical Simulation &
Young-Gon Kim [Link]@[Link] Characterization Mohammad Enamul Kabir
Renesas Electronics America Chair Intel Corporation
[Link]@[Link] Henning Schroeder Wei Wang enamul101b@[Link]
Fraunhofer IZM Qualcomm Technologies, Inc.
Andrew Kim [Link]@[Link] Ibrahim Guven
Apple [Link]@[Link]
Virginia Commonwealth University
hkim34@[Link] Dadi Setiadi Assistant Chair iguven@[Link]
Lightelligence Karsten Meier
John Knickerbocker [Link]@[Link] Alan Huffman
IBM Corporation TU Dresden
[Link]@[Link] SkyWater Technology
knickerj@[Link] Christopher Striemer [Link]@[Link]
AIM Photonics Christopher J. Bailey
Steffen Kroehnert cstriemer@[Link] Amanpreet Kaur
ESPAT Consulting, Germany Arizona State University
[Link]@[Link] Oakland University
[Link]@[Link] Hiren Thacker kaur4@[Link]
Cisco Systems Rui Chen
Albert Lan hithacke@[Link] Stephen Lee
Applied Materials Eastern Michigan University
rchen7@[Link] NXP Semiconductors
Albert_Lan@[Link] Masao Tokunari [Link]@[Link]
IBM Corporation
John H. Lau tokunari@[Link] Liangbiao Chen
On Semiconductor Jeffrey Lee
Unimicron Technology Corporation iST-Integrated Service Technology Inc.
John_Lau@[Link] Stefan Weiss [Link]@[Link]
II-VI Laser Enterprise GmbH jeffrey_lee@[Link]
Jaesik Lee [Link]@[Link] Kuo-Ning Chiang
National Tsinghua University / Department of Power Michael Mayer
SK Hynix USA University of Waterloo
[Link]@[Link] Ping Zhou Mechanical Engineering
LDX Optronics, Inc. knchiang@[Link] mmayer@[Link]
Kyu-Oh Lee pzhou@[Link] Saikat Mondal
Intel Corporation Ercan (Eric) Dede
[Link]@[Link] RF, High-Speed Components & Systems Toyota Research Institute of North America Intel Corporation
Chair [Link]@[Link] [Link]@[Link]
Markus Leitgeb Rajen M Murugan
AT&S Xuejun Fan Mark Poliks
Texas Instruments Binghamton University
[Link]@[Link] r-murugan@[Link] Lamar University
[Link]@[Link] mpoliks@[Link]
Pau Monita Assistant Chair
Onto Jaemin Shin Nancy Iwamoto Patrick Thompson
[Link]@[Link] Qualcomm Technologies, Inc. niwamoto@[Link] Texas Instruments, Inc.
jaemins@[Link] [Link]@[Link]
Luu Nguyen Pradeep Lall
Psi Quantum Amit P. Agrawal Auburn University Kristina Young
lnguyen@[Link] Microchip Technologies lall@[Link] Synopsys Inc
[Link]@[Link] [Link]@[Link]
Raj Pendse Kemal Aygun Chang-Chun Lee
Facebook FRL (Facebook Reality Labs) National Tsing hua University (NTHU) Professional Development Courses
Intel Corporation Chair
rajd@[Link] [Link]@[Link] cclee@[Link] Kitty Pearsall
Boss Precision, Inc.
Min Woo Rhee Wendem Beyene Sheng Liu [Link]@[Link]
Samsung Facebook Wuhan University
[Link]@[Link] wendem@[Link] shengliu@[Link] Assistant Chair
Jeffrey Suhling
Subhash L. Shinde Eric Beyne Yong Liu Auburn University
Notre Dame University imec ON Semiconductor jsuhling@[Link]
sshinde@[Link] [Link]@[Link] [Link]@[Link] PDC Committee
Xuejun Fan
Joseph W. Soucy Prem Chahal Erdogan Madenci Lamar University
Draper Laboratory Michigan State University University of Arizona xfan@[Link]
jsoucy@[Link] chahal@[Link] madenci@[Link]
PDC Committee
Peng Su Zhaoqing Chen Tony Mak Vikas Gupta
Juniper Networks IBM Corporation Wentworth Institute of Technology ASEUS
8 pensu@[Link] zhaoqing@[Link] [Link]@[Link] [Link]@ [Link]
 PROFESSIONAL DEVELOPMENT Who Should Attend
Anyone who cares about achieving high
5. Display Technologies Liquid Crystal
Displays (LCD), Organic Light Emitting
COURSES reliability solder joints for semiconductor Diode Displays (OLED), Quantum Dot
packaging and wants to know how to achieve it Emissive Layers, Micro-LED Arrays and
Tuesday, May 28, 2024 should take this course Large Size Displays using Chiplet Mass
Kitty Pearsall, Chair Transfer and Bonding, 3D Displays
Boss Precision, Inc. 2. PHOTONIC TECHNOLOGIES
6. Summary and Outlook
[Link]@[Link] FOR COMMUNICATION, SENSING,
AND DISPLAYS Who Should Attend
Jeff Suhling, Assistant Chair Course Leader: Torsten Wipiejewski, The course addresses engineers, scientists
Auburn University and students who would like to get a general
Huawei Technologies
jsuhling@[Link] overview of various photonics technologies
Course Description
used in today’s products and future
This course will provide an overview of the
MORNING COURSES various photonic technologies that enable
developments. The aim is to describe which
photonic technologies can be used in various
8:00 a.m. – 12:00 Noon optical communication, optical sensing, and
applications and what current limitations
modern display applications. These applications
are and which new technologies are being
are key for the information and communication
1. HIGH RELIABILITY SOLDERING IN developed for further improvements or aiming
technology of today and pave a way to the
SEMICONDUCTOR PACKAGING at technology breakthroughs.
future. High speed optical communication
Course Leader: Ning-Cheng Lee – from board level in data centers to long haul 3. FROM WAFER TO PANEL LEVEL
ShinePure Hi-Tech transmission requires photonic components PACKAGING
Course Description with high speed and high reliability. We will Course Leaders: Tanja Braun and Piotr
Semiconductor soldering is much more delicate discuss the main components such as laser Mackowiak – Fraunhofer IZM
and is very critical for reliability of devices. This diodes of several types, high speed optical Course Description
course covers the critical parameters governing modulators and photodetectors as well Wafer and Panel Level Packaging are two of
the reliability for soldering in semiconductor as integration schemes such as photonic the dominating trends in microelectronics
packaging. The reliability discussed includes integrated circuits (PICs) and packaging aspects. packaging. Both approaches with different
parameters affecting the intermetallic Photonic technologies are also widely used flavors as RDL last face-up or face-down have
compounds (IMC), voiding, electromigration, as sensors for various applications including reached maturity and are introduced in high
low temperature soldering, high temperature health monitoring. One key advantage is the volume manufacturing. Main driver for moving
potential for non-invasive measurements that from wafer to panel level packaging is of course
soldering, and electrochemical migration under
facilitate the usage by end-users without specific lowering the packaging cost. More packages
a variety of material combinations. The failure
medical knowledge. Packaging should provide can be processed in parallel and panel formats
modes are discussed in detail, with preferred
a high accuracy solution at low cost. Displays have a much better area utilization (ratio
choices of materials and designs recommended.
are the main media nowadays for bringing between panel/wafer size and package size)
Course Outline information to people. They range in size from than round wafer shapes. Additionally, PLP has
1. IMC -Effect of Cu Pad Grain Size on IMC smart watches to smart phones, laptops, and the opportunity to adapt processes, materials
2. IMC - Interaction of Cu and Ni tablets all the way to large screen TVs and and equipment from other technology areas.
3. IMC - Effect of Base Metal Co-P on IMC video walls. We review current technologies Printed Circuit Boards (PCB), Liquid Crystal
4. Voiding - Effect of Solder Form and new developments such as quantum dots Displays (LCD) or photo-voltaic cells (PV)
5. Voiding - Effect of Joint Height, and micro-LEDs as well as some features of are manufactured on panel sizes and adapted
Temperature, Electrical, and Mechanical 3D displays. Micro-LEDs for large size displays technologies can offer new approaches also for
6. Voiding - Effect of Cu Structure on require novel assembly technologies to mount Fan-out Panel Level Packaging.
Kirkendall Voids chips of just several micrometers in size with
extremely high yield at very low cost. The mass The PDC will give a status of the current
7. Electrochemical Migration (ECM) Fan-in and Fan-out Wafer Level Packaging as
8. Electromigration transfer of thousands of chips simultaneously is
an option to achieve this challenging target. well as Panel Level Packaging. This will include
9. LTS - Bi-Rich Whisker Growth material and process discussion, technologies,
10. LTS - TCT Reliability of LTS Course Outline equipment, applications and market trends as
11. LTS - Collapse of LTS 1. Fundamental Properties of Photonic well as cost and environmental aspects.
12. LTS - Deposition, Hot Tear, Bi Components
Stratification of LTS 2. Light Sources (LEDs, Laser Diodes, Course Outline
Others) 1. Introduction Advanced Packaging
13. LTS - Hot Tear of Homogeneous LTS
3. Transmitter and Receiver Components 2. Trends in Wafer Level Packaging
BiSn - Effect of Profile
in Optical Communication (Lasers, 3. Fan-In and Fan-Out Wafer Level
14. LTS - Drop Test of LTS
Modulators, Photodetectors, Passive 4. Introduction and Definition Panel Level
15. HTS - TLPB (Transient Liquid Phase
Optical Components, Photonic Packaging (PLP)
Bonding) 5. Fan-Out Panel Level Packaging:
Integrated Circuits, Silicon Photonics,
IMPORTANT NOTICE Optical Modules, Monolithic and Hybrid Technologies, Challenges & Opportunities,
Anyone taking PDC courses, please Integration, Packaging Cost and Environmental
register on-line in advance to 4. Optical Sensing Elements and Applications Who Should Attend
prevent door registration delays. (Spectrometers, Light Sources, Anyone who is interested in Advanced
Photoacoustic Sensors, Frequency Combs) Packaging, Fan-in and Fan-out Wafer Level

9
 Packaging and the transition to Panel Level 11. Materials, Modeling, Design Rules and Rel Performance Comparison
Packaging. Engineers and managers are Reliability 5. Chip Thermal Management Hot Trends
welcome as detailed technology descriptions 12. Summary 6. Vehicle Thermal Mission Profile
as well as market trends, applications and cost Who Should Attend Introduction
modeling are presented. This class is for all who work with IC packaging, 7. Vehicle-level Reliability Requirements
4. ELIMINATING FAILURE package reliability, package development, 8. Reliability Challenges
MECHANISMS IN ADVANCED package design, and package processing where 9. Vehicle System Level Thermal
PACKAGES a working knowledge of package failure Management Technologies Overview
Course Leader: Darvin Edwards – Edwards mechanisms is beneficial. Beginning engineers 10. Liquid Cooling Cold Plate Performance
Enterprises and those skilled in the art will benefit from the and Reliability
holistic failure mechanism descriptions and the 11. TIM Performance and Reliability
Course Description 12. Board Strain and Chip Reliability
provided proven solutions.
Primary reliability failure mechanisms that plague 13. Heat Pipe Performance and Reliability
semiconductor packages will be summarized 5. NAVIGATING THERMAL AND 14. Thermal Mitigation at Chip Level, Board
along with solutions to enable faster RELIABILITY CHALLENGES IN CHIP
COMPONENTS FOR AUTOMOTIVE Level and System Level
qualification. The reliability of new package 15. Closing Remarks
HIGH-PERFORMANCE COMPUTE
technologies such as heterogeneous package
SYSTEMS Who Should Attend
integration and chiplet technologies will be
Course Leader: Fen Chen -- Automotive Engineers and tech managers already involved
emphasized, as well as an overview of reliability
Reliability/Validation Consultation Services in the chip thermal design for automotive
issues in more traditional packages. Topics
studied include reliability of Direct Cu Bonding Course Description applications, and those who need a fundamental
(DCB), micro bump mechanical reliability, high The landscape of driving is rapidly shifting understanding or a broad overview of the
density interconnect (HDI) reliability, TSV-chip towards fully autonomous vehicles (AV). In chip thermal and reliability management for
interactions, electromigration performance, the absence of human drivers, the functionality automotive applications.
stress induced interlevel dielectric (ILD) damage and performance of a Compute system 6. POLYMERS FOR ADVANCED
under bumps and Cu pillars, saw induced ILD becomes paramount requiring it to consistently PACKAGING
damage, solder joint reliability, the impact of outpace human response for driving safety. AV Course Leader: Jeffrey Gotro –InnoCentrix,
aging on reliability performance and many Compute systems typically consist of multiple LLC
more. larger-size PCBs housing redundant CPUs,
Course Description
AI processors, and crucial IC components to
Primary failure analysis techniques will The course has been completely updated to
ensure higher performance, safety, and reliability
be described. For each failure mode, the include a detailed discussion of the polymers
of AV driving.
resultant failure mechanisms and failure and polymer-related processing for Fan-Out
analysis techniques required to verify the Throughout the rigorous AV Compute Wafer Level (FOWLP) packaging as well as Fan-
mechanisms will be summarized. This solutions- reliability qualification process, these systems Out Panel Level packaging (FOPLP). The course
focused course concentrates on key process undergo various thermal and mechanical will provide an overview of the important
parameters, design techniques and material stresses. Preventing chip thermal failure under structure-property-process-performance
selections that can eliminate failures and these demanding environmental conditions relationships for polymers used in wafer level
improve reliability, ensuring participants can is a critical concern. In this short course, we packaging. The main learning objectives will be:
design-in reliability and design-out failures for will delve into several key areas. In the initial
1-Gain insights on how polymers are used in
quicker time to market. The emphasis is on segment, we will review fundamental chip
Fan Out Packaging, specifically mold compounds
giving the student an intuitive understanding thermal design, cooling solutions, and chip-level
and polymer redistribution layers (RDL).
of the interaction between the various trade- reliability considerations. A spotlight will be
offs, and providing the knowledge about the cast on comparing lidded and lidless package 2-Understand the key polymer and process
methodologies and tools needed to drive early thermal and reliability performances, along challenges in Fan-Out Wafer-Level Packaging.
evaluation of these reliability risks. Primary with exploring the latest trends in chip thermal 3-Learn about polymers and processes used in
reliability failure mechanisms that plague management. Fan Out Panel Level Packaging including new
semiconductor packages will be summarized In the subsequent part, we will present the materials for mold compounds and a detailed
along with solutions to enable faster thermal mission profile and diverse stress test description of the polymers used for RDL in
qualification. requirements for AV hardware validation, FOPLP.
Course Outline adhering to automotive industry standards. Course Outline
1. Introduction to Package Reliability We’ll shine a light on the thermal reliability 1. Overview of Polymers used in Fan-Out
2. Failure Modes vs. Failure Mechanisms challenges associated with qualifying vehicle Wafer-Level Packaging (FOWLP)
3. Failure Analysis Techniques Compute. Moving ahead, we’ll delve into the 2. Wafer-level Process Flows (Chip-First
4. FC-BGA Package Failure Mechanisms most recent advancements in vehicle thermal Versus Chip-Last (RDL first))
5. WLCSP Package Failure Mechanisms management technologies. 3. Epoxy Mold Compounds for Fan-Out
6. Embedded Die & Fan-Out WLP/PLP Course Outline packages
Failure Mechanisms 1. High Performance Compute for Vehicle 4. Photosensitive Polyimides and
7. TSV Failure Mechanisms Applications Polybenzoxazoles for RDL
8. High Density Interconnection Reliability 2. Chip Power + Temperature Trending and 5. Polymer Reliability Challenges in Fan-Out
9. Direct Bond Interconnect Reliability and Reliability Wafer-Level Packaging
Testing 3. Chip Heat Transfer Basics and Survey 6. Processes and Materials for Fan-out Panel-
10. Chiplet Challenges 4. Lidded and Lidless Package Thermal and level Packaging (FOPLP)

10
7. Wafer Versus Panel Processing; Polymer of the technology, and are ready to apply and Who Should Attend
Challenges and Solutions meet their real-world packaging needs. Engineers and Managers who want to
8. Pre-Applied Underfills and Wafer-Level 8. RELIABLE INTEGRATED learn more about the thermal limitations
Underfills, Chemistry and Process THERMAL PACKAGING FOR and reliability concerns involved in the
Who Should Attend POWER ELECTRONICS heterogeneous integration and packaging of
Packaging engineers involved in the Course Leader: Patrick McCluskey – power electronic devices and systems.
development, production, and reliability testing University of Maryland
of semiconductor packages would benefit from
the course. R&D professionals interested in
Course Description AFTERNOON COURSES
Power electronics are becoming ubiquitous
gaining a basic understanding of the structure/
in engineered systems as they replace
1:30 p.m. – 5:30 p.m.
property/process/performance relationships in
traditional ways to control the generation,
polymers and polymer-based materials used in 9. ADDITIVE FLEXIBLE
distribution, and use of energy. They are used
electronic packaging will also find this course HYBRID ELECTRONICS –
in products as diverse as home appliances,
valuable. MANUFACTURING AND
cell phone towers, aircraft, wind turbines,
7. FLIP CHIP TECHNOLOGIES RELIABILITY
radar systems, smart grids, and data centers. Course Leader: Pradeep Lall – Auburn
Course Leader: Shengmin Wen – HaiSemi, This widespread incorporation has resulted
Inc. University
in significant improvements in efficiency
Course Description over previous technologies, but it also has Course Description
This course will cover the fundamentals of made it essential that the reliability of power Technology progression in the field of
all aspects of flip chip assembly technologies, electronics be characterized and enhanced. electronics has been marked with “Dennard
including various types of wafer bumping Recently, increased power levels, made Scaling,” which defined that smaller transistors
technologies, substrate design and selection, possible by new compound semiconductor offered less power consumption, higher
underfill selection, Co-design and modeling, and materials, combined with increased packaging frequencies and higher density. Given that
reliability evaluation. density have led to higher heat densities in current gate lengths have approached 3nm, it is
widely realized that future performance needs
Course Outline power electronic systems, especially inside the
to be realized through packaging innovations
1. Introduction to Flip Chip Technologies switching module, making thermal management
and heterogeneous integration. Heterogeneous
2. Flip Chip Technologies: Mass Reflow more critical to performance and reliability of
integrated modules may require a unique mix
Process power electronics. This course will emphasize
of components and custom design specific
3. Flip Chip Technologies: Thermal approaches to integrated thermal packaging
to a particular application. This course covers
Compression that address performance limits and reliability additive manufacturing methods for the
4. Substrate Technologies, Underfill, Package concerns associated with increased power realization of circuits and packaging for high-
Warpage Control, and Yield levels and power density. Following a quick mix low-volume heterogeneous integration.
5. Flip Chip Reliability Assessment, Failure review of active heat transfer techniques, along This course will cover manufacturing, design,
Modes, Examples, and Modeling with prognostic health management, this short assembly, and accelerated testing of additively
6. Flip Chip Si Package Co-Design and Chip- course will present the latest developments in printed electronics for applications in some
Package Interaction the materials (e.g. organic, flexible), packaging, emerging areas.
7. Flip Chip New Trends: Wafer Level CSP; assembly, and thermal management of power
Wafer Level Fan-Out; and Panel-Level electronic modules, MEMS, and systems and in Manufacturing processes for additive fabrication
Packaging of rigid and flexible electronics will be discussed.
the techniques for their reliability assessment.
8. Bumping Ground Rules The manufacture of thin additively packaged
9. Flip Chip Under-bump Metal and Course Outline electronic architectures requires the integration
Intermetallic 1. Motivation for Integrated Thermal of thin chips, flexible encapsulation, compliant
10. Flip Chip Solder Deposition Processes Packaging for Power Electronics and interconnects, and nano-particle inks for
11. Cu Pillar Technology Heterogeneous Integration metallization traces. Several additive-printed
12. Flip Chip Solder Selection and 2. Simulation and Assessment of Active electronics processes for fabricating and
Characterization Thermal Management Techniques assembling electronics have become tractable.
13. Flip Chip Electromigration 3. Application of Thermal Management to Pick-and-place of thin-silicon and compliant
14. Non-Solder Interconnects Commercial Power Systems interposers through interconnection processes
15. Review and Package Selection Exercise 4. Durability and Reliability Assessment such as reflow requires an understanding of the
5. Thermal Packaging and Reliability of Active deformation and warpage processes. Several
Who Should Attend
Devices product areas for applying additive electronics
The goal of this course is to provide the
6. Thermal Packaging and Reliability of are tractable, including Internet-of-Things (IoT),
students with a list of options to apply to their
Modules medical wearable electronics, communications,
flip chip assembly applications so that a reliable,
innovative, better time to market, and more 7. Reliability and Packaging at the Board and and automotive electronics.
cost-effective solution can be achieved. Students System Level Course Outline
are encouraged to bring topics and technical 8. Flexible Materials, Packaging, and Thermal 1. Heterogeneous Integration
issues from their past, present, and future job Management 2. Need for High-Mix Low-Volume
function for group discussions. A group exercise 9. Reliability of Additive Manufactured 3. Additive Technologies - Aerosol-Jet
at the end of the class is planned to serve as a Systems and Materials Printing, Ink-Jet Printing, Screen-Printing
capstone project, making sure that the students 10. AI/ML for Prognostics of Power and Gravure Printing
can walk away with an in-depth understanding Electronics 4. Structure Integrated Packaging - Laser-

11
 Direct Sintering, In-Mold Labeling up to the millimeter-wave range. Finally, (Face-Down), (b) Chip-First (Face-up), and
5. Ultra-Thin Chips examples of these advanced packages designed (c) Chip-Last Fabrication of Redistribution
6. Die-Attach Materials for Additive and fabricated at Fraunhofer IZM will be Layers (RDLs) Formation of FOPLP: (a)
Semiconductor Packaging discussed. Chip-First (Face-Down), (b) Chip-First
7. Flexible Encapsulation Materials Course Outline (Face-Up), and (c) Chip-Last
8. Dielectric Materials for Large-Area 1. Overview: Different Types of Wafer-Level 2. TSMC InFO: (a) InFO-PoP, and (b) InFO-
Electronics Packages, Fan-Out Technologies, and AiP Driven by 5G mmWave
9. Substrates for Flexible and Rigid Additive 3. Samsung PLP: (a) PoP for SmartWatches
Advanced RF Packages
Applications and (b) SiP SbS for Smartphones
2. Requirements of 5G Packaging and New
10. Power Sources Integration and Reliability 4. Warpages: (a) Warpage Types and (b)
Fan-Out Packaging Concepts for 5G
11. Accelerated Testing Protocols for Allowable Warpages
mmWave Applications
Complex Integrated Systems 5. Reliability of FOWLP and FOPLP: (a)
3. Materials and Fabrication Processes:
12. Additive Complex Integrated Package Thermal-Cycling and (b) Drop Course -
FO-WLPs/PLPs, Multi-Layered RDLs,
Assembly Many Examples of FOWLP and FOPLP
Glass Interposers and Chip Embedding
6. Chiplet Design and Heterogeneous
Who Should Attend Packages
Integration (HI) Packaging vs. System-On-
The targeted audience includes scientists, 4. Fundamentals of RF Design and
Chip (SoC) Advantages and Disadvantages
engineers, and managers considering the use of Measurement: FO-WLPs/PLPs, Glass
of Chiplet Design and HI Packaging - Many
heterogeneous integration, as well as reliability, Interposers and Chip-Embedding Packages
Examples of Chiplet Design and HI
product, or applications engineers who need 5. Examples of Advanced Packages Designed
Packaging
a deeper understanding of additively-print and Fabricated at Fraunhofer IZM
7. Chiplets Lateral Interconnects (Bridges) -
processes to enable high-mix low-volume Who Should Attend Many Examples
applications and understand the advantages, Engineers, scientists, researchers, designers, 8. Chiplet Design and HI Packaging on
limitations; and, failure mechanisms managers, and graduate students interested in Organic Substrates (SiP) - Many Examples
the fundamentals of electronic packaging as well 9. Chiplet Design and HI Packaging on Silicon
10. FUNDAMENTALS OF RF as those involved in the process of electrical Substrates (TSV-Interposers) - Many
DESIGN AND FABRICATION design, layout, processing, fabrication and/or Examples
PROCESSES OF FAN-OUT WAFER/ system-integration of electronic packages for 10. Chiplet Design and HI Packaging on Fan-
LEVEL AND ADVANCED RF emerging applications (e.g., 5G, 6G, mmwave Out RDL Substrate - Many Examples
PACKAGES radar sensors) should attend. 11. Assembly Technologies for Chiplet Design
Course Leaders: Ivan Ndip – Fraunhofer and HI Packaging
11. FAN-OUT PACKAGING AND
IZM/Brandenburg University of
CHIPLET HETEROGENEOUS Who Should Attend
Technology and Markus Wöhrmann –
INTEGRATION If you are involved with any aspect of the
Fraunhofer IZM
Course Leader: John Lau – Unimicron electronics industry, you should attend
Course Description this course. The lectures are based on the
Course Description
Due to their myriad of advantages in system- publications by many distinguished authors and
Fan-out wafer/panel-level packaging has been
integration, fan-out wafer/panel-level packages the books (by the lecturer) such as Fan-Out
getting lots of traction since TSMC used their
(FO WLPs/PLPs) and other advanced RF Wafer-Level Packaging (Springer, 2018) and
integrated fan-out to package the application
packages (e.g., glass interposers and chip- Chiplet Design and Heterogeneous Integration
processor chipset for the iPhone 7. In this
embedding packages) will play a key role in the Packaging (Springer, 2023).
lecture, the following topics will be presented
development of emerging electronic systems.
and discussed. Emphasis is placed on the 12. ANALYSIS OF FRACTURE
The fabrication processes and RF performance fundamentals and latest developments of these AND DELAMINATION IN
of these packages will contribute significantly to areas in the past few years. Their future trends MICROELECTRONIC PACKAGES
the cost and performance of the entire system. will also be explored. Chiplet is a chip design Course Leader: Andrew Tay - National
The objective of this course is to provide and method and heterogeneous integration (HI) University of Singapore
illustrate the fundamentals of the fabrication is a chip packaging method. HI uses packaging
processes and RF design of these advanced Course Description
technology to integrate dissimilar chips, The main objective of this course is to
packages for emerging RF/wireless applications. photonic devices, and/or components (either provide a fundamental understanding as
An overview of distinct types of wafer-level side-by-side, stacked, or both) with varied sizes well as techniques of applying the fracture
packages, fan-out technologies, glass interposers and functions, and from different fabless design mechanics methodology to predicting fracture
and chip-embedding packages will first be given. houses, foundries, wafer sizes, and feature sizes and delamination in microelectronic packages.
This will be followed by a presentation of into a system or subsystem on a common The mechanism of delamination failure due to
new fan-out-packaging and interposer-based package substrate. For the next few years, we thermal stress and moisture will be described
concepts for emerging and future applications will see more implementations of a higher level and analyzed. Simulation of transient heat
(e.g., 5G mmWave, mmWave radar sensors, of chiplet designs and HI packaging, whether transfer and moisture diffusion processes
6G) as well as a thorough discussion of it is for time-to-market, performance, form occurring during package qualification will be
the materials and fabrication processes of factor, power consumption or cost. In this described. An introduction to the fundamentals
FO-WLPs/PLPs, multilayered RDLs, glass lecture, the introduction, recent advances, and of interfacial fracture mechanics will be given
interposers and chip embedding packages. The trends in chiplet design and HI packaging will be together with descriptions of some numerical
basics of efficient RF design and measurement presented. methods of calculating fracture mechanics
of the fundamental building blocks of these Course Outline parameters. Experiments which verify the
advanced packages will be given for frequencies 1. Formation of FOWLP: (a) Chip-First methodology for predicting delamination in

12
packages will then be described followed by differences, how can we overcome them and 8. Electrically Conductive Adhesives
some interesting case studies. where will the future lead us? 9. Conductive Nano Composites
Course Outline Course Outline 10. Conductive Nano-Ink
1. Development of Hygrothermal Stresses in 1. Packaging - What is different for MEMS 11. Transparent Nanocomposite
Microelectronics Packages and Sensors? Who Should Attend
2. Finite Element Analysis and Stress 2. Cavity Packaging Students, researchers, engineers, scientists
Singularities in Microelectronic Packages. 3. Low Stress Packaging and Materials and managers who are involved in research
3. Inadequacy of Maximum Stress Failure 4. Chemical Robustness and development, designing, processing
Criterion 5. Case Studies and manufacturing of microelectronic and
4. Fundamentals of Fracture Mechanics 6. Heterogeneous Integration and Advanced optoelectronic components and packages,
Methodology Packaging and suppliers and developers of materials for
5. Computation of Fracture Mechanics Who Should Attend semiconductor and electronic packaging.
Parameters The course is intended for engineers and
6. Measurement of Fracture Toughness technical managers working in the field of 15. DESIGN-ON-SIMULATION
7. Experimental Verification of the MEMS or sensors. It gives an overview on the FOR ADVANCED PACKAGING
Methodology MEMS packaging landscape but also elaborates RELIABILITY AND LIFE
8. Case Studies on Delamination of Pad- more fundamentally into selected topics. It will PREDICTION
Encapsulant Interfaces, Die-Attach Layers, as well welcome students and newcomers, Course Leaders: Kuo-Ning Chiang –
and On-Chip Interconnect Structures who are interested in broadening their MEMS- National Tsing Hua University and Xuejun
(BEOL) specific knowledge. Fan – Lamar University
9. Cohesive Zone Modeling of Delamination
and Case Study 14. NANO MATERIALS AND Course Description
POLYMER COMPOSITES FOR The electronic packaging community has widely
Who Should Attend ELECTRONIC PACKAGING used Design-on-Simulation (DoS) methodology
This course is designed for packaging design Course Leaders: C.P. Wong – Georgia for designing new packaging structures.
engineers who perform reliability analysis of Tech and Daniel Lu – Henkel Corporation However, it has encountered many challenges
microelectronics and photonics packages. in ensuring a trustable simulation result. Artificial
Course Description
13. ADVANCED PACKAGING FOR intelligence (AI)/machine learning approaches
Nano materials and polymer composites
MEMS AND SENSORS can be combined with DoS to solve this
are widely used in electronic and photonic
Course Leader: Horst Theuss – packaging as adhesives, encapsulants, thermal uncertainty. This course aims to illustrate the
Infineon Technologies AG interface materials, insulators, dielectrics, molding solution methodology and procedure, including
Course Description compounds and conducting elements for the fundamentals of physics associated with
Sensors are everywhere! They create data and interconnects. These materials also play a critical different failure mechanisms in electronic
provide the “food” for the Internet of Things. role in the recent advances of high performance packaging, finite element analysis (FEA) and
Which specific requirements distinguish MEMS encapsulants for ball grid array (BGA), chip simulation, large database generation, and AI
and sensor packaging from standard assembly? scale package, system in package (SIP), package- training performance of different machine
How are these challenges being tackled? Do on-package, and heterogeneous integration learning algorithms. This course will also
we need advanced packaging technologies for packaging, electrically conductive adhesives describe how to combine AI and finite element
MEMS? These are just a few questions which (both ICA and ACA), embedded passives (high simulation to estimate the reliability life and
are addressed in the course. From a general K polymer composites), and nanoparticles obtain the best structure combination of
introduction into package platforms, MEMS- and nano functional materials such as CNTs each packaging component using wafer-level
specific challenges will be derived – e. g. the (some with graphenes). It is imperative that packages as demonstrations. The course will
need for low package induced stress and its both materials suppliers and customers have a cover the following topics: 1) Introduction to
impact to MEMS performance, the necessity thorough understanding of polymeric materials, advanced packaging; 2). Physics of failures due
to create cavities or the implementation of the latest advances on nano materials, and their to thermal, mechanical, moisture/humidity and
MEMS-specific package materials and processes. impact to advance electronic packaging and electromigration. 3). Finite element simulation,
The course reviews the state of the art, but integration technologies. 4) Material constitutive equations, 5) AI-Assisted
also explores some topics in more detail. These DoS, and 6) Solder joint reliability life cycle
Course Outline prediction empirical equations.
topics refer to case studies comprising pressure 1. Introduction to Nanotechnology
and impact sensors, microphones, mirrors, 2. Nanosolder Course Outline
magnetic sensors, and Radar devices. A further 3. Carbon Nanotube (CNT) 1. Introduction to Advanced Packaging
section elaborates on robustness requirements 4. Nanomaterials for Wafer Level Packaging 2. Physics of Failures Under Thermal,
and approaches for risk mitigation in harsh 5. Super Hydrophobic Surface Mechanical, Moisture/Humidity, and
environments. 6. Surface Functionalization Electric Current Stresses
A discussion on advanced packaging contains 7. Functionalized Graphene for Energy 3. Finite Element Analysis and Simulation
developmental studies on integrating MEMS- Storage and Electrocatalysis 4. Material Properties and Constitutive
microphones or RF-antennas into Fan-Out- Equations
Wafer-Level-Packages. The concluding chapter IMPORTANT NOTICE 5. AI-Assisted Design-On-Simulation
deals with systems and heterogeneous Anyone taking PDC courses, please Methodology
integration. Where is the overlap of the register on-line in advance to 6. AI Solvers
processor-driven world of advanced packaging prevent door registration delays. 7. Case Study: Solder Joint Reliability Life
and the MEMS/Sensor world? Where are Cycle Prediction Empirical Equations

13
 Who Should Attend
This course is intended for technical managers
and staff members, reliability engineers, scientific
researchers, and graduate students who are
IMPORTANT NOTICE
involved in thermal/mechanical modeling, Morning PD Courses 1 through 8 or afternoon PD Courses 9
package design, material selection, qualification, through 16 run concurrently.
and reliability assessment of chip-package Make sure you indicate which course you plan to attend
interaction, package, and package/board
interaction.
in the morning and/or in the afternoon. As sessions run
concurrently, attendance is only allowed at one session in the
16. THERMAL SPREADING AND
CONTACT RESISTANCE morning and one session in the afternoon.
Course Leaders: Yuri Muzychka – See page 32 for registration information
Memorial University of Newfoundland
and Marc Hodes – Tufts University
Course Description
This course will mainly focus on fundamentals
and applications of thermal spreading and
AREA ATTRACTIONS
contact resistance for thermal management in Overlooking the city of Denver skyline, framed by the Rocky Mountains, the Gaylord
electronics packaging. The course will be based Rockies Resort & Convention Center is the first true tourism product in Aurora,
in part on the new text Thermal Spreading Colorado - a rapidly growing community directly east of Denver.
and Contact Resistance, by Y. Muzychka and Located just 10 minutes from Denver International Airport, this resort is the fifth
M. Yovanovich, Wiley, 2023. The last part of Gaylord Hotels ® property and one of the largest resorts in the world to debut under
the course will discuss analytical techniques the Marriott International brand. The Denver area has seen unprecedented growth in
relevant to the modeling of thermoelectric
the past decade, but the Gaylord Rockies Resort & Convention Center is the definition
modules, micro-devices, thermal interface
of a game changer for the region, delivering 1,501 sleeping rooms, 485,000 square
materials (TIMs), heat sinks and heat pipes, to
complement the core material on spreading feet of convention center space and an extensive indoor/outdoor water park on a
and contact resistance, providing a holistic view sprawling 85-acre site. The resort also offers eight dining options, a luxurious spa and
of the power of analysis in thermal design. salon, indoor and outdoor pools, a 75-foot TV in the Mountain Pass Sports Bar, and
picture-perfect views of the mountains. Book your stay today! (see page 31 for details)”
Course Outline
1. Introduction
2. Thermal Spreading (Constriction)
Resistances
3. Semi-Infinite, Finite Domains, and Multi-
Component Systems
4. Thermal Spreaders With Isotropic,
Compound, and Orthotropic Materials
5. Single and Multi-Source Systems
6. Non-Uniform Conductance in Heat Sinks
7. Interface Materials
8. Thermal Contact Resistance of Rough
Conforming and/or Non-Conforming
Surfaces
9. Simple Models
10. Spreading Resistance in Domains With
Surface Roughness
11. Role of Spreading Resistance in Flows
Over Superhydrophobic Surfaces
12. Practical Examples and Case Studies
13. Analysis Relevant to Thermoelectric
Modules, Heat Sinks and Heat Pipes
Who Should Attend
Mechanical and electrical engineers working in
thermal management of electronics packaging
at device level, package level, or system level.
Both experienced applications engineers and
newcomers to the field will benefit from
participation in the proposed short course, as
will academics doing research in the field.

14
 Program Sessions: Wednesday, May 29, 9:30 a.m. -12:35 p.m.
Session 1: Advances in Fan-Out, Wafer-Level, and Panel- Session 2: Advanced Die-to-Wafer Hybrid Bonding for Session 3: Co-Packaged Optics
Level Packaging Technologies Enabling New Applications Heterogeneous Integration
Committee: Committee: Committee:
Packaging Technologies Interconnections Photonics

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

Beth Keser Katsuyuki Sakuma Richard Pitwon
ZeroASIC IBM Research Resolute Photonics
Email: bethk@[Link] Email: ksakuma@[Link] Email: [Link]@[Link]

Steffen Kroehnert Tiwei Wei Nicolas Boyer

ESPAT Consulting Purdue University Ciena
Email: [Link]@[Link] Email: tiwei@[Link] Email: nboyer@[Link]

1. 9:30 AM - How to Manipulate Warpage 1. 9:30 AM - Direct Die-to-Wafer Hybrid 1. 9:30 AM - High Density Integration
in Fan-Out Wafer and Panel Level Packaging Bonding Using Plasma Diced Dies and Bond of Silicon Photonic Chiplets for 51.2T
Tanja Braun, Ole Hölck, Marius Adler, Mattis Pad Pitch Scaling Down to 2 µm Co-Packaged Optics
Obst, Steve Voges, Karl-Friedrich Becker, Rolf Ye Lin, Pieter Bex, Koen Kennes, Jaber Sukeshwar Kannan, Ray Chang, Hari Potluri, Sheng
Aschenbrenner - Fraunhofer IZM; Marcus Voitel, Marc Derakhshandeh, Prathamesh Dhakras, Samuel Suhard, Zhang - Broadcom, Inc.; Jay Li, Bruce Xu, Hsi-Chang
Dreissigacker, Martin Schneider-Ramelow - Technical Carine Gerets, Sven Dewilde, Violeta Georgieva, Anne Hsu - Siliconware Precision Industries Co., Ltd.
University Berlin Jourdain, Gerald Beyer, Eric Beyne - imec

2. 9:50 AM - Advanced FO-PLP With 2. 9:50 AM - Multi-Functional Self- 2. 9:50 AM - Ultra Low-Loss Ion-Exchange
Multi-Chip Using 3 nm AP for Wearable Assembled Monolayer (SAM) for Chip-to- Waveguides in Optimized Alkali Glass for
Application Chip and Chip-to-Wafer Hybrid Bonding Co-Packaged Optics
Jooyoung Choi, Hyungmin Kim, Jaehoon Choi, Eun Yield Enhancement Lars Brusberg, Matthew J. Dejneka, Chukwudi A.
Seok Choi, Hwanpil Park, Gyunghwan Oh, Seungsoo Murugesan Mariappan, H Hashimoto, T Fukushima - Okoro, David J. McEnroe, Aramais R. Zakharian, Chad
Ha, Wonkyung Choi - Samsung Electronics Co., Ltd.; Tohoku University; K Mori - T-Micro; A Kurachi, T C. Terwilliger - Corning Research and Development
Dong Wook Kim - Samsung Imori - JX Metals Corporation Corp.

3. 10:10 AM - Transcending the Reticle Limit 3. 10:10 AM - 3D Heterogeneous Integration 3. 10:10 AM - A Surface-Mount Photonic
in On-Wafer Die Integration and Advanced With Sub-3 μm Bond Pitch Chip-to-Wafer Package With a Photonic-Wire-Bonded
Packaging: Full-Wafer Patterning With High- Hybrid Bonding Glass Interposer as a Hybrid Integration
Productivity Electron Beam Lithography Yi Shi, Haris Niazi, Michael Baker, Yuan Meng, Ashish Platform for Co-Packaged Optics
Andrew Ceballos, Kenneth MacWilliams, Ted Prescop, Dhall, Xavier Brun - Intel Corporation Hiroshi Uemura, Taichi Misawa, Yasutaka Mizuno, Hajime
Tsenguun Byambadorj, David Lam - Multibeam Corporation; Arao, Tetsuya Nakanishi, Keiji Tanaka, Tomomi Sano,
Timothy Michalka - TLM Technologies, LLC; Craig Bishop, Katsumi Uesaka - Sumitomo Electric Industries, Ltd.; Mami
Miyairi, Yoshikatsu Ishizuki, Taiji Sakai - FICT LIMITED;
Cliff Sandstrom, Tim Olson - Deca Technologies, Inc. Yoichiro Kurita - Tokyo Institute of Technology
Refreshment Break: 10:30 a.m.-11:15 a.m.
4. 11:15 AM - 600 mm x 600 mm Fan- 4. 11:15 AM - Novel Three-Layer Stacking 4. 11:15 AM - Development of All-
Out Panel Level Package (FOPLP) as an Process With Face-To-Back CoW 6 µm-Pitch Photonics-Function Embedded Package
Alternative to Lead-Frame-Free Quad Flat Hybrid Bonding Substrate Using 2.3D RDL Interposer for
No Lead (QFN) Package Akihiro Urata, Takahiro Kamei, Akihisa Sakamoto, Co-Packaged Optics
Akihiro Noriki, Fumi Nakamura, Satoshi Suda, Takayuki
Jacinta Aman Lim, Yoon Muk Park, Brett Dunlap, Jane Hirotaka Yoshioka, Kan Shimizu, Yoshihisa Kagawa, Kurosu, Takeru Amano - National Institute of Advanced
Lee - nepes Corporation; Robin Davis - DECA Hayato Iwamoto - Sony Semiconductor Solutions Industrial Science and Technology; Hirotaka Uemura,
Corporation Haruhiko Kuwatsuka, Naoki Matsui, Reona Motoji, Dan
Maeda, Tomoya Sugita - Kyocera Corporation

5. 11:35 AM - Challenges and Analysis for 5. 11:35 AM - Dielectric Stack Optimization 5. 11:35 AM - Advanced 3D Packaging of
Pitch 25 μm - 100 μm Mixed Micro Bumps for Die-Level Warpage Reduction for Chip- 3.2Tbs Optical Engine for Co-packaged
and Interconnection in Fan-Out Embedded to-Wafer Hybrid Bonding Optics (CPO) in Hyperscale Data Center
Bridge Die With TSV Package (FO-EB-T) Chandra Rao Bhesetti, Dileep Kumar Mishra, Networks
Kuei Hsiao Kuo, Jia Han Li, Chia Shing Wu, Feng Lung Nagendra Sekhar Vasarla, Sasi Kumar Tippabhotla, Aparna Prasad, Sandeep Razdan, Paul Ton, Cristiana
Chien - Siliconware Precision Industries Co., Ltd. Ismael Cereno Daniel, Ser Choong Chong, King Muzio - Cisco Systems, Inc.
Jien Chui, Srinivasa Rao Vempati - Institute of
Microelectronics A*STAR

6. 11:55 AM - High Precision and 6. 11:55 AM - Low Temperature Wafer 6. 11:55 AM - 3D-Printed Beam Expanding
Productivity Bridge-Die-Last Bonding Level Hybrid Bonding Enabled by Advanced Lens for Chip to Fiber Vertical Coupling
Process and Its Reliability for Pillar- SiCN and Surface Activation Yasutaka Mizuno, Hiroshi Uemura, Tomoya Saeki,
Suspended Bridge (PSB) Architecture Fumihiro Inoue, Junya Fuse, Sodai Ebiko, Ryosuke Sato - Keiji Tanaka, Katsumi Uesaka - Sumitomo Electric
Ichiro Kono, Yoshihiro Kometani, Atsushi Kuroha - Yokohama National University; Atsushi Nagata, Yoshihiro Industries, Ltd.
AOI Electronics; Ken Ukawa - Sumitomo Bakelite Co., Kondo - Tokyo Electron Kyushu, Ltd.; Kenichi Saito, Takuo
Ltd.; Yoichiro Kurita - Tokyo Institute of Technology Kawauchi - Tokyo Electron, Ltd.; Junghwan Park, Chiwoo
Ahn, Myeonghyeon Kim, Jiho Kang - SK Hynix, Inc.

7. 12:15 PM - Vertical Fan-Out WLP 7. 12:15 PM - A Study on D2W Hybrid Cu 7. 12:15 PM - Characterization of QSFP
technology With Enhanced Form Factor and Bonding Technology for HBM Multi-Die and OSFP CPO ELS Modules Employing an
Performance for Mobile Applications Stacking 8-channel CWDM TOSA in Practical Air-
Ichiro Kono, Yoshihiro Kometani, Atsushi Kuroha - Hyeonmin Lee, Jihoon Kim, Hyungchul Shin, Wonil Cooling Conditions
AOI Electronics; Yoichiro Kurita - Tokyo Institute of Lee, Aeni Jang, Hyuekjae Lee, Byungchan Kim, Ilhwan Kohei Umeta, Taketsugu Sawamura, Kyoko Nagai,
Technology Kim, Dongjoon Oh, Jumyong Park, Un-Byoung Kang, Yuki Shiroishi, Hideyuki Nasu - Furukawa Electric Co.,
Dae-Woo Kim - Samsung Electronics Co., Ltd. Ltd.

15
 Program Sessions: Wednesday, May 29, 9:30 a.m. -12:35 p.m.
Session 4: Reliability of Advanced Substrates and Session 5: Digital Health Care: Wearable Sensors, and Session 6: Thermal-Mechanical Reliability Simulations
Interconnects Flexible Electronics
Committee: Committee: Committee: Thermal/Mechanical Simulation
Applied Reliability Emerging Technologies & Characterization

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

Rabindra N. Das Rabindra N. Das Wei Wang
MIT Lincoln Labs MIT Lincoln Labs Clemson University
Email: [Link]@[Link] Email: [Link]@[Link] Email: wwang@[Link]

Hee Seok Kim Hee Seok Kim Karsten Meier

Washington State University Washington State University TU Dresden
Email: heeskim@[Link] Email: heeskim@[Link] Email: [Link]@[Link]

1. 9:30 AM - Reliability Assessment of 1. 9:30 AM - Three-Dimensional Integration 1. 9:30 AM - Modeling and Optimization
Stacked-Vias With Different Configurations of a Flexible Battery and a Flexible Wireless of Thermal Cycling Performance to Reduce
Through a Unit Cell-based Substrate Design Charger for Powering Wearables Ratcheting-Induced Passivation Cracking in
Krishna Tunga, Joseph Ross, Shidong Li, Sushumna Guangqi Ouyang, Subramanian Iyer - University of High-Voltage Power Modules
Iruvanti, Bakul Parikh - IBM Corporation California, Los Angeles Bill Chen, Yong Liu - ON Semiconductor

2. 9:50 AM - Enhanced Biased HAST 2. 9:50 AM - Ferrite-Based NFC Antenna 2. 9:50 AM - Interfacial Reliability and
Reliability of Polyimide for High-Density and Sensor Package Module Development Predictive Models for Potted Board
Redistribution Layers for Implantable Continuous Glucose Monitor Assemblies in Inclined 25000 g Mechanical
Takumi Onuma, Daisaku Matsukawa, Takahiro Tanabe Gaurav Mehrotra, Young Kim, Marko Mailand - Shock
- HD MicroSystems LLC Renesas Electronics Corporation; James Masciotti - Pradeep Lall, Aathi Pandurangan, Padmanava
Senseonics, Inc.; Ginger Huang, Jackson Chen, Ryan Lai Choudhury, Jeff Suhling - Auburn University; Ken
- Advanced Semiconductor Engineering, Taiwan Blecker - US Army

3. 10:10 AM - Effect of Lamination Process- 3. 10:10 AM - Design and Development of 3. 10:10 AM - Peridynamic Simulation of
Induced Residual Stress on the CTE of Sustainable Low-Cost Single-Use Electrode Failure Due to Electromigration
Advanced Prepregs Before and After Solder Leads for Wearable Medical Devices Yanan Zhang, Sundaram Vinod Kumar Anicode,
Reflow Process Babatunde Falola, Riadh Al-Haidari, Udara Somarathna, Erdogan Madenci - University of Arizona; Xuejun
Byoung-Phil Kang - Chungbuk National University/ Bryan Cabrera, Mohammed Alhendi, Mark D Poliks - Fan - Lamar University; Yile Hu - Shanghai Jiao Tong
SIMMTECH; Jong-Yun Lee - Chungbuk National University; Binghamton University; Nancy Stoffel - General Electric University
Jaesung Kim, Jongwoo Park, Kyu-Jin Lee - SIMMTECH; Global Research; Gurvinder Khinda, Tzu-Jen Felix Kao -
Yongrae Jang, Bongtae Han - University of Maryland General Electric Healthcare; Rafael Tudela - Tapecon, Inc.

Refreshment Break: 10:30 a.m.-11:15 a.m.

4. 11:15 AM - Fan-Out PoP Solder Joint 4. 11:15 AM - Conformal Patch for 4. 11:15 AM - A Robust Mesh Size Control
Reliability Investigation by System Power Dehydration Monitoring in Dementia Technology Suitable for Various Empirical
Cycling Patients Equations for Predicting Solder Joint
Chi Ko Yu, Techi Wong, Hank Hsieh, P. H. Tsao, M.Z. Musafargani Sikkandhar, Ramona B. Damalerio, Reliability
Lin, Liham Chu - MediaTek, Inc. Wei Da Toh, Ming-Yuan Cheng - Institute of Kuo-Ning Chiang, C. E Lee - National Tsing Hua
Microelectronics A*STAR University; Cadmus Yuan - Feng Jia University

5. 11:35 AM - Fatigue-Fracture Propensity 5. 11:35 AM - Silicon-Based Membrane 5. 11:35 AM - Multi-Material Corner

Measurement and Competing Risk Model Pressure Sensor for Inline Monitoring of Singularity in Electronic Packaging: Avoiding
for FCBGA Interfaces Under Sustained Pressure and Hermeticity of Small-Volume Mesh Dependence in Analyzing Stress
Humidity and Temperature Exposure Bonded Packages Yaxiong Chen, Torsten Hauck - NXP Semiconductor,
Pradeep Lall, Aathi Pandurangan, Padmanava Jannik Koch, Levin Brinkmann, Alexander Kassner, Inc.; Ganesh Subbarayan - Purdue University
Choudhury, Madhu Kasturi, Jeff Suhling - Auburn Folke Dencker, Marc Wurz - Institute of Micro
University Production Technology

6. 11:55 AM - Evaluation of Vapor Pressure 6. 11:55 AM - A Noninvasive Flexible Bio 6. 11:55 AM - Bayesian Optimization
Induced Debonding Failure in Fan-Out Optical Sensor for Hemoglobin Detection of Large, Glass BGA Package Design for
Package Under Reflow Condition Yu-Chih Lee, Kai-Lun Yu, Shu-An Tsai, Pai-Sheng Shih, System-Level Reliability in Chiplet-Based
Bo-Shuo Chen, Tz-Cheng Chiu - National Cheng Guo-Sin Huang, Tien-Chia Liu, Chih-Lung (Steven) High-Performance Computing and AI
Kung University; Wei-Jie Yin, Chin-Li Kao - Advanced Lin, Jen-Chun Chen, Jen-Kuang Fang, Harrison Chang Architectures
Semiconductor Engineering, Taiwan - Advanced Semiconductor Engineering, Inc.; Tzyy- Emanuel Torres Surillo, Christian Molina-Mangual,
Wei Fu, Sheng-Hao Tseng - National Cheng Kung Pratik Nimbalkar, Hyunggyu Park, Ramon Sosa,
University Vanessa Smet - Georgia Institute of Technology

7. 12:15 PM - Characterization and 7. 12:15 PM - A Multi-Channel, Embedded, 7. 12:15 PM - Prediction of Moisture

Sensitivity Analysis of Piezoresistive Stress and Geometrically Optimized Filter Bank Absorption Characteristics Under Normal/
Sensor for Thermal and Mechanical Loads Utilizing Advanced Packaging Topologies Accelerated Preconditioning Condition in
and Implementation for In-Situ Health for Miniaturized RF Modules in IoT and Multi-Chip Packages
Monitoring of Solder Bumps Wearable Systems Hyunggyun Noh, Jinsoo Bae, Keunho Rhew, Soojin
Adwait Inamdar, Willem van Driel, GuoQi Zhang - Delft Hani Al-Jamal, Marvin Joshi, Manos M. Tentzeris Yoo, Jiyoung Lim, Yuchul Hwang, Sangwoo Pae -
University of Technology; Varun Thukral, Letian Zhang, - Georgia Institute of Technology; Nick Kingsley - Samsung Electronics Co., Ltd.
Jeroen Zaal, Michiel van Soestbergen, Hanz Tuinhout - NXP Teradyne
Semiconductor, Inc.
16
 Program Sessions: Wednesday, May 29, 2:00 p.m. - 5:05 p.m.
Session 7: Heterogeneous Integration: Systems Design, Session 8: Sub-Micron Scaling in Wafer-to-Wafer Hybrid Session 9: Advanced Processes for Chip Stacking
Signal & Power Delivery, and Process Optimization Bonding Committee: Materials & Processing
Committee: Committee: Committee:
Packaging Technologies Interconnections Materials & Processing

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

Lihong Cao Jean-Charles Souriau Qianwen Chen
ASE CEA Leti IBM Research
Email: [Link]@[Link] Email: jcsouriau@[Link] Email: chenq@[Link]

Subhash L. Shinde Matthew Yao Vidya Jayaram

Notre Dame University GE Aerospace Intel
Email: sshinde@[Link] Email: [Link]@[Link] Email: [Link]@[Link]

1. 2:00 PM - Next Generation Large Size 1. 2:00 PM - Study of Ultra Fine 0.4 µm 1. 2:00 PM - IR Laser Release for 3D
High Interconnect Density CoWoS-R Pitch Wafer-to-Wafer Hybrid Bonding and Stacked Devices: Effect of the Release Stack
Package Impact of Bonding Misalignment Structure on the Debonding Mechanism
Chien-Hsun Lee, C.L. Lai, M. Liu, J. Hu, S.L. Tsai, H.Y. Yukako Ikegami, Takumi Onodera, Masanori François Chancerel, John Slabbekoorn, Steven Brems,
Chen, J. Lin, C.C. Hsieh, C.K. Hsu, Kathy Yan, Shin-Puu Chiyozono, Akihisa Sakamoto, Kan Shimizu, Yoshihisa Alain Phommahaxay, Erik Beyne - imec; Peter Urban,
Jeng, Jun He - Taiwan Semiconductor Manufacturing Kagawa, Hayato Iwamoto - Sony Semiconductor Julian Bravin, Thomas Uhrmann, Markus Wimplinger -
Company, Ltd. Solutions Corporation EV Group, Inc.

2. 2:20 PM - World’s First UCIe 2. 2:20 PM - 3-Layer Fine Pitch Cu-Cu 2. 2:20 PM - High Performance 3D
Interoperability Silicon Enabling Open Hybrid Bonding Demonstrator With High Package Technology for Mobile Application
Standards Heterogeneous Integration Density TSV for Advanced CMOS Image Processor (AP)
Xavier Brun, Stephen Wong - Intel Corporation; Sensor Applications Sun Jae Kim, Cheol Kim, Huiyeong Jang, Jongpa Hong,
Manuel Mota - Synopsys, Inc. Stephane Nicolas, Jerzy-Javier Suarez-Berru, Nicolas Seongyo Kim, Yongwon Choi, Chajea Jo, Sun-Kyung
Bresson, Carole Socquet-Clerc, Myriam Assous, Seo, Dong Kwan Kim, Dae-Woo Kim - Samsung
Stephan Borel - Grenoble Alps University/CEA-LETI Electronics Co., Ltd.

3. 2:40 PM - Scalable Advanced DBHi 3. 2:40 PM - Scaling Cu/SiCN Wafer-to- 3. 2:40 PM - Advancements in Photonic
Chiplet Package Using Silicon Bridge With 30 Wafer Hybrid Bonding Down to 400 nm Debonding: Processing Silicon-Based Power
µm-pitch Solder Joints Interconnect Pitch Devices
Akihiro Horibe, Takahito Watanabe, Chinami Boyao Zhang, Soon-Aik Chew, Michele Stucchi, Sven Vahid Akhavan, Vikram Turkani, Harry Chou, Rudy
Marushima, Sayuri Kohara, Hiroyuki Mori - IBM Dewilde, Serena Iacovo, Liesbeth Witters, Tomas Ghosh, Boone Munson - PulseForge, Inc.; Rajesh Rao,
Research, Tokyo; Divya Taneja, Thomas Wassick, Webers, Koen Van Server, Joeri De Vos, Andy Miller, Vishal Trivedi, Leo Mathew - Applied Novel Devices;
Isabel de Sousa - IBM Infrastructure; Qianwen Chen, Gerald Beyer, Eric Beyne - imec Andy Jones, Nathan Parker, Seth Molenhour, Luke
Eric Perfecto, Aakrati Jain, Joseph Ross - IBM Research Prenger - Brewer Science, Inc.

Refreshment Break: 3:00 p.m. - 3:45 p.m.

4. 3:45 PM - Performance Evaluation of 4. 3:45 PM - Fine Pitch and Low Temperature 4. 3:45 PM - Bump-Less Interconnect With
UCIe-based Die-to-Die Interface on Low- Nanocrystalline-Nanotwinned Cu and SiCN-to- Room Temperature Pre-Bondable Adhesive
Cost 2D Packaging Technology SiO2 Wafer-to-Wafer Hybrid Bonding and Solder for High Throughput Chip
Srujan Penta, Ting Zheng, Aatreya Chakravarti, Wei-Lan Chiu, Ou-Hsiang Lee, Chia-Wen Chiang, Stacking
Wolfgang Sauter, Eric Tremble, Anthony Sigler, Carl Hsiang-Hung Chang, Chin-Hung Wang, Wei-Chung Wataru Okada, Yuzo Nakamura, Yasuhisa Kayaba,
Benes - Marvell Technology, Inc.; Muhannad Bakir - Lo - Industrial Technology Research Institute; James Takuo Shikama, Yutaka Hisamune, Kahori Tamura,
Georgia Institute of Technology Yi-Jen Lo, Chiang-Lin Shih, Hsih-Yang Chiu - Nanya Satoshi Inada, Rikia Furusho - Mitsui Chemicals, Inc.
Technology Corporation

5. 4:05 PM - Signal & Power Integrity 5. 4:05 PM - Single-Grain Cu µ-Joint 5. 4:05 PM - IR Laser Debond from Silicon
Optimization Utilizing Silicon Core Substrate Formation Directed by Selective Under- Carrier Wafers With Inorganic Thin Films for
(SCS) Seed-Metallurgy (USM) for Hybrid Bonding High-Density 2.5D and 3D Integration
Seann Ayers, Steven Verhaverbeke, Han-Wen Chen, Murugesan Mariappan, H Hashimoto, T Fukushima Thomas Sounart, Tushar Talukdar, Henning Braunisch,
Liu Jiang, El Mehdi Bazizi - Applied Materials, Inc. - Tohoku University; K Mori - T-Micro; M Sawa, J Paul Nordeen, Kimin Jun, Aleksandar Aleksov,
Nampo - JCU Corporation Adel Elsherbini, Shawna Liff, Johanna Swan - Intel
Corporation

6. 4:25 PM - Package Power Delivery 6. 4:25 PM - 0.5 µm Pitch Wafer-to-Wafer 6. 4:25 PM - Backside Thinning Process
Architecture for High Performance Hybrid Bonding at Low Temperatures With Development for High-Density TSV in a
Computing Systems With a 1 kW IVR SiCN Bond Layer 3-Layers Integration
Operated in CCM-DCM Boundary Mode Kai Ma, Nikos Bekiaris, Sesh Ramaswami - Applied Renan Bouis, Lionel Vignoud, Jerome Dechamp,
With High Efficiency Materials, Inc.; Taotao Ding, Gernot Probst, Tobias Damien Hebras, Paul Valentin, Jeremy Marchand,
Ramin Rahimzadeh Khorasani, Madhavan Swaminathan Wernicke, Thomas Uhrmann, Markus Wimplinger - Stephan Borel - Grenoble Alps University/CEA-LETI;
- Pennsylvania State University; Rohit Sharma - Indian EV Group, Inc. Myriam Assous - CEA-LETI
Institute of Technology Ropar

7. 4:45 PM - Study for Realization of 7. 4:45 PM - Development of Double 7. 4:45 PM - Process Development and
the Next Generation High Density RDL Cantilever Beam Technique for Wafer-to- Characterization of Ru-Based UBM for
Packaging for 2.5D Large Silicon Interposer Wafer Bond Energy Measurement In Bumps Interconnects Integration for
Masaki Mizutani, Yusuke Tokuyama, Noriyuki Guohua Wei, Matthew Gerber, Derik Rudd, Robert Quantum Assemblies
Shiozawa, Mizuma Murakami, Hiromi Suda, Ken-Ichiro Sibley, Pengfei Nie, Logan Battrell, Andrew Bayless, Harold Le Tulzo, Diane Bijou, Thérese Souza, Anthony
Gallegos, Jérôme Daviot - Technic France; Candice
Shinoda, Ken-Ichiro Mori - Canon, Inc.; Douglas Sam Ireland, Mark Fischer, Dan Markowitz, David Thomas, Edouard Deschaseaux, Céline Feautrier,
Shelton - Canon USA, Inc. Palsulich - Micron Technology, Inc. Jean Charbonnier, Alain Gueugnot - CEA-LETI; Jaber
Derakhshandeh, Tassawar Hussain - imec
17
 Program Sessions: Wednesday, May 29, 2:00 p.m. - 5:05 p.m.
Session 10: Novel 3D Integration and Hybrid Bonding Session 11: Next-Generation Artificial Intelligence, Session 12: Artificial Intelligence and Advanced Modeling
Solutions Quantum Computing, and Secure Packaging Approaches
Committee: Committee: Committee: Thermal/Mechanical Simulation
Assembly & Manufacturing Technology Emerging Technologies & Characterization

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

Zia Karim Rohit Sharma Yong Liu
Yield Engineering Systems IIT Ropar OnSemi
Email: zkarim@[Link] Email: rohit@[Link] Email: [Link]@[Link]

Wenhao (Eric) Li Santosh Kudtarkar KN Chiang

Intel Analog Devices National Tsinghua University
Email: [Link]@[Link] Email: [Link]@[Link] Email: knchiang@[Link]

1. 2:00 PM - Investigation of Distortion 1. 2:00 PM - Reworkable Superconducting 1. 2:00 PM - Machine-Learning Guided

in Wafer-to-Wafer Bonding With Highly Qubit Package for Quantum Computing Strain-Relief Patterns for Maximizing
Bowed Wafers Rabindra Das, John Cummings, Thomas Hazard, Stretchability of Printed Conductors
Shuo Kang, Serena Iacovo, Koen D’havé, Stefaan Van Danna Rosenberg, David Conway, Shireen Warnock, Rui Chen - Eastern Michigan University; Suresh
Huylenbroeck, Joeri De Vos, Gerald Beyer, Eric Beyne Michael Gingras, Cyrus Hirjibehedin, Bethany Huffman, Sitaraman - Georgia Institute of Technology
- imec; Thomas Plach, Gernot Probst, Taotao Ding, Steven Weber, Jonilyn Yoder, Mollie Schwartz - MIT
Markus Wimplinger, Thomas Uhrmann - EV Group, Lincoln Laboratory
Inc.

2. 2:20 PM - Development of 0.5 μm Pixel 2. 2:20 PM - AR-Enabled Soft Wearable 2. 2:20 PM - Development of Real-Time
3-Wafers Stacked CMOS Image Sensor With Electronics for Human-Machine Interfaces Thermal Monitoring of GaN-based Power
Through Silicon Deep Contact and In-Pixel Hodam Kim, Woon-Hong Yeo - Georgia Institute of Inverter Modules Using Digital Twin
Cu-to-Cu Bonding Process Technology Bin He, Gongyue Tang - Institute of Microelectronics
Do Yeon Kim - Samsung Electronics Co., Ltd. A*STAR; Jaydeep Saha, Rahul Sadanand Bhujade,
Sanjib Kumar Panda - National University of Singapore

3. 2:40 PM - Non-TCB Process Cu/ 3. 2:40 PM - Fine Pitch Nb-Nb Direct 3. 2:40 PM - Creep Parameters for Solder
SiO2 Hybrid Bonding Using Plasma-Free Bonding for Quantum Applications Interconnects by Nanoindentation Inverse-
Hydrophilicity Enhancement With NaOH for Pablo Renaud, Christophe Dubarry, Nicolas Bresson, FEA Method
Chip-to-Wafer Bonding Edouard Deschaseaux, Frank Fournel, Christophe Shidong Li, Christine Taylor, Charles Arvin - IBM
Yu-An Chen, Jia-Juen Ong, Wei-You Hsu, Shih-Chi Morales, Anne-Marie Papon, Candice Thomas - Corporation
Yang, Chih Chen - National Yang Ming Chiao Tung Grenoble Alps University/CEA-LETI; Jean Charbonnier
University; Wei-Lan Chiu, Hsiang-Hung Chang - - CEA-LETI
Industrial Technology Research Institute

Refreshment Break: 3:00 p.m. - 3:45 p.m.

4. 3:45 PM - A Novel Approach to Low 4. 3:45 PM - Si Interposer With Cu TSVs 4. 3:45 PM - Deep Convolution Neural
Temperature Bonding Using Single Wafer on Cu Substrate Thermally and Electrically Networks for Automatic Detection of
Thermal Processing System Anchoring Qubit Chips in Millikelvin Defects Which Impact Hybrid Bonding Yield
Masha Gorchichko, Shashank Sharma, Ben Ng, Tyler Assembly Oliver Zhao, Dominik Suwito, Bongsub Lee, Thomas
Sherwood, Yoocharn Jeon, Kun Li, Sarabjot Singh, Misato Taguchi, Takaaki Okidono, Takuji Miki, Makoto Workman, Laura Mirkarimi - Adeia
Evan Iler, Raghav Sreenivasan, Sid Krishnan - Applied Nagata - Kobe University
Materials, Inc.

5. 4:05 PM - Moving Towards 5. 4:05 PM - Novel Approach for 3D Defect 5. 4:05 PM - Experimentally Validated
Microchannel-Based Chip Cooling Detection and Metrology of HBMs Using Thermal Modeling Prediction for BEOL and
Paul Semenza, Gity Samadi - SEMI; Dave Thomas - SPTS Minimum Labeled Data BSPDN Stacks
Technologies, Ltd.; Garrett Oakes, Dave Kirsch - EV Ziyuan Zhao, Jie Wang, Richard Chang, Xulei Xinyue Chang - imec/KU Leuven; Herman Oprins,
Group, Inc.; Yin Hang - Meta Platforms, Inc.; Kuo-Chung Yang, Ramanpreet Pahwa - Institute for Infocomm Bjorn Vermeersch, Vladimir Cherman, Melina Lofrano,
Yee - Taiwan Semiconductor Manufacturing Company, Research A*STAR; Ser Choong Chong - Institute of Seongho Park, Zsolt Tokei, Ingrid De Wolf - imec
Ltd.; Michael Cumbie, Paul Benning - HP Inc.; Madhusudan
Iyengar - Google; Lihong Cao, William Chen - Advanced Microelectronics A*STAR
Semiconductor Engineering, Inc. (US)

6. 4:25 PM - Novel Inorganic Layer Based IR 6. 4:25 PM - Design and Fabrication of a 6. 4:25 PM - Analysis of Mechanical
Release Process for High Temperature W2W 2.5D Cryogenic Interposer With Integrated Behavior of Hybrid SAC-LTS Joints Under
and D2W Integration Superconducting TSVs and Resonators Temperature Cycling With a Modified
Thomas Uhrmann, Peter Urban, Boris Považay, King Jien Chui, Hongyu Li - Institute of Garofalo Creep Model
Michael Josef Gruber, Bernd Thallner, Markus Microelectronics A*STAR Souvik Chakraborty, Jeff Suhling - Auburn University;
Wimplinger - EV Group, Inc. Yaxiong Chen, Gaurav Sharma, Abdullah Fahim, Torsten
Hauck - NXP Semiconductor, Inc.; Ronit Das, Atif
Mahmood, Peter Borgesen - Binghamton University

7. 4:45 PM - D2W Hybrid Bonding System 7. 4:45 PM - PQC-HI: PQC-enabled Chiplet 7. 4:45 PM - ILD Crack Mechanical
Achieving Both High-Accuracy and High Authentication and Key Exchange in Reliability Mitigation
Throughput With Minimal Configuration Heterogeneous Integration Yutaka Suzuki, Williamson Jaimal, Rajen Murugan -
Kentaro Mihara, Takashi Hare, Hirofumi Sakai, Shimpei Md Sami Ul Islam Sami, Kimia Zamiri Azar, Hadi Texas Instruments, Inc.
Aoki, Toyoharu Terada - Toray Engineering Co., Ltd.; Mardani Kamali, Farimah Farahmandi, Mark
Mariappan Murugesan, Hiroyuki Hashimoto, Hisashi Kino, Tehranipoor - University of Florida
Tetsu Tanaka, Takafumi Fukushima - Tohoku University;
Fumihiro Inoue - Yokohama National University; Akira
Uedono - University of Tsukuba
18
 Program Sessions: Thursday, May 30, 9:30 a.m. -12:35 p.m.
Session 13: Next-Generation Substrate Manufacturing Session 14: Breakthrough Ultra-Fine Pitch Redistribution Session 15: Novel Materials and Process for Hybrid
Technologies Layer and Solder Bumping Technologies Bonding
Committee: Committee: Committee:
Packaging Technologies Interconnections Materials & Processing

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

Markus Leitgeb Seung Yeop Kook Ivan Shubin
AT&S GLOBALFOUNDRIES Raytheon Technologies
Email: [Link]@[Link] Email: [Link]@[Link] Email: ishubin@[Link]

Kuldip Johal Wei Zhou Dwayne Shirley

MKS Instruments- MSD Micron Marvel Semiconductor
Email: [Link]@[Link] Email: zhouwei@[Link] Email: shirley@[Link]

1. 9:30 AM - Development of Next 1. 9:30 AM - A Study on Improvement 1. 9:30 AM - Towards Standardization of

Generation Chemical Mechanical and Extension of Fine-Pitch Micro-Bump Hybrid Bonding Interface: In-Depth Study of
Planarization Processes for Panel-Level Interconnects Technology: New Metallurgy Dielectrics on Direct Bonding
Heterogeneous Integration & Flux-Less Oxide-removal Laser Assembly Yi Yang, Xavier F. Brun - Intel Corporation; Marco
Francoise Angoua, Aaditya Candadai, Daniel Rosales- (FLOLA) Flores - Arizona State University; Marc Weber -
Yeomans, Yosef Kornbluth, Dilan Seneviratne, Rahul Seok-Geun Ahn, Ju-Hyeon Oh, Gwang-Jae Jeon, Dae- Washington State University
Manepalli - Intel Corporation Ho Lee, Seok-Hyun Lee - Samsung Electronics Co.,
Ltd.

2. 9:50 AM - Dry Processes to Form Fine 2. 9:50 AM - A Novel Copper Microporous- 2. 9:50 AM - Demonstration of Low
Via/Trench and Seed Layer on Advanced Assisted Bonding Method for Fine-Pitch Cu/ Temperature Cu-Cu Hybrid Bonding Using a
Substrate Sn Microbump 3D Interconnects Novel Thin Polymer
Wen Xiao, Qin Zhong, Cindy Mora, Anindarupa Keyu Wang, Shuhang Lyu, Tiwei Wei - Purdue Yasuhisa Kayaba, Takuo Shikama, Wataru Okada,
Chunder, Nicholas Loo, Sik Hin Chi, Cheng Sun, University Kahori Tamura, Yuzo Nakamura, Yutaka Hisamune,
Weihua Qing, Harish V Penmethsa, Craig Rosslee, Jeff Rikia Furusho - Mitsui Chemicals, Inc.
Turner - Applied Materials, Inc.

3. 10:10 AM - Direct Laser Patterning Using 3. 10:10 AM - Challenges and Innovations 3. 10:10 AM - Process Challenges in Thin
Excimer Laser on Polyimide Compositions in Dual Damascene Polymer RDL With 2 μm Wafers Fabrication With Double Side Hybrid
With Low Dielectric Properties and Good Pitch and Beyond Bond Pads for Chip Stacking
Flexibility for Re-Distribution Layer Benjamin Briggs, Roger Quon, Chris Bencher, Ryan Dileep Kumar Mishra, Nagendra Sekhar Vasarla,
Kanta Wataji, Akira Suwa, Junichi Fujimoto, Yasuhumi Ley, C.C. Chuang, Peng Suo, Andy Chang Bum Yong, Chandra Rao Bhesetti, Ser Choong Chong, Srinivasa
Kawasuji - Gigaphoton Inc; Takashi Yamaguchi, Taiyo Luisa Bozano, Jorge Fernandez, Prayundi Lianto, Rao Vempati - Institute of Microelectronics A*STAR
Nakamura, Takashi Tazaki - Arakawa Chemical Niranjan Khasgiwale, Siddarth Krishnan - Applied
Industries, Ltd.; Masaru Sasago - [Link] Materials, Inc.

Refreshment Break: 10:30 a.m.-11:15 a.m.

4. 11:15 AM - New Power Delivery Network 4. 11:15 AM - Void Migration Kinetics in Fine 4. 11:15 AM - Development of Low
(PDN) Approach for Extremely Large Line Cu RDL Under Electric Current Stressing Temperature Processable Polyimides for
FC-BGA With Organic Substrate Based on and the Improvement of Electromigration Organic Hybrid Bonding Applications
Over 1 mm-Thick Core Reliability by Polyimide Passivation Kota Nomura, Masaya Jukei, Hitoshi Araki, Yu Shoji
Kyojin Hwang, Woobin Jung, Junghwa Kim, Heeseok Yen-Cheng Huang, Kwang-Lung Lin - National Cheng - Toray Industries, Inc.; Takenori Fujiwara - Toray
Lee, Jisoo Hwang, Heejung Choi - Samsung Electronics Kung University; Min-Yan Tsai, Ting-Chun Lin, Yung- Singapore Research Center
Co., Ltd. Sheng Lin - Advanced Semiconductor Engineering,
Inc. (US)

5. 11:35 AM - X-Ray Photoelectron 5. 11:35 AM - Reliable Chiplet Integration 5. 11:35 AM - Effect of (111) Surface Ratio
Spectroscopy (XPS) Investigations to Monitor on High Density Laminate (2.X D) for AI on the Bonding Quality of Cu-Cu Joints
the Surface Chemistry During Palladium- Hardware Huang Jian-Yuan, Chen Chih - National Yang Ming
Free Colloidal Copper Activation Divya Taneja, Jonathan Pouliot-Grenier, Isabel de Chiao Tung University
Ibbi Ahmet, André Beyer, Laurence J. Gregoriades, Sousa - IBM Canada, Ltd.; Joseph Ross, Sathya
Julia Lehmann, Yvonne Welz - Atotech (MKS Raghavan, Griselda Bonilla - IBM Research; Horiyuki
Instruments) Mori - IBM Research, Tokyo; Brian Quinlan Quinlian,
Thomas Wassick - IBM Systems

6. 11:55 AM - Development of Glass 6. 11:55 AM - Zero-Misalignment 6. 11:55 AM - Copper Microstructure

Core Substrate With the Stress Analysis, Technology Achieves 333 IO/mm/Layer on Optimization for Fine Pitch Low
Transmission Characteristics and Reliability Mold Temperature Cu/SiO2 Hybrid Bonding
Koji Fujimoto, Yashuhiro Okawa, Takahiro Tai, Satoru Veronica Strong, Trianggono Widodo, Holly Sawyer, Marie Maubert, Mathilde Gottardi, Pierre-Emile Philip,
Kuramochi - DNP Co., Ltd. Carolyn Aubertine, Aleksandar Aleksov, Johanna Swan Emilie Fragnaud, Gilles Romero, Arnaud Cornelis, Hadi
- Intel Corporation Hijazi - Grenoble Alps University/CEA-LETI; Frank
Fournel, Maria-Luisa Calvo-Munoz - CEA-LETII

7. 12:15 PM - High Aspect Ratio (AR) 7. 12:15 PM - Charting a Path for the 7. 12:15 PM - Nanoporous Copper: Just
Through Glass Via (TGV) Etch Performance Chiplet Era and Beyond With Deep How Much Can this Compliant Bonding
on Glass Core Substrates for High Density Submicron RDLs Interface Relax Flatness and Coplanarity
3D Advanced Packaging Applications Craig Bishop - Deca Technologies, Inc.; Andrew Requirements in Copper-to-Copper
Venugopal Govindarajulu, Coby Tao, Zia Karim, Ceballos, Kenneth MacWilliams - Multibeam Bonding?
Aneelman Brar - Yield Engineering Systems; Sung Jin Corporation; Timothy Michalka - TLM Technologies, Ali Amirnasiri, Ramon Sosa, Antonia Antoniou,
Kim - Absolics LLC Vanessa Smet - Georgia Institute of Technology

19
 Program Sessions: Thursday, May 30, 9:30 a.m. -12:35 p.m.
Session 16: Reliability of High-Density and High-Power Session 17: Advanced Additive Manufacturing for Printed Session 18: Radio Frequency Antenna-in-Package and
Packages Electronics and Integrated Systems Component Design
Committee: Committee: Committee:
Applied Reliability Emerging Technologies RF, High-Speed Components & Systems

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

Scott Savage Xinpei Cao Amit P. Agrawal
Medtronic Microelectronics Henkel Corporation AMD
Email: [Link]@[Link] Email: [Link]@[Link] Email: ap_agrawal@[Link]

Nokibul Islam Tengfei Jiang Sungwook Moon

JCET Group University of Central Florida Samsung
Email: [Link]@[Link] Email: [Link]@[Link] Email: [Link]@[Link]

1. 9:30 AM - Structural Characterization 1. 9:30 AM - Embedded RF Packaging Via 1. 9:30 AM - Design and Simulation Study
of 2.5D System in Package Combined With Ceramic 3D Printing and Printed Electronics of 300-GHz Molded Patch Antenna in
High Bandwidth Memory for Enhanced Additive Manufacturing Packaging Substrate
Quality and Reliability Abdullah Obeidat, Mohammed Abdelatty, Ashraf Harshpreet Singh Phull Bakshi, Rajen Murugan,
Byoungdo Lee, Jinwoo Choi, Sangyong Lee, Jinwoo Umar, Zhi Dou, Firas Alshatnawi, Riadh Al-Haidari, Sylvester Ankamah-Kusi - Texas Instruments, Inc.
Park, Gyujei Lee, Kangwook Lee - SK Hynix, Inc. Waleed Al-Shaibani, Mohammed Alhendi, Mark Poliks
- Binghamton University; Cathleen Hoel, Jason Case,
Joseph Iannotti - General Electric Company

2. 9:50 AM - Reliability Investigations of 2. 9:50 AM - A CMOS Nanosensing 2. 9:50 AM - Wideband Antennas on Thin-
Advanced Photosensitive Polymer based RDL Platform for Continuous Brain Multianalyte Film Packaging Substrates for 140 GHz 6G
Processes Protected by Inorganic Capping Monitoring Applications
Layers Yue Gu, Jesus Maldonado Vazquez, De-Shaine Murray, Thi Huyen Le, Michael Phillip Kaiser, Julia-Marie Köszegi,
Emmanuel Chery, Nelson Pinho, Eric Beyne - imec; Hitten Zaveri, Dennis Spencer - Yale University Kavin Senthil Murugesan, Lutz Gerhold, Ivan Ndip, Martin
Ritwik Bhatia, Ganesh Sundaram - Veeco Schneider-Ramelow - Fraunhofer IZM; Habib Hichri -
Ajinomoto Fine-Techno USA Corporation; Ryohei Oishi,
Reki Nakano - Ajinomoto Co., Inc.

3. 10:10 AM - Indium Thermal Interface 3. 10:10 AM - Novel Sub-THz Antenna SoP 3. 10:10 AM - Miniaturized High-Efficiency
Material (TIM) Degradation: Bake Modules Enabled by Micrometer-Scale Substrate Integrated Waveguide (SIW) Cavity
Experiments, Models, and Reliability Metal 3D Printing for B5G/6G Applications Slot Antenna at 28 GHz Based on Through
Implications Genaro Soto Valle Angulo, Kexin Hu, Manos M. Fused-Silica Via (TFS) Technology
Amir Behnam, Chris Dmuchowski, Kaushik Mysore - Tentzeris - Georgia Institute of Technology Hanna Jang, Payman Pahlavan, Yong-Kyu Yoon -
Advanced Micro Devices, Inc. University of Florida

Refreshment Break: 10:30 a.m.-11:15 a.m.

4. 11:15 AM - Methods for Non-Destructive 4. 11:15 AM - Direct-Write Printed RRAM 4. 11:15 AM - A Compact mmWave 1x4
Failure Analysis of Hybrid Bonded Cells Antenna Array Design With Shorted Parasitic
Components Jordan Howard-Jennings, Riadh Al-Haidari, Emuobosan Elements for 5G AiP Applications
Matthew Bahr, Jeremy Walraven, William Mook, Enakerakpo, Stephen Gonya, Mohammed Alhendi, Sheng-Chi Hsieh, Cheng-Yu Ho - Advanced
Amun Jarzembski, Wyatt Hodges, William Delmas, Mark Poliks - Binghamton University; Kevin Bell, Tom Semiconductor Engineering, Inc. (US)
Zachary Piontkowski, Matthew Jordan - Sandia Rovere - Lockheed Martin
National Laboratories

5. 11:35 AM - Electromigration Failure 5. 11:35 AM - Micro-3D Printing of Packaging 5. 11:35 AM - High-Performance Polymer
Mechanisms of Cu-Cu Joints at Low Stressing Substrates With Embedded Through Holes for Microwave Fiber Coupler in eWLB Package
Temperatures Fan-Out Interposers for Sub-THz Communication
Shih-Chi Yang - Department of Materials and Science Jimin Kwon, Guk Cho, Yechan Han, Subo Heo, Seongmin Eum, Hyeonho Vasileios Liakonis - Infineon Technologies AG/National
Engineering; Chih Chen - National Yang Ming Chiao Gu - Ulsan National Institute of Science & Technology; Haksoon Jung - Technical University of Athens; Yannis Papananos
Tung University Pohang University of Science and Technology (POSTECH); Yunsik Park - National Technical University of Athens; Maciej
- Korea Electronics Technology Institute; Hyunjin Park - Korea Research
Wojnowski, Walter Hartner - Infineon Technologies
Institute of Chemical Technology
AG

6. 11:55 AM - A Data-Driven Machine 6. 11:55 AM - A Novel Fully Additive 6. 11:55 AM - RF Modelling and
Learning Model to for the Stress-Strain Fabrication Approach for Creating Double- Characterization of TSV and Inductive Links
Behavior of Single Grain SAC305 Solder Stacked Copper Spiral Inductors of Hybrid Bonding
Joints Roghayeh Imani, Shailesh Chouhan, Jerker Delsing Xiao Sun, Chin-Ya Su, Shih-Hung Chen, Soon Aik
Debabrata Mondal, Jeffrey Suhling, Elham Mirkoohi, - Lulea University of Technology; Sarthak Acharya - Chew, Boyao Zhang, Eric Beyne - imec
Pradeep Lall - Auburn University University of Oulu

7. 12:15 PM - BGA Electromigration 7. 12:15 PM - A Flexible Composite Heat 7. 12:15 PM - Terahertz Metasurfaces on
Performance and Why it Has Become the Sink Embedded Ag Microchannels for Flex Using Aerosol Jet Printing and a Novel
Bottleneck Potential Flexible Electronic Applications Parylene Liftoff Process
Riet Labie, Chinmay Nawghane, Dimitrios Tsiakos, Han Cai, Yongjin Wu, Yanxin Zhang, Yunna Sun, Sambit Kumar Ghosh, Ethan Kepros, Yihang Chu,
Jan Mertens - imec; Wolfgang Sauter, Eric Tremble, Zhuoqing Yang, Guifu Ding - Shanghai Jiao Tong Bhargav Avireni, Brian Wright, Premjeet Chahal -
Richard Graf - Marvell Technology, Inc. University; Jiangbo Luo - Shanghai Aerospace Michigan State University
Electronic and Communication Equipment Research
Institute
20
 Program Sessions: Thursday, May 30, 2:00 p.m. - 5:05 p.m.
Session 19: 3D Integration Copper-Copper Hybrid Session 20: Novel High-Density 3D & Thru-Via Structures Session 21: Innovations in Polymer Packaging Materials
Bonding and Processes Committee:
Committee: Committee: Committee:
Packaging Technologies Interconnections Materials & Processing

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

John Knickerbocker David Danovitch Zhanhming Zhou
IBM Corporation University of Sherbrooke Qualcomm
Email: knickerj@[Link] Email: [Link]@[Link] Email: [Link]@[Link]

Peng Su Yoshihsia Kagawa Mark Poliks

Juniper Networks Sony Binghamton University
Email: pensu@[Link] Email: [Link]@[Link] Email: mpoliks@[Link]

1. 2:00 PM - Next Generation Low 1. 2:00 PM - Integration of Planarized 1. 2:00 PM - High Performance Insulation
Temperature SoIC With 200 nm Bond Pitch Nb-Based Vias to Form a Multi-Level Materials for Panel-Scale RDL on Glass
Wei-Ming Wang, C.W. Yeh, Han-Jong Chia, R.F. Superconducting Back-End-of-Line Substrate
Tsui, Ji James Cui, Chih-Hang Tung, Kuo-Chung Candice Thomas, Edouard Deschaseaux, Rémi Shiro Tatsumi - Ajinomoto Co., Inc.
Yee, Douglas C.H. Yu - Taiwan Semiconductor Vélard, Giovanni Romano, Jean-Philippe Michel,
Manufacturing Company, Ltd. Norman Vivien, Richard Souil, Cassandre Beluffi,
Catherine Pellissier, Jean Charbonnier - Grenoble Alps
University/CEA-LETI

2. 2:20 PM - Low Resistance and High 2. 2:20 PM - Observation of Thermal 2. 2:20 PM - Development of UV-Curable
Isolation HD TSV for 3-Layers CMOS Image Expansion Behavior of Nanotwinned-Cu/ Molding Materials With Minimum Die-Shift
Sensors SiO2 & Regular-Cu/SiO2 Hybrid Structure for FOWLP/FOPLP
Stéphan Borel, Myriam Assous, Rémi Velard, Jerzy- Via In-Situ Heating AFM Markus Schindler, Severin Ringelstetter - DELO
Javier Suarez-Berru, Stéphane Nicolas, Jérôme Huai-En Lin, Chih Chen - National Yang Ming Chiao Industrial Adhesives; Mariana Pires, Mikhail Begel,
Dechamp, Renan Bouis, Lionel Vignoud, Paul Valentin, Tung University; Wei-Lan Chiu, Hsiang-Hung Chang - Andrea Kneidinger, Markus Wimplinger, Thomas
Jérémy Marchand, Antonio Roman, Messaoud Industrial Technology Research Institute Uhrmann - EV Group, Inc.
Bedjaoui - Grenoble Alps University/CEA-LETI

3. 2:40 PM - Integrated Hybrid Bonding 3. 2:40 PM - 3D Interconnects for Quantum 3. 2:40 PM - Temperature-Dependent
System for the Next Generation Advanced Computing Dielectric Characterization of Low Loss Thin
3D Packaging Jaber Derakhshandeh - imec Film Polymers up to Sub-THz Bands
Raymond Hung, Gilbert See, Ying Wang, Chang Bum Kavin Senthil Murugesan, Jens Schneider, Michael
Yong, Ke Zheng, Yauloong Chong, Avi Shantaram, Kaiser, Julia-Marie Köszegi, Lutz Gerhold, Ivan Ndip,
Ruiping Wang, Arvind Sundarrajan - Applied Materials, Martin Schneider-Ramelow - Fraunhofer IZM; Habib
Inc.; Nithyananda Hedge, Setfan Schmid, Manfred Hichri, Ryohei Oishi, Reki Nakano - Ajinomoto Fine-
Glantschnig - Besi NL Techno USA Corporation

Refreshment Break: 3:00 p.m. - 3:45 p.m.

4. 3:45 PM - Process Development and 4. 3:45 PM - Laser Drilling of Around 4. 3:45 PM - Low-Temperature Polymer
Performance Benefits of 0.64 μm - 0.36 μm 3-Micron Via Into Ajinomoto Build-Up Film Hybrid Bonding With Nanopaticulated Cu
Pitch Hybrid Bonding on Intel Process Toshio Otsu, Shuntaro Tani, Hiroharu Tamaru, Yohei and Photosensitive Acrylic Adhesive
Tushar Talukdar, Adel Elsherbini, Kimin Jun, Brandon Kobayashi - University of Tokyo; Shoko Nagayama, Hirokatsu Sakamoto, Tadashi Teranishi, Rumi Nagai,
Rawlings, Richard Vreeland, William Brezinski, Haris Ryo Miyamoto - Ajinomoto Fine-Techno Co., Inc.; Ryo Itaya, Akihiko Happoya - Daicel Corporation;
Niazi, Siyan Dong, Yi Shi, Pilin Liu, Xavier Brun, George Okada - Spectronix Corp., Ltd.; Naoyuki Hideaki Tamate - T-Micro; Takafumi Fukushima -
Johanna Swan - Intel Corporation Nakamura, Junichi Nishimae - Mitsubishi Electric Tohoku University
Corporation

5. 4:05 PM - Methodologies for 5. 4:05 PM - Thermo-Mechanical 5. 4:05 PM - Development of New Concept

Characterization of W2W Bonding Strength Reliability Analysis and Raman Spectroscopy Photo Imageable Dielectric Materials for
Mario Gonzalez, Kris Vanstreels, Oguzhan Orkut Characterization of Sub-micron Through Next Generation Advanced Packaging
Okudur, Serena Iacovo, Eric Beyne - imec Silicon Vias (TSVs) for Backside Power Kazuki Sato, Kazuaki Ebisawa, Makiko Irie, Yiyang
Delivery in 3D Interconnects Zhan, Atsushi Kubo - Tokyo Ohka Kogyo Co., Ltd.
Shuhang Lyu, Thomas Beechem, Tiwei Wei - Purdue
University

6. 4:25 PM - Enhanced Biased HAST 6. 4:25 PM - Organic Interposers Using 6. 4:25 PM - The Development of Thick
Reliability of Polyimide for High-Density Zero-Misalignment-Via Technology and Core Material for Cutting Edge Packaging
Redistribution Layers Silicon Wafer Carriers for Large Area Tomo Mugurma, Tom Shin - Panasonic Industrial
Takumi Onuma, Daisaku Matsukawa, Takahiro Tanabe Wafer-Level Package Applications Devices Sales Company of America; Masafumi Honma,
- HD MicroSystems LLC Alekdandar Aleksov, Tushar Talukdar, Veronica Teppei Washio, Yuichi Ishikawa, Yutaka Tashiro,
Strong, Holly Sawyer, Carolyn Aubertine, Johanna Hirosuke Saito, Jun Yasumoto, Genki Takahashi,
Swan, Thomas Sounart - Intel Corporation Yoshiki Okushima - Panasonic Industry Co., Ltd.

7. 4:45 PM - Facile Wafer-to-Wafer Hybrid 7. 4:45 PM - Bendability Enhancement and 7. 4:45 PM - Development of Magnetic
Bonding Integration at Sub 0.5 µm Pitch Miniaturization of Through-X Via (TXV) Molding Compound for Low Pressure
Hemanth Kumar Cheemalamarri, San Sandra, Based on Flexible Fan-Out Wafer-Level Molding Inductors With Both Good
Arvind Sundaram, Anh Tran Van Nhat, Chen Gim Packaging With Additive Tiny Cu Pillar Magnetic Properties and High Reliability
Guan, Chandra Rao Bhesetti, Steven Lee Hou Jang, Assembly Hiroki Sonokawa, Yoshinori Endo, Mika Tanaka,
Raju Mani, Nandini Venkataraman, King Jien Chui, Atsushi Shinoda, Chang Liu, Akihiro Tominaga, Hisashi Takashi Inagaki, Teruo Ito - Resonac Corporation
Srinivasa Rao Vempati, Singh Navab - Institute of Kino, Tetsu Tanaka, Takafumi Fukushima - Tohoku
Microelectronics A*STAR University
21
 Program Sessions: Thursday, May 30, 2:00 p.m. - 5:05 p.m.
Session 22: Signal & Power Integrity for Advanced Session 23: Novel Bonding Technology for Advanced Session 24: Advances on Flex and Redistribution Layer
Packages and Systems Assembly Substrates and Integration Technologies and Warpage
Committee: Committee: Committee: Thermal/Mechanical Simulation
RF, High-Speed Components & Systems Assembly & Manufacturing Technology & Characterization

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

Hideki Sasaki Valerie Oberson Ning Ye
Rapidus IBM Western Digital
Email: [Link]@[Link] Email: voberson@[Link] Email: [Link]@[Link]

Srikrishna Sitaraman Pascale Gagnon Rui Chen

Marvel IBM Eastern Michigan University
Email: srikrishna. sitaraman@[Link] Email: pgagnon@[Link] Email: rchen7@[Link]

1. 2:00 PM - High Bandwidth and Energy 1. 2:00 PM - Advanced Thermocompression 1. 2:00 PM - Accurate Prediction of Solder
Efficient Electrical-Optical System Bonding Application on High Density Fan-Out Stresses/Strains in Multi-Layered Electronics
Integration Using COUPE Technology Embedded Bridge Technology for HPC/AI/ML Packages During Temperature Cycling
Chih-Hsin Lu, Chia-Chia Lin, Tzu-Chun Tang, Chung- Wiwy Wudjud, Lihong Cao - Advanced Semiconductor Xuejun Fan, Mukunda Khanal, Jiang Zhou - Lamar
Yi Lin, Jay Chang, Chung-Hao Tsai, Harry Hsia, J.C. Engineering, Inc. (US); ShuYu Lin, Yungshun Chang, Jean University
Twu, C.S. Liu, Gene Wu, Kuo-Chung Yee, Douglas Yu Yen, Reno Liao, Leo H.S. Cheng, YiHsien Wu, Simon Y.L.
- Taiwan Semiconductor Manufacturing Company, Ltd. Huang, Ivan R.C. Chen, ChengYu Lee, Joey C.I. Huang -
Advanced Semiconductor Engineering, Inc.

2. 2:20 PM - High Frequency Assessment 2. 2:20 PM - Various Defect Mechanism 2. 2:20 PM - Comparison of Sustainable and
of Djordjevic-Sarkar Model for Low Loss Analysis for Optimization of Vacuum Fluxless Non-Sustainable Ink Process-Performance
Package Dielectrics Solder Reflow Performance Using 10 µm or Interactions for Additively Printed Circuits
Cemil Geyik, Michael Hill, Zhichao Zhang, Kemal Below Microbumps Pradeep Lall, Ved Soni, Sabina Bimali, Daniel Karakitie -
Aygun - Intel Corporation Lei Jing, Alvin Lin, Xinxuan Tan, Anderson Chen, Auburn University; Scott Miller - NextFlex
Vladimir Kudriavtsev, Lucky Murugesh, Zia Karim -
Yield Engineering Systems

3. 2:40 PM - System Level Analysis and 3. 2:40 PM - Chip-on-Wafer (CoW) 3. 2:40 PM - Simulation and Metrological
Design Optimization of Back-Side Power Technology Utilizing Laser-Assisted Bonding Applications for RDL Patterning
Delivery Network for Advanced Nodes With Compression (LABC) for Bump Counts Development of Glass Substrate
Kyunghwan Song - Samsung; Sungwook Moon - Exceeding 500,000 at a 20 µm Pitch Chang-Chun Lee - National Tsing Hua University; Jui-
Samsung Electronics Co., Ltd.-Foundry Business; Kwang-Seong Choi, Jiho Joo, Gwang-Mun Choi, Jungho Shin, Chang Chuang - National Tsing Hua University/Industrial
Duhyoung Ahn, Hyeonjin Kim, Minseok Kang - Chanmi Lee, Ki-Seok Jang, Jin-Hyuk Oh, Ho-Gyeong Yun, Technology Research Institute; Chen-Tsai Yang, Chung-I Li
Foundry Business, Samsung Electronics Seok Hwan Moon, Ji Eun Jung, Gaeun Lee, Yong-Sung Eom - - Industrial Technology Research Institute; Shih-Hsien Lee,
Electronics and Telecommunications Research Institute Shih-Hao Kuo - Applied Materials, Inc.

Refreshment Break: 3:00 p.m. - 3:45 p.m.

4. 3:45 PM - PDN Impedance Optimization 4. 3:45 PM - Novel Molded FCBGA Package 4. 3:45 PM - An AI-Assisted Automated
of AR/VR Systems: A Trade-Off in VRM Platform for Highly Reliable Automotive Computational Framework for Warpage
Bandwidth and Board Decouplings Applications Prediction of Advanced Electronic Packaging
Wendem Beyene, Ling Jiang, Koichi Yamaguchi, Inrack Kim, Nari Kim, Gayoung Shin - Amkor Yu-Jui Liang, Jui-Pu Hsia, Chin-Hung Lai, Cong-Sheng
Xiaoping Liu, Ashkan Hashemi - Meta Platforms, Inc. Technology Korea; Youngdo Kweon - Amkor Su, Yu-Chi Huang, Jian-Ren Hou - National Cheng
Technology, Inc. Kung University; Xian-Zheng Huang, Wei-Long Chen -
Advanced Semiconductor Engineering, Inc. (US)

5. 4:05 PM - Physical-Based Package 5. 4:05 PM - Study of Fabrication and 5. 4:05 PM - Investigation of Mechanical
Verification Methodology for High-Speed Reliability for 120 mm x 120 mm Extremely Reliability of Flexible/Stretchable Electronic
Channel Crosstalk and Correlation With BER Large Advanced 2.5D Package Materials Using Multi-Axial Stretch
Measurements Kazue Hirano, Dongchul Kang, Sadaaki Katoh, Masaki Techniques
Po-Wei Chiu, Chao-Chin Lee, Guan-Yu Lin, Jinsung Takahashi - Resonac Corporation Kaushik Godbole, Benjamin Stewart, Suresh Sitaraman
Youn, Youngsoo Lee, Hong Shi, Alan Fang, Santiago - Georgia Institute of Technology; Nicholas Ginga -
Asuncion - Advanced Micro Devices, Inc. University of Alabama in Huntsville

6. 4:25 PM - An Energy Efficient DDR5 6. 4:25 PM - Thin Substrate Bonding 6. 4:25 PM - Simulation Methodologies for
I/O Performance Boost in Clamshell Partia Naghibi - HRL Laboratories, LLC Warpage Prediction and Localized Stress
Configuration by Charge Pumping From Hotspot Detection for SMT Risk Assessment
Non-Target Device Zhi Yang, Igor Arsovski, Clint Harames, Jim Miller -
Ryuichi Oikawa - Renesas Electronics Corporation Groq; Krishna Mellachervu - ANSYS, Inc.

7. 4:45 PM - Signal Integrity Analysis and 7. 4:45 PM - High-Throughput 7. 4:45 PM - Analyzing the Influence of RDL
Design Optimization Using Neural Networks Characterization of Nanoscale Stack-Up on Wafer Warpage in FOWLP
Juhitha Konduru, José Schutt-Ainé - University of Topography for Hybrid Bonding by Optical Through Experimental and Numerical
Illinois; Oleg Mikulchenko, Loke Yip Foo - Intel Interferometry Investigations
Corporation Bongsub Lee, Oliver Zhao, Arianna Avellán, Suhail Saskia Huber, Philipp Scheibe, Sükrücan Mutlu, Olaf
Sadiq, Gill Fountain, Dominik Suwito, Guilian Gao, Wittler, Martin Schneider-Ramelow - Fraunhofer IZM
Laura Mirkarimi - Adeia

22
 Program Sessions: Friday, May 31, 9:30 a.m. -12:35 p.m.
Session 25: High-Performance Computing, Design Session 26: Chiplet Interconnect Design and Validation Session 27: Advanced Die Bond and Board Level
Challenges, and Solutions Reliability
Committee: Committees: Interconnections and RF, High- Committees: Materials & Processing and As-
Packaging Technologies Speed Components & Systems sembly & Manufacturing Technology

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

Eric Tremble Gang Duan Jason Rouse
Marvell Intel Taiyo America
Email: etremble@[Link] Email: [Link]@[Link] Email: jhrouse@[Link]

Young-Gon Kim Jaemin Shin Omkar Gupte

Renesas Electronics America Qualcomm Technologies AMD
Email: [Link]@[Link] Email: jaemins@[Link] Email: [Link]@[Link]

1. 9:30 AM - An Energy-Efficient 1. 9:30 AM - Impact of Pitch Scaling on 3D 1. 9:30 AM - Effect of Chip-Package

Si-Integrated Micro-Cooler for High Power Die-to-Die Interconnects Variables on the Reliability of High Thermal
and Power-Density Computing Applications Nicolas Pantano, Michele Stucchi, Geert Van Der Plas, Die Attach Materials for RF, Power, and
Yu-Jen Lien, Cheng-Chieh Hsieh, Terry Ku, Li Wang, Eric Beyne - imec Automotive Applications
Po-Ju Chen, Kcyee Yee, C. H. Douglas Yu - Taiwan A R Nazmus Sakib, Ruther Ricon - Renesas Electronics
Semiconductor Manufacturing Company, Ltd. America; Jake Eom, Yoshitsugu Kawashima, Kosuke
Azuma, Ganesh Tharumalingam, Young Kim - Renesas
Electronics Corporation

2. 9:50 AM - High Power Thermal Test 2. 9:50 AM - A 32GB/s Full Duplex 2. 9:50 AM - The Challenges of High-
Vehicle With 2-Phase Cooling for AI Bi-Directional Transceiver With Crosstalk Temperature Lead-Free Solder Paste for
Datacenters, 5G RAN, and EDGE Compute Cancellation for Chiplet Interconnections Power Discrete Applications
Nodes Jae-Woo Park - Sungkyunkwan University; Nicolas Hongwen Zhang - Indium Corporation
Yang Liu, Nagesh Basavanhally, Mark Earnshaw, Pantano, Geert Van Der Plas, Eric Beyne - imec; Jung-
Todd Salamon, Rick Papazian, Ting-Chen Hu, Mark Hoon Chun - Sungkyunkwan University
Cappuzzo, Rose Kopf, David Apigo, Bob Farah -
Nokia Bell Labs

3. 10:10 AM - Block Level and Package 3. 10:10 AM - Modeling and Analysis 3. 10:10 AM - Reliability Analysis of Cu
Level Thermal Assessment for Back Side of Heterogeneously Integrated Chiplet- Sintered Die-Attach for SiC Power Devices:
Power Delivery Network to-Chiplet Communication Link in 2.5D Mechanical, Electrical, and Thermal
Melina Lofrano, Herman Oprins, Vladimir Cherman, Advanced Packaging Evaluation
Liesbeth Witters, Anne Jourdain, Geert Van der Plas, Haofeng Sun, Bobi Shi, Thong Nguyen, Jose Schutt- Xu Liu, Shaogang Wang, Dong Hu, Paddy French,
Eric Beyne - imec Aine - University of Illinois Guoqi Zhang - Delft University of Technology;
Chenshan Gao, Qianming Huang, Huaiyu Ye -
Southern University of Science and Technology

Refreshment Break: 10:30 a.m.-11:15 a.m.

4. 11:15 AM - Coax MIL 2.0 – Next 4. 11:15 AM - Signal, Power and Thermal 4. 11:15 AM - Complex Board Via Structure
Generation Coaxial Magnetic Package Core Co-Optimization Methodology for FPGA Induced Uneven Stress/Strain Impact on
Inductors for Higher Efficiency Integrated Advanced Package Interconnect Stability: SAC305, Full and
Voltage Regulators Wei Liu, Guang Chen, Brian Wang, Jenny Xiaohong Hybrid LTS Comparison
Beomseok Choi, Jaeil Baek, Brandon Marin, Jiang, Ed Milligan - Intel Corporation Tae-Kyu Lee, Yujin Park, Gnyaneshwar Ramakrishna
Shuren Qu, Siddharth Kulasekaran, Jose Chavarria, - Cisco Systems, Inc.; Jonghyun Nam, Daljin Yoon,
Leigh Wojewoda, Kaladhar Radhakrishnan - Intel Heera Roh - SK Hynix, Inc.
Corporation

5. 11:35 AM - Integrated Design Ecosystem 5. 11:35 AM - An Advanced Packaging 5. 11:35 AM - Mitigating Solder Beading
for Chiplets Heterogeneous Integration and Figure of Merit (AP-FoM) for Benchmarking in Non-Eutectic Low-Temperature Solder:
Chip-to-Chip Interconnects in Advanced of Heterogeneous Integration Technologies Mechanism and Solution
Packaging Technology Chuei-Tang Wang, Shu-An Shang, Yu-Ming Hsiao, Lip Teng Saw, Mutharasu Devarajan - Western Digital
Lihong Cao - Advanced Semiconductor Engineering, Mirng-Ji Lii, Kam Heng Lee, Jun He - Taiwan Corporation
Inc. (US); Chen-Chao Wang, Chih-Yi Huang, Hung- Semiconductor Manufacturing Company, Ltd.
Chun Kuo - ASE Corporate R&D Center

6. 11:55 AM - Thermal and Mechanical 6. 11:55 AM - Signal Integrity Designs at 6. 11:55 AM - Thermal Aging Reliability
Simulations of 3D Packages With Custom Organic Interposer CoWoS-R for HBM3-9.2 of Socketable BGA Packages With Bi-Au-
High Bandwidth Memory (HBM) Gbps High Speed Interconnection of 2.5D-IC Coated Sn Spheres
Kamalika Chatterjee, Yan Li, Pouya Asrar, WooPoung Chiplets Integration Jaewon Lee, Vanessa Smet - Georgia Institute of
Kim - Samsung Semiconductor, Inc. Sheng-Fan Yang, Wei-Chiao Wang, Yi-Tzeng Lin, Technology
Chih-Chiang Hung, Hao-Yu Tung, Justin Hsieh - Global
Unichip Corporation

7. 12:15 PM - A Novel DC-DC Converter 7. 12:15 PM - Effective Interface Simulation 7. 12:15 PM - Develop New Solder Alloy for
Module Using the Integrated Package Solution Approach Based on Peak Distortion Analysis High Reliability Device
(iPaS) Substrate for Next Generation High for UCIe IPs Albert T. Wu, Wei Ting Lin - National Central
Performance Computing (HPC) Applications Joonhyun Kim, Seungki Nam, Sungwook Moon, University; Watson Tseng, Chang-Meng Wang -
Shuhei Yamada, Nobuyoshi Adachi, Kazuki Itoyama, Taeyun Kim, Sangin You, Chanmin Jo, Yongho Lee - Shenmao Technology, Inc.
Tatsuya Kitamura, Koshi Himeda, Atsushi Yamamoto Samsung Electronics Co., Ltd.
- Murata Manufacturing Co., Ltd.; Keito Yonemori -
Murata Electronics North America, Inc.
23
 Program Sessions: Friday, May 31, 9:30 a.m. -12:35 p.m.
Session 28: Optical Interconnections Session 29: Reliability in Harsh Environments Including Session 30: Process and Hybrid Bonding Modeling and
Automotive Characterization
Committee: Committee: Committee: Thermal/Mechanical Simulation
Photonics Applied Reliability & Characterization

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

Ping Zhou Varughese Mathew Pradeep Lall
LDX Optronics NXP Semiconductors Auburn University
Email: pzhou@[Link] Email: [Link]@[Link] Email: lall@[Link]

Masao Tokunari Tae-Kyu Lee Xuejun Fan

IBM Cisco Systems Lamar University
Email: tokunari@[Link] Email: taeklee@[Link] Email: [Link]@[Link]

1. 9:30 AM - Fiber Array Attach for 1. 9:30 AM - Transitioning from Warpage 1. 9:30 AM - Modeling of Copper Hybrid
Co-Packaged Optics: High-Volume “Control” to Warpage “Design”: A Bonding Anneal
Production Process Control and Paradigm Shift Joshua Hooge, Chris Netzband - Tokyo Electron, Ltd.
Performance Sukrut Prashant Phansalkar, Bongtae Han - University
Paul Gond-Charton, Sebastien Gouin, Steve Pellerin, of Maryland
Louis-Michel Collin, Michelle Sevigny, Patrick Jacques,
Elaine Cyr - IBM Canada, Ltd.

2. 9:50 AM - Photonic Building Blocks for 2. 9:50 AM - Under Bump Metallization 2. 9:50 AM - Investigation of the Sintering
Board-Level Disaggregation in Hyperscale and the Stability of Solder Interconnect Dynamics of 100 nm Ag Nanoparticles via
Systems Assembly under Thermal and Electrical In Situ SEM Observation and Phase Field
Richard Pitwon - Resolute Photonics, Ltd.; Bernard Load: Refreshed Understanding Simulation
Lee, Tiger Ninomiya, Michael O’Farrell - Senko Hariram Mohanram - University of Texas, Arlington; Xiao Hu, Dong Hu, Willem Van Driel, Guoqi Zhang
Advance Components Choong Un Kim - United Test and Assembly Center, - Delft University of Technology; René Poelma -
Ltd.; Patrick Thompson, Qiao Chen, Sylvester Kusi - Nexperia; Jianlin Huang - Ampleon B.V.
Texas Instruments, Inc.

3. 10:10 AM - Interfacing Silicon Photonics 3. 10:10 AM - Additively Printed In-Mold 3. 10:10 AM - Elucidating the Mechanism of
for CPO Electronics Circuits and Sensors Process- Four Corner Voids in Chip-on-Wafer Hybrid
Geert Van Steenberge, Jef Van Asch, Viktor Geudens, Performance Interactions for Automotive Bonding
Toon De Baere, Nele De Moerlooze, Jeroen Missinne Applications Takaaki Hirano, Tatsumasa Hiratsuka, Hirotaka
- imec/Ghent University; Joris Van Campenhout - imec Pradeep Lall, Hyesoo Jang, Ved Soni, Fatahi Musa, Yoshioka, Naoki Ogawa, Suguru Saito, Shoji
Md Golam Sarwar - Auburn University; Scott Miller - Kobayashi, Yoshiya Hagimoto, Hayato Iwamoto - Sony
NextFlex Semiconductor Solutions Corporation

Refreshment Break: 10:30 a.m.-11:15 a.m.

4. 11:15 AM - High Power Performance 4. 11:15 AM - Enhancing Cu Wire-Bonding 4. 11:15 AM - Fan-Out Embedded
Assessment of Low-Loss Spot Size Converter Reliability by a Cu-Selective Passivation Bridge Structure for Co-Packaged Optics
based on Self-Aligned Passive Fiber Attach Coating Characterization and Evaluation
Process Dinesh Kumar Kumaravel, Logan Estridge, Kevin Vito Lin, Teny Shih, Andrew Kang, Yu-Po Wang -
Arpan Dasgupta, Jae Kyu Cho, Yusheng Bian, Takako Antony Jesu Durai, Khanh Tran, Oliver Chyan - Siliconware Precision Industries Co., Ltd.
Hirokawa, Zahidur Chowdhury, Farid Barakat, John University of North Texas; John Alptekin - Texas
Garant, Yarong Lin, Thomas Houghton, Arman Najafi, Instruments, Inc.; Varughese Mathew - NXP
Ryan Sporer, Michelle Zhang - GlobalFoundries, Inc. Semiconductor, Inc.

5. 11:35 AM - A Compact, High 5. 11:35 AM - High Acceleration Dynamic 5. 11:35 AM - Advanced Atomic-Scale
Performance Passive Optical Network Methodology for Board-Level Shock Solder Insights Into the Chemical Mechanical
Transceiver Integration Approach Joint Reliability Approach Polishing Process With Ceria Abrasives Using
Mark Earnshaw, Cris Bolle, Robert Farah, Rose Kopf, Min-Cheng Yu, Nan-Yi Wu, Wu-Lung Wang, Hsin- Molecular Dynamics and Neural Network
Mark Cappuzzo, Tzu-Yung Huang, Cuong Tran, Tam Chih Shih, Wei-Hong Lai, Chin-Li Kao, Alexcc Wang Potential
Huynh - Nokia Bell Labs - Advanced Semiconductor Engineering, Inc.; Cp Hung Yoshishige Okuno, Teruo Hirakawa, Fukiko Ota,
- Advanced Semiconductor Engineering, Inc. (US) Hiromu Kubo, Yuuto Kurata, Akihiro Orita, Satoyuki
Nomura - Resonac Corporation

6. 11:55 AM - Structural Design of 6. 11:55 AM - Thermomechanical 6. 11:55 AM - Finite Element Modeling for
Waveguide for Low Loss Adiabatic Coupler Degradation of Sintered Copper Under Wafer-to-Wafer Direct Bonding Behaviors
With Si Photonics Chip High-Temperature Thermal Cycling and Alignment Prediction
Takaaki Ishigure, Fumimasa Kondo - Keio University; Paul Paret, Sreekant Narumanchi - National Kyungmin Baek, Min-soo Han, Il Young Han, Jung Shin
Yuji Furuta, Hisashi Kaneda, Tomoharu Fujii - Shinko Renewable Energy Laboratory; Sri Krishna Bhogaraju Lee, Jaeuk Sim, Joongha Lee, Daeho Min, Kyeongbin
Electric Industries Co., Ltd. - CuNex GmbH; Dirk Busse, Alexander Dahlbüdding Lim - Samsung Electronics Co., Ltd.; Minwoo Daniel
- Budatec GmbH; Gordon Elger - Technical University Rhee - Samsung
of Applied Science Ingolstadt

7. 12:15 PM - Hybrid Integrated Chip-Scale 7. 12:15 PM - Solder Reaction With Lead- 7. 12:15 PM - Measurement of the
Laser Systems Based on Automated Assembly frame of Cu Alloy C7025 and Its Effect on Interfacial Properties of Thin Metal Film
Xiaolei Zhao, Taylor Levaur, Lance Sweatt, Md. Arefin Joint Reliability by Laser Spallation Method for Advanced
Islam, Lin Zhu - Clemson University Kejun Zeng, Venu Chauhan, Lance Wright - Texas Wafer Level Package
Instruments, Inc. Young-Min Ju, Jin-Young Kim, Hui-Jin Um, Se-Min Lee,
Dukyong Kim, Woong-Kyoo Yoo, Seung Hwan Lee,
Hak-Sung Kim - Hanyang University; Daewoong Lee,
Yeontaek Hwang - SK Hynix, Inc.
24
 Program Sessions: Friday, May 31, 2:00 p.m. - 5:05 p.m.
Session 31: Advances in Flip Chip and Chip Scale Session 32: Advancement in Copper Hybrid Bonding Session 33: Fine-Pitch Materials and Processes
Packages Technologies Common to Multiple Applications Committee:
Committee: Committee: Committee:
Packaging Technologies Interconnections Materials & Processing

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

Luu Nguyen Thom Gregorich Praveen Pandojirao-S
Psi Quantum Infinera Johnson & Johnson
Email: lnguyen@[Link] Email: tmgregorich@[Link] Email: praveen@[Link]

Glenn Ning Ge Vempati Srinivasa Rao Bo Song

TetraMem IME A-star HP Inc.
Email: [Link]@[Link] Email: vempati@[Link] Email: [Link]@[Link]

1. 2:00 PM - New Double Sided Molded 1. 2:00 PM - A Microstructural Investigation 1. 2:00 PM - The Patterned Photosensitive
Package Platform Development With Open of Sub-10 µm Pitch Copper Contact Dielectric Organic Material/Cu Simultaneous
Cavity Mold on One Side and Exposed Die Structures and Bonded Copper in Hybrid Novel CMP Process for Fine Damascene RDL
Mold on the Other Side Bonding Based on Process Design Assisted by Deep
MiKyeong Choi, HoSeung Seo, SeMin Gim, GyeongCheol Lee, Sari Al Zerey, Junghyun Cho - State University of New Learning
Toshiaki Tanaka, Masaaki Yasuda, Takeyasu Saito, Masaru Sasago, Yoshihiko
JungHoon Na, GaHyeong Hwang, WonBae Bang, KiDong Sim, York at Binghamton; Roy Yu, Katsuyuki Sakuma - IBM Hirai - Osaka Metropolitan University; Hideaki Nishizawa - Doi Laboratory,
WonChul Do, KyungRok Park - Amkor Technology Korea; Ted Research Inc.; Toshiro Doi - Doi Laboratory Inc.; Mitsuru Ozono, Hiroaki Kimuro,
Hisatoshi Hirai - Advanced Industrial Science and Technology, Kyushu Center;
Adlam, Jeff Davis - Amkor Technology, Inc. Seiji Takahashi, Yoichi Minami - Lithotech Japan Corp.

2. 2:20 PM - Package Miniaturization and 2. 2:20 PM - Low-Temperature Cu-Cu 2. 2:20 PM - Novel Negative-Tone Dry Film
Wiring Impedance Reduction for High- Bonding Using <111>-Oriented and Resist and Process for Fine Pitch Copper
Bandwidth Memory Devices With Vertical Nanocrystalline Hybrid Surface Grains Wiring With L/S = 1.5/1.5 µm on Build-Up
Wire Bonding Chen-Ning Li, Jia-Juen Ong, Shih-Chi Yang, Chih Chen Substrate
Keita Mochizuki, Hiroyuki Wakioka, Tsutomu Fujita, - National Yang Ming Chiao Tung University; Wei-Lan Kei Togasaki, Natsuki Toda, Kensuke Yoshihara,
Masatoshi Shomura, Takeori Maeda, Toshihiko Ohda, Chiu, Hsiang-Hung Chang - Industrial Technology Yosuke Kaguchi, Kanako Funai, Hitoshi Onozeki,
Yoshitaka Muto, Eiji Takano, Masahiro Inohara - Research Institute Kenichi Iwashita - Resonac Corporation
KIOXIA Corporation

3. 2:40 PM - Ultra-Thin Double Side SiP 3. 2:40 PM - Copper Microstructure Effect 3. 2:40 PM - 20 µm Pitch Cu-to-Cu Flip-
Technology With Embedded Trace Substrate on Electromigration Investigated by In Situ Chip Bonding Through Cu Nanoparticles
Chehan (Jerry) Li, Jesus Mennen Belonio, Jon SEM EBSD Technique Sintering
Gutierrez, Humi (Shih-Wen) Tang, Jessie (Yu-Shan) Yaqian Zhang, Sten Vollebregt, Guoqi Zhang - Delft Xinrui Ji, Leiming Du, Henk van Zeijl, Guoqi Zhang -
Wei - Renesas Electronics Corporation University of Technology Delft University of Technology; Jaber Derakhshandeh,
Eric Beyne - imec

Refreshment Break: 3:00 p.m. - 3:45 p.m.

4. 3:45 PM - Ultra–High Density RDL
4. 3:45 PM - High Accuracy Selective 4. 3:45 PM - Achieving Sub-nm Copper Recess Patterning of High–Resolution Dielectrics
Patterning for EMI Shielding of 5G AiP Controllability for Advanced 3D Integration: by Maskless Exposure Technology for High
Ming-Hung Chen, Huei-Pin Chien, Yi-Chun Chou, An Experimental and Atomic-Scale Simulation Performance Computing and Artificial
Yu-Shuan Tsai, Kuan-Lin Kuo, Jei-Chieh Kao - Study on Wet Atomic Layer Etching Process Intelligence Devices
Advanced Semiconductor Engineering, Inc. (US) Seung Ho Hahn, Wooyoung Kim, Bumki Moon, Ksenija Varga, Thomas Uhrmann, Roman Holly, Tobias Zenger - EV
Minwoo Rhee - Samsung Electronics Co., Ltd.- Group, Inc.; Dimitri Janssen, Niels Van Herck, Mario Reybrouck, Marieke
Vandevyvere, Stefan Vanclooster - Fujifilm Electronic Materials Europe; Sanjay
Mechatronics Research; Kyeongbin Lim - Samsung Malik - Fujifilm Electronic Materials; Benedict San Jose, Cliff Sandstrom - Deca
Electronics Co., Ltd. Technologies, Inc.

5. 4:05 PM - Analysis of Thin Flip Chip 5. 4:05 PM - Quantifying the Electrical 5. 4:05 PM - Novel Photo Imageable Film
Chip-Scale Package Warpage Causes and Impact of Bonding Misalignment for 0.5 μm for RDL
Variations Pitch Hybrid Bonding Structures Meiten Koh, Kazuyoshi Yoneda, Kazutaka Nakada,
Chee S Foong, Nishant Lakhera, Trent Uehling - NXP Kevin Ryan, Christopher Netzband, Andrew Tuchman, Yuna Kawata, Yusuke Naka, Mitsuya Uchida - Taiyo
Semiconductor, Inc.; Amirul Afripin - NXP Malaysia Scott Lefevre, Ilseok Son, Hirokazu Aizawa, Kaoru Ink Mfg. Co., Ltd.
Sdn. Bhd. Maekawa - TEL Technology Center, America, LLC;
Nathan Ip - Tokyo Electron America, Inc.

6. 4:25 PM - Large Package Body Size 6. 4:25 PM - Liquid Surface Tension-Driven 6. 4:25 PM - Cu Nanowire Fine-Pitch
Scaling With Two Novel Technologies: Multi Chip Self-Assembly Technology With Cu-Cu Joints for Next Gen Heterogeneous Chiplet
Ball BGA and Liquid Metal Interconnect Hybrid Bonding for High-Precision and Integration
Xiao Lu - Intel Corporation High-Throughput 3D Stacking of DRAM Steffen Bickel, Iuliana Panchenko, Manuela Junghaehnel
Zehua Du, Tetsu Tanaka, Takafumi Fukushima - - Fraunhofer IZM; Olav Birlem, Sebastian Quednau -
Tohoku University; Hiroshi Kikuchi, Hayato Hishinuma Nanowired GmbH
- YAMAHA ROBOTICS HOLDINGS CO., LTD.

7. 4:45 PM - A Study About Direct Laser 7. 4:45 PM - Wafer-On-Wafer-On-Wafer 7. 4:45 PM - High-Planarity, Ultra-Low-
Reflow for Forming Stable and Reliable (WoWoW) Integration Having Large-Scale Temperature-Curable Photosensitive
C4 Bump Interfaces on Semiconductor High Reliability Fine 1 µm Pitch Face-To- Polyimide for Heterogeneous Integration
Substrates for Flip Chip Applications Back (F2B) Cu-Cu Connections and Fine 6 Atsutaro Yoshizawa, Akira Asada, Daisaku Matsukawa,
Matthias Fettke, Anne Fisch, Alexander Frick, Georg µm Pitch TSVs Takahiro Tanabe - HD MicroSystems LLC
Friedrich, Thorsten Teutsch - Pac Tech GmbH Masaki Haneda, Yukako Ikegami, Kengo Kotoo, Kan
Shimizu, Yoshihisa Kagawa, Hayato Iwamoto - Sony
Semiconductor Solutions Corporation
25
 Program Sessions: Friday, May 31, 2:00 p.m. - 5:05 p.m.
Session 34: Photonics Integration, Materials, and Session 35: Reliability and Current Stressing of Solder Session 36: Thermal Management and Cooling Solutions
Processes Interconnections
Committee: Committee: Committee: Thermal/Mechanical Simulation
Photonics Applied Reliability & Characterization

Session Co-Chairs: Session Co-Chairs: Session Co-Chairs:

Takaaki Ishigure Paul Tiner Patrick McCluskey
Keio University Texas Instruments University of Maryland
Email: ishigure@[Link] Email: p-tiner@[Link] Email: mcclupa@[Link]

Mark Earnshaw Pei-Haw Tsao Chris Bailey

Nokia Mediatek Arizona State University
Email: [Link]@[Link] Email: [Link]@[Link] Email: [Link]@[Link]

1. 2:00 PM - Packaged Tunable Single-Mode 1. 2:00 PM - Electromigration in Eutectic 1. 2:00 PM - Electrical-Thermal Analysis of
III-V Laser Integrated on a Silicon Photonic Tin-Bismuth Bottom Terminated TSV Embedded Microfluidic Pin-Fin Heatsink
Integrated Chip Using Photonic Wire Bonding Components Solder Joints in 3D IC for High Heat Dissipation With
Venkatesh Deenadayalan, Eric Thornton, Mario Ciminelli, Stefan Prabjit Singh, Larry Palmer, Mehdi Hamid, Thomas Wassiac - IBM High Bandwidth Density and Low Latency
Preble - Rochester Institute of Technology; George T. Nelson,
Peter McGarvey - AIM Photonics; Justin Bickford - US Army Corporation; Raiyo Aspandiar, Brian Franco - Intel Corporation; Euichul Chung, Geyu Yan, Erik W. Masselink,
Research Lab; Matthew Mitchell, Lukas Chrostowski, Sudip Haley Fu - iNEMI; Richard Coyle - Nokia Corporation; Vasu Muhannad S. Bakir - Georgia Institute of Technology
Shekhar - Dream Photonics; Juned N. Kemal, Sebastian Tobias Vasudvan - Dell, Inc.; Aileen Allen - HP Inc.; Keith Howell - Nihon
Skacel - Vanguard Automation Superior Co.; Kei Muryayama - Shinko Electric Industries Co., Ltd.

2. 2:20 PM - Collective Die-to- 2. 2:20 PM - Impact of Current Induced 2. 2:20 PM - Thermal Mitigation Strategy
Wafer Assembly Process for Optically Joule Heat Variation on Long-term Low for Backside Power Delivery Network
Interconnected System-on-Wafer Melting Temperature Solder Joint Stability Feifan Xie, Tiwei Wei - Purdue University; Rongmei
Koen Kennes, Anton Dvoretskii, Arnita Podpod, Tae-Kyu Lee, Yujin Park, Gnyaneshwar Ramakrishna Chen - Peking University
Pengfei Xu, Junwen He, Guy Lepage, Negin Golshani, - Cisco Systems, Inc.; Jimmy-Bao Le, Chuanhao Nie
Rafal Magdziak, Yoojin Ban, Filippo Ferraro, Andy - University of Texas, Arlington; Young-Woo Lee, Hui-
Miller, Joris Van Campenhout - imec Joong Kim, Seul-Gi Lee - MK Electron Co., Ltd.; Choong-
Un Kim - United Test and Assembly Center, Ltd.

3. 2:40 PM - A Compact Wafer-Level 3. 2:40 PM - Reliability Concerns Due to 3. 2:40 PM - Thermal Management of 6-in-
Heterogeneously Integrated Scalable Optical Changes in the Microstructure and Electrical 1 SiC Power Module With Double-Sided
Transceiver for Data Centers Resistance of Low Temperature, SnBi-Based Impingement Cooling
Sajay Bhuvanendran Nair Gourikutty, Jiaqi Wu, Teck Solder Joints During Current Stressing Yong Han, Gongyue Tang - Institute of
Guan Lim, Lai Yee Chia, Ser Choong Chong, Surya Eric Cotts, Sitaram Panta, Eric Cotts, Babak Arfaei, Microelectronics A*STAR
Bhattacharya - Institute of Microelectronics A*STAR; Liang Faramarz Hadian - State University of New York at
Ding, Ronson Tan, Nagarajan Radhakrishnan - Marvell Binghamton
Semiconductor, Inc.; Xiaoguang Tu, Wanjun Wang, Chee-
Keong Tan - Marvell Asia Pte Ltd
Refreshment Break: 3:00 p.m. - 3:45 p.m.
4. 3:45 PM - Integrated Optical Ring 4. 3:45 PM - The Effect of Extended Dwell 4. 3:45 PM - Thermal Performance of an
Resonator in Ion-Exchanged Thin Glass for Time on Thermal Cycling Performance of Indium-Silver Alloy Metal TIM for a Large
Optical Sensing and Laser Stabilization Hybrid Low Temperature Solder Joints Body Lidded FCBGA After EOL and Long-
Julian Schwietering, Wojciech Lewoczko-Adamczyk, Richard Coyle, Chloe Feng, Richard Popowich - Nokia term Reliability Tests
Tom Fahrenson, Henning Schröder, Martin Schneider- Bell Labs; Martin Anselm - Rochester Institute of SangHyuk Kim, EunSook Sohn, KyungRok Park -
Ramelow - Fraunhofer IZM Technology Amkor Technology Korea; YoungDo Kweon - Amkor
Technology, Inc.

5. 4:05 PM - Laser Attach Process 5. 4:05 PM - Correlation of Mechanical 5. 4:05 PM - AI-Driven Cold Plate Design
Development and Material Selection and Microstructural Evolutions in Lead and Optimization
Alexander Janta, Pascale Gagnon, Eric Turcotte, Elaine Free Solders Subjected to Various Thermal Yue Wu, Eric Chu, Fiona Shiau, Nathan Ai, Albert
Cyr, Jason Zheng - IBM Corporation Exposures Zeng, Hoa Pham - Cadence Design Systems
Mohammad Al Ahsan, S M Kamrul Hasan, Souvik
Chakraborty, Jeffrey Suhling, Pradeep Lall - Auburn
University

6. 4:25 PM - Ultra-Compact Computing 6. 4:25 PM - Pad Cratering and Pin Pull 6. 4:25 PM - Heat Dissipation Measurement
at the Edge Involving Unobtrusively Small Strength for Large BGA and Connectors — in Flip-Chip Package Using Microfabricated
Heterogeneous Integration Packaging How Are They Correlated? Temperature Sensors on Lid
Frank Libsch, Steve Bedell, Cyril Cabral, Arun Dongji Xie, Joe Hai, Vivienne Zou, Zhongming Wu, Arsene Guédon, Nizar Bouguerra, Étienne Paradis,
Paidimarri, Chitra Subramanian, Seiji Munetoh - IBM Minghong Jian - Nvidia Corporation Dominique Drouin - University of Sherbrooke; Éric
Research Duchesne, Stéphanie Allard - IBM Canada, Ltd.;
Hél`ene Frémont - University of Bordeaux

7. 4:45 PM - Sintering for High Power 7. 4:45 PM - Board Level Drop Reliability 7. 4:45 PM - Innovative Two-Phase
Optoelectronic Devices of Hybrid Solder Joints With Controlled Immersion Cooling Solutions for High-Power
Gordon Elger, Nihesh Mohan, Alberto Siligardi, Hamza Bismuth Mixing Rate for Carbon Neutrality Advanced Packages
Bin Aqeel, Hannes Schwan, Rocky Kumar Saha, Fabian Seahwan Kim, Jaejun Yoon, Taejoon Noh, Seung Boo Sumit Sharma, Aqbal Ahmad, Chi-Chuan Wang -
Steinberger - Technical University of Applied Science Jung - Sungkyunkwan University; Kyung Deuk Min - National Yang Ming Chiao Tung University; ICheng
Ingolstadt; Sri Krishna Bhogaraju, Rohan Ghosh - Samsung Electronics Co., Ltd. Huang, Ying-Xu Lu, Hung-Hsien Huang, Chen-Chao
CuNex GmbH; Holger Klassen, Klaus Müller - ams Wang, Chih-Pin Hung - Advanced Semiconductor
OSRAM Group Engineering, Inc. (US)
26
Interactive Presentations: Wednesday, May 29, 10:00 a.m. - 12:00 Noon and Wednesday, May 29, 2:30 p.m. - 4:30 p.m.

Wednesday May 29th Embedded Liquid Cooling of High-Power Reliability of Differently Shaped Solder Joints in Chip
Microelectronics Using Liquid Metal Resistor Under Drop Impact
Session 37: Thermo-Mechanical Stress and Huicheng Feng, Bin He, Gongyue Tang, Xiaowu Zhang, Boon Jonghwan Ha, Karthik Deo, Junbo Yang, Yangyang Lai,
Reliability Analysis for Materials in Future Long Lau, Jason Au, Javier Ong, Ming Chinq Jong, King Jien Seungbae Park - Binghamton University
Packaging Chui - Institute of Microelectronics A*STAR
Study of Damage Development in Under-Bump
Time: 10:00 AM - 12:00 PM A Development of Sensorized Ear Model for New Interconnects by Thermo-Mechanical Stress in
Behind the Ear (BTE) Hearing Aid Package Interconnects
Committee: Interactive Presentations Maria Ramona Ninfa Bautista Damalerio, Wei Da Toh, Jorge Mendoza, Choong-Un Kim - University of Texas,
Session Co-Chairs: Ruiqi Lim, Ming-Yuuan Cheng - Institute of Microelectronics Arlington; Hung-Yun Lin - Texas Instruments, Inc.
Mark Poliks A*STAR
Aging Behaviour and Environmental Impact of Under
Binghamton University Electrical Characterization and Reliability Studies of Bump Metallurgies for Wafer Level Balling
Email: mpoliks@[Link] Nano-TSV Arnaud Garnier, Laetitia Castagne, Stephane Moreau,
Ya-Ching Tseng, Daniel Lau, Simon Chun Kiat Goh, King-Jien
Jeffrey Lee Alexandra Fraczkiewicz, Theo Monniez, Daniel Mermin,
Chui - Institute of Microelectronics A*STAR
Suzanne Guillou, Laura Vauche, Damien Saint-Patrice, Perceval
Integrated Service Technology Inc. A Simulation-Led Board Level Reliability Assessment Coudrain - Grenoble Alps University/CEA-LETI
Email: jeffrey_lee@[Link] of High Speed Printed Circuit Boards for Advanced
Networking Applications Development of Interfacial Wedge Testing Technique
Joshua Dillon and Mechanical Characterization of Flexible Electronic
Omar Ahmed, Leif Hutchinson, Peng Su, Bernard Glasauer -
Marvell Materials
Juniper Networks; Vishnu Shukla, Andrea Molina, Tengfei Jiang
Email: jdillon@[Link] - University of Central Florida Joshua Corbin, Nicholas Ginga - University of Alabama in
Huntsville
Venkata Mokkapati Thermal Resistance Prediction Model for IC Packaging
AT&S Optimization and Design Cycle Reduction Automated Solder Joint Failure Mode Analysis Based
Email: [Link]@[Link] Guan-Wei Chen, Chung-Hsiang Hsu, Hung-Kai Wang, on Dry and Pry Image Processing
Yan-Cheng Lin - National Cheng Kung University; Tang- Yinan Lu, Andrew Huang, Chaolun Zheng, Sean Lau, Bo Yang
Alternative Techniques for Cross-Sectioning and Yuan Chen, Chen-Chao Wang - Advanced Semiconductor - Western Digital Corporation
Quality Analysis of Solder-TIM Joints with Soft Indium Engineering, Inc. Wednesday May 29th
Alloys Study of Stress and Warpage Estimation on FOWLP
Daniel VanHart, Ali Davoodabadi - Universal Instruments Session 38: Photonics, mm-Wave Applications &
under Hygro-Thermal Coupling Loading Conditions
Corp. Emerging Technologies
Yu-Wei Huang - Industrial Technology Research Institute;
Ruchi A. K. Yadav, Hong-Yu Lin, Jian-Han Li, Chang-Chun Lee Time: 2:30 PM - 4:30 PM
Investigating the Adhesion Between Glass Core and
- National Tsing Hua University
Polymer Buildup Films Committee: Interactive Presentations
Preeya Kuray, Yoji Nakajima, Junko Konishi - AGC, Inc. Single and Multi NPU Chiplet Heterogeneous
Session Co-Chairs:
Integration Packaging Based on Fan-Out RDL
Long-Term Reliability Analysis of Crystal Oscillator Interposer With Silicon Bridge Technology Frank Libsch
Insoo Kang, Jacinta Aman Lim - nepes Corporation IBM
Under Immersion Cooling With Various Coolants
Email: libsch@[Link]
Yangfan Zhong, Dan Liu, Fangzhi Wen, Honghao Cao - Monitoring of Wafer Thinning Induced In-Die
Alibaba Group; Tina Bao, Kai Wang - Intel Corporation Mechanical Stress With Embedded Sensors for Saikat Mondal
Heterogeneous Integration Intel
Fusing Current Characterization of Various Cu RDL Alberto Piadena, Michele Quarantelli, Sharad Saxena, Email: [Link]@[Link]
Designs in Wafer Level Packages Christopher Hess, Larg Weiland, Rakesh Vallishayee, Yuan Yu, Pavel Roy Paladhi
JeongMin Ju, JiYeon Yoon, EunSook Sohn - Amkor Tomasz Brozek, Andrzej Strojwas - PDF Solutions IBM
Technology Korea/Amkor Technology, Inc.; Nathan Thermal Transport Properties of Hybrid Bonding With Email: rpaladhi01@[Link]
Whitchurch - Amkor Technology, Inc. Passivation Yoichi Taira
Impact of Bi-Content on the High Strain Rate Hakjun Kim, Jae Young Hwang, Young-chang Joo, Hyejin Jang - Keio University
Seoul National University; Sangwoo Park, Sarah Eunkyung Kim Email: taira@[Link]
Properties of SnAgCu Solders Under Sustained High-
- Seoul National University of Science and Technology
Temperature Operation Screen Printing and Drop Casting to Develop Flexible,
Pradeep Lall, Vishal Mehta, Mrinmoy Saha, Jeff Suhling - Optimization of Core Material Properties for Large
Flip-Chip Ball Grid Array Substrate to Manage Both Amperometric Electrodes for Health Monitoring
Auburn University; David Locker - US Army Erika Solano, Babatunde Falola, Olya Noruz Shamsian,
Warpage and Board Level Reliability
Hirokazu Noma, Masaki Takahashi, Nene Hatakeyama, Yuichi Mohammed Alhendi, Mark Poliks, Udara Somarathna -
Bond-Line Thickness Prediction for Thermal Interface
Yanaka, Akito Fukui, Keita Johno, Hitoshi Onozeki - Resonac Binghamton University; Gurvinder Singh Khinda, Andrew
Material Under Usage Conditions Burns - General Electric Healthcare; Azar Alizadeh - General
Corporation
Yangyang Lai, JIefeng Xu, Karthik Deo, Jonghwan Ha, Electric Company
Embedded Cooling Method With Monolithic Dual-
Seungbae Park, Junbo Yang - Binghamton University Layer Micro-Channel Cold Plate for High-Power Chips Conformal Flexible Dry Electrode for ECG Monitoring
Glass to Silicon Fine Pith Hybrid Bonding Riadh Al-Haidari, Babatunde Falola, Mohammed Alhendi, Mark
Jianyu Du, Hongxu Wu, Huaiqiang Yu, Chi Zhang, Wei Wang Schadt, Mark Poliks - Binghamton University; Dan Balder,
Hemanth Kumar Cheemalamarri, Arvind Sundaram, Anh - Peking University Andrew Stemmermann, Matthew Foster - SunRay Scientific,
Tran Van Nhat, Chen Gim Guan, Jae Ok Yoo, Vempati Method to Evaluate the Adhesion Distribution on Inc.; Tzu-Jen Kao, Nancy Stoffel - General Electric Global
Srinivasa Rao, Navab Singh - Institute of Microelectronics Wafers Research
A*STAR Tatsumasa Hiratsuka, Takaaki Hirano, Kengo Kotoo,
Nobutoshi Fujii, Suguru Saito, Shoji Kobayashi, Yoshiya Reliability of Flexible Electronics Undergoing Vibration
Multiphysics Overlay Modeling of Monolithic 3D Sara Lieberman, El Mehdi Abbara, Nathaniel Gee, Kankanige
Hagimoto, Hayato Iwamoto - Sony Semiconductor Solutions
Fusion and Hybrid Bonding Processes Corporation Udara Sandakelum Somarathna, Abhishek Navkar, Abdullah
Christian Muehlstaetter, Lukas Koller, Markus Wimplinger, Obeidat, Zhi Dou, Mohammed Alhendi, Peter Borgesen,
Experimental and Numerical Investigation of Cu-Cu Mark Poliks - Binghamton University
Viorel Dragoi - EV Group, Inc.
Direct Bonding Quality for 3D Integration
Mitigating Cracking from TGV and RDL Stress in Glass Sung-Hyun Oh, Hyun-Dong Lee, Jae-Uk Lee, Hoo-Jeong Lee, Quantifying Uncertainties in the Correlation of
Eun-Ho Lee - Sungkyunkwan University; Sung-Ho Park, Won- Simulations and Measurements using the IEEE EPS
Substrates With Low-CTE Electrodeposited Copper-
Seob Cho, Yong-Jin Park, Alexandra Haag, Soichi Watanabe, Packaging Benchmark Suite
Graphene Composites Jonatan Aronsson - CEMWorks, Inc.; Kemal Aygun - Intel
Marco Arnold - BASF
Christian Molina-Mangual, Emanuel Torres-Surillo, Nithin Corporation
Nedumthakady, Vanessa Smet - Georgia Institute of High Voltage Effects on the Electrochemical Migration
Mechanism Polymer Waveguides for Co-Packaged Optics
Technology
Rajan Ambat, Anish Rao Lakkaraju, Jyothsna Murali Rao - Yi Shen, Michael Gallagher, Ross Johnson, Jake Joo, Masaki
A Predictive Methodology for BGA Solder Joint Technical University of Denmark Kondo, James Ryley, Rui Zhang, Zhebin Zhang - DuPont;
Formation and Assembly Defects Atomistic Simulation Investigation of Various Plasma Marika Immonen, Matthew Neely, Everett Sarauer, David
Matt Bond, Mudasir Ahmad, Jin Kim, Sue Teng, Nima Shahidi, Surface Activations in SiCN Dielectric Bonding Senk - TTM Technologies, Inc.
Yingshi Tang - Google Hojin Kim, Andrew Tuchman, Yu-Hao Tsai, Toru Hisamatsu, Energy-Efficient 10-Chiplet Hyperscale AI HPU on
Ilseok Son, Sitaram Arkalgud - TEL Technology Center, Advanced Large-Scale RDL Package
High-Performance Thermal and Electrical America, LLC Jiwon Yoon, Hyunwoo Kim, Juhyeon Lee, Joungho Kim,
Characteristics of Via-Last (BBCube) Process in the Sungjin Kim - Korea Advanced Institute of Science and
A Novel Approach to Assess Board Level Solder Joint
Multi-Layer 3D Integration Reliability for Flip Chip on Leadframe Package Using Technology; Youngsu Kwon, Yigyeong Kim, Minseok Choi
Norio Chujo - Hitachi, Ltd.; Hiroyuki Ryoson, Koji Sakui, Shinji Finite Element Analysis - Electronics and Telecommunications Research Institute;
Sugatani, Masao Taguchi, Takayuki Ohba - Tokyo Institute of Guangxu Li, Siva Gurrum, Frank Mortan, Jiang Li, Carlos Heejun Jang, Kyun Ahn, Jinhan Kim, Taekyeong Hwang -
Technology Arroyo - Texas Instruments, Inc. Amkor Technology, Inc.
27
 Interactive Presentations: Wednesday, May 29, 2:30 p.m. - 4:30 p.m. and Thursday, May 30, 10:00 a.m. - 12:00 Noon

Development of Robust and Cost-Effective Electrical An Effective Surface Roughness Extraction Method Inverse Hybrid Bonding With Aluminum Oxide as Infill
& Optical Interconnect Solution for High Performance Using Particle Swarm Optimization (PSO) Algorithm Using Atomic Layer Deposition
Silicon Photonic Applications and 2D Based Equations for High Speed Systems Rohan Sahay, Ashita Victor, Muhannad Bakir - Georgia
Jae Kyu Cho, Takako Hirokawa, Yusheng Bian, Scott Pozder, Youngjae Lee, Kwangho Kim, Chulhee Cho, Sungjin Yoon, Institute of Technology; Shreyam Natani, Dipayan Pal, Victor
Koushik Ramachandran, Arpan Dasgupta, Jason Kim, Wang, Chenghsuan Jimmy Kuo, Andrew Kummel - University
Zahidur Chowdhury, Norman Robson, Thomas Houghton - Hyeongi Lee, Wonji Hwang, Wooshin Choi, Jung-Hwan Choi
GlobalFoundries, Inc. - Samsung Electronics Co., Ltd.; Hyungjong Ko - Samsung of California, San Diego
Low-Loss Non-Contact Interconnects Based on 3D Ultimate Wafer-Level Lens Integration and Intelligent Design and Demonstration of Reliable All-
Heterogeneous Redistribution Layer for Millimeter Optimization Using Microlenses and Metalenses for Cu Interconnections on High-Density Glass Substrates
Wave Phased Arrays High-End Active Pixel Sensor Applications at 10 Micron Pitch
Lichang Huang, Yunfei Cao - South China University of Hoi-Jin Lee, Sihun Han, Chanyeol Park, Sunyong Park, Ramon Sosa, Antonia Antoniou, Vanessa Smet - Georgia
Technology; Yuting Tong, Sha Xu - Guangdong University of Woonphil Yang, Yitae Kim - Samsung Electronics Co., Ltd. Institute of Technology
Technology; Xiaobin Xu, Jinxing Chen - Glorysky Electronic
Technology Co., Ltd. Electromigration Kinetics of SAC/SnBi Hybrid Solder
Microprinting Process Development Enabling Cost
Minhua Lu, Evan Colgan - IBM Research
Thermal Performance and Reliability of Liquid Metal Effective, High Density and Flexible Electro-Optical
Alloys as Thermal Interface Materials for Computing Integration Multi-Tier Die Stacking Through Collective Die-to-
Electronics Devices Krzysztof Nieweglowski, David Weyers, Akash Mistry, Wafer Hybrid Bonding
Guangyu Fan, Jacob Wells - Indium Corporation; Michael Karlhenz Bock - TU Dresden Koen Kennes, Ye Lin, Samuel Suhard, Pieter Bex, Dieter H.
Beam - SUNY Polytechnic Institute Cuypers, Alain Phommahaxay, Gerald Beyer, Eric Beyne -
High Bandwidth Active Flexible Connector for Signaling imec; Alice Guerrero - Brewer Science, Inc.; Dennis Bumueller
Development of Monolithic Meta-Lens System Using
Immersion Lithography and Glass-to-Glass Direct in Wafer-Scale Systems - SUSS MicroTec GmbH
Bonding Randall Irwin, Joanna Fang, Subramanian Iyer - University of
California, Los Angeles Simulation of Bulge-Out Mechanism Enabling Sub-0.5
Arvind Sundaram, Hemanth Kumar Cheemalamarri, Nandini
Venkataraman, Yuan-Hsing Fu, Jae Ok Yoo, Navab Singh - µm Scaling of Hybrid Wafer-to-Wafer Bonding
Institute of Microelectronics A*STAR Additive Manufacturing of High-Density (2.5 µm L/S) Jo De Messemaeker, Koen Van Sever, Yan Wen Tsau, Boyao
Ag-Cu Stacked Interconnects on Organic Substrates. Zhang, Kristof Croes, Eric Beyne - imec
Multi-Wideband Antenna in Package With Dual Shrivani Pandiya, Serge Ecoffey, Yann Beilliard, Dominique
Polarizations Wet Cu Passivation for High Throughput Fluxless
Drouin - University of Sherbrooke; Christophe Sansregret - Thermal Compression Bonding of Cu-Sn Bumps for
Mei Sun - Institute of Microelectronics A*STAR
Centre de Collaboration MiQroInnovation (C2MI); Isabel De Die-to-Wafer Stacking
Deep Reinforcement Learning-Based Power Sousa - IBM Canada, Ltd.
Distribution Network Design Optimization for Multi- Jens Rip, Jaber Derakhshandeh, Dieter H. Cuypers, Eric Beyne
Chiplet System Thursday May 30th - imec; Ryo Negishi, Itsuro Tomatsu - MEC Co., Ltd
Weiyang Miao, Zhen Xie, Chuan Seng Tan - Institute of Low Temperature Nanocrystalline Cu/Polymer Hybrid
Microelectronics A*STAR/Nanyang Technological University; Session 39: Bonding Process and Analysis in Next-
generation Interconnects Bonding With Tailored CMP Process
Mihai Dragos Rotaru - Institute of Microelectronics A*STAR
Lee Ou-Hsiang, Hsiang-Hung Chang, Wei-Lan Chiou,
Novel Low Loss Polymer With High Thermal Time: 10:00 AM - 12:00 PM Chia-Wen Chiang, Shih-cheng Yu, Ting-Yu Ke, Yu-Min Lin
Resistance for Advanced IC Packaging Committee: Interactive Presentations - Industrial Technology Research Institute; Chia-Hsin Lee,
Hikaru Mizuno - JSR Micro, Inc.; Eri Mishima, Shunsuke Iizuka, Andrew Tan - Brewer Science, Inc.
Yuuichi Yashiro, Naoyuki Kawashima - JSR Corporation Session Co-Chairs:
Rao Bonda A Novel FOPLP Structure With Chip First & RDL First
Power Supply Design and Power Management in
Complex System Design: Co-Packaged Optics-FPGA Amkor Process for Automotive Chip Application
3D SIP Module Email: [Link]@[Link] Terry Wang, Chih Wei Lu, Eric Feng, Yu-Jhen Yang,
Jugal Kishore Bhandari, Sandhya Dharavath, Venkata Ramana Cheng-Yueh Chang, Pei-Pei Cheng - Industrial Technology
Pamidighantam, Mohd. Ubed, Anusha Veerandi, Rohin Kumar Karan Bhangaonkar Research Institute; Fredrick Lie - Applied Materials, Inc.; Austin
Yeluripati - LightSpeed Photonics Pte Ltd Intel Cheng - FAVITE, Inc.; Hsin-Yi Huang - Everlight Chemical
Additively Manufactured SoP Modules for Smart Email: [Link]@[Link] Industrial Corp.; Meiten Koh - Taiyo Ink Mfg. Co., Ltd.; Aneta
Agriculture and Insect Pheromone Sensing Applications Amanpreet Kaur Wiatrowska, Lukasz Witczak - XTPL SA
Genaro Soto Valle Angulo, Manos M. Tentzeris - Georgia Oakland University A Unified and Adaptive Continual Learning Method
Institute of Technology; Andrew Fang - Walton High School Email: kaur4@[Link] for Feature Segmentation of Buried Packages in 3D
All-Cu 3D Interconnects as an Alternative to Hybrid XRM Images
Bonding Jin Yang Richard Chang, Jie Wang, Namrata Thakur, Ramanpreet
Tadatomo Suga, Kanji Otsuka - Meisei University Samsung Pahwa, Yang Xulei - Institute for Infocomm Research
Email: [Link]@[Link] A*STAR
Additive Manufacturing of an Electronically Steerable
Microstrip Leaky Wave Antenna on Thin Alumina A Novel Detection Applied on Micro Defect in Bump Low Thermal Budget Fine-Pitch Cu/Dielectric Hybrid
Substrate Interface for 2.5DIC Package
Ethan Kepros, Yihang Chu, Bhargav Avireni, Sambit Ghosh, Bonding With Cu Microstructure Modifications
Yi-Sheng Lin, Yu-Hsiang Hsiao, Cheng-Hsin Liu, Fan-Ju Hsiao - Hemanth Kumar Cheemalamarri, Anh Tran Van Nhat, Gim
Brian Wright, Premjeet Chahal - Michigan State University Advanced Semiconductor Engineering, Inc. Guan Chen, Arvind Sundaram, Binni Varghese, Nandini
Conductive Fabric Based RFID Wearable Textile Venkataraman, Vempati Srinivasa Rao, Navab Singh - Institute
Antennas for Product Authentication and Quality Hybrid Bonding Technology Chemical Mechanical
Planarization Process Optimization Using of Microelectronics A*STAR
Control
Bhargav Avireni, Yihang Chu, Ethan Kepros, Sambit Kumar Comprehensive 3D Modeling Characterization of 224 Gbps/Lambda Interconnects
Ghosh, Premjeet Chahal - Michigan State University Liu Jiang, El Mehdi Bazizi, Gregory Costrini, Prayudi Lianto, in Co-Packaged Optics for Hyperscale Data Centers
Tire-Integrated Antennas for Wireless Sensors in Gilbert See, Sefa Dag - Applied Materials, Inc.; Dimitrios and AI/ML Clusters
Automotive Applications Tsamados, Yves Saad - Synopsys, Inc. Jiaqi Wu, Teck Guan Lim, Sajay Bhuvanendran Nair
Yihang Chu, Sambit Kumar Ghosh, Bhargav Avireni, Ethan Gourikutty, Surya Bhattacharya - Institute of Microelectronics
Kepros, Premjeet Chahal - Michigan State University Influence of Stiffener Design on Co-Packaged Optics A*STAR; Xin Li, Jason Tsung-Yang Liow - Rain Tree
(CPO) 2.5D Heterogeneous Packages Photonics Pte. Ltd.
Additively Manufactured Dissolvable Packaging for Karthik Arun Deo, Yangyang Lai, Jong Hwan Ha, Junbo Yang,
Recycle and Reuse of Chips for Sustainable Reduction Seungbae Park - Binghamton University Fundamental Study on Reflow Mechanisms of Sn and
of E-Waste Sn Alloys for Fine Bump Pitch Scaling
Dhiya Belkadi, Carl P Hahn, Hannah Lynn Houston, Sunehra Adhesion Layer Influence on Thermomechanical Chongyang Cai, Anup Panindre, Liang He, Jung Kyu Han,
Saleha, Min Sung Kim, Muhammad Mustafa Hussain - Purdue Reliability of Electroplated Copper Through-Glass Via Gang Duan, Rahul Manepalli - Intel Corporation
University (TGV)
Junbo Yang, Ke Pan, Pengcheng Yin, Yangyang Lai, Seungbae Advanced Photo-imageable Dielectric Film Enabling
Experimental Study of Transmission Signal Low CTE and sub-5 m Patterning for Next Generation
Performance of Sub-2 micron Fine Wiring With Novel Park - Binghamton University; Chukwudi Okoro - Corning,
Build-up Layer
Structure Inc.; Dhananjay Joshi, Scott Pollard - Corning Research and
Taku Ogawa, Ryuichi Okuda, Fumie Hattori, Hirokazu Ito -
Masaya Tanaka, Nobuyoshi Moriwaki, Satoru Kuramochi - Dai Development Corp. JSR Corporation
Nippon Printing Co., Ltd. A Study on the Surface Activation of Plasma Room Temperature Bonding of CVD Polycrystalline
Comprehensive Socket Characterization and Treatment for Hybrid Bonding Joint Interface Diamond Wafer to Semiconductor and Piezo-electric
Correlation for High-Speed Interface Testing System Chih-Jing Hsu, Hsu-Nan Fang, Tzu-Yu Su, Zhao-Ze Jiang, Single Crystalline Wafers
Varin Sriboonlue, Yeseul Jeon, Gerardo R. Luevano, Chris Yi-Hua Chen, Chien-Ching Chen, Yu-Bin Tsai, Che-Ming Tadatomo Suga, Junsha Wang Suga - Meisei University; Kazuya
Ferguson, Ennai Ochoa - Qualcomm Technologies, Inc. Hsu, Yuan-Feng Chiang, Jen-Chieh Kao, Yung-I Yeh - ASE Yamamura - Osaka University; Izumi Kataoka - IIPT Inc.
Corporate R&D Center
A Novel Method for LPDDR5 DRAM Jitter Glass Panel Process Integrated Low Stress Organic
Measurement Through De-Embedding Influence of Heat Treatment on the Quality of Die-to- Dielectric RDL Structure
Manho Lee, Chulhee Cho, Hyeongi Lee, Sehoon Park, Wafer Hybrid Bond Interconnects Chien Kang Hsiung, Sarah Wozny, Marvvin L Bernt - Applied
Wonseok Hong, ByungSuk Woo, Woo-Shin Choi, Young- Laura Wenzel, Catharina Rudolph, Adil Shehzad, Iuliana Materials, Inc.; Terry Wang - Industrial Technology Research
Chul Cho, Young-Soo Sohn, Jung-Hwan Choi - Samsung Panchenko, Manuela Jungh hnel - Fraunhofer IZM; Partha Institute; Kuan-Nang Chen - National Yang Ming Chiao Tung
Electronics Co., Ltd. Mukhopadhyay, H. Jim Fulford - Tokyo Electron America, Inc. University
28
 Interactive Presentations: Thursday, May 30, 10:00 a.m. - 12:00 Noon and 2:30 p.m. - 4:30 p.m.

A Warpage Investigation for a Large Panel-Sized A Highly-Reliable and Cost-Effective Approach by

Interposer with Embedded Dies Reducing Flux Cleaning in Chiplet Processes Through Fluidic Self Alignment for Hybrid Bonding Using Intel
Katsuaki To, Daisuke Yamanaka, Masashi Minami, Shan Ho Underfill Curing in a Pneumatic Ambient Process
Tsai, Sadaaki Katoh - Resonac Corporation Huan-Ping Su, Ming-Hua Hsu, Auger Horng - Ableprint Feras Eid - Intel Corporation
Development of Two Different Molding Methods in Technology Co., Ltd.
An Advanced Remote-Plasma Assisted Ozone-
2.5D Package With 20 m or Less Fine Bump Pitch Pitch Scaling of W2W Hybrid Bonding From 0.3 μm to Ethylene-Radical (OER) Process for Cu-SiO2 Hybrid
CoW Structure 0.1 μm Through Full Module Innovations Bonding Yield Enhancement
Takeshi Saito, Sadaaki Katoh, Keiko Ueno, Ryosuke Kimura, Tyler Sherwood, Raghav Sreenivasan, Masha Gorchichko, Tatsunori Shino, Eitaro Toyama, Tetsuya Nishiguchi -
Tsai Shanho, Takahiro Iseki, Kan Donchoru - Resonac Amit Prakash, Raghuveer Patlolla, Sarabjot Singh, Yoocharn MEIDEN NANOPROCESS INNOVATIONS,INC.;
Corporation Jeon, Jason Appell, Ryan Ley, Kun Li - Applied Materials, Inc.; Mariappan Murugesan, Kiyoharu Mori - NICHe; Bungo
Low Temperature Cu/SiO2 Hybrid Bonding With David Hafner - EV Group, Inc. Tanaka, Takafumi Fukushima - Tohoku University
Protruding Copper Pads Influence of Temporary Rigid Carrier Structure on
Mechanical Characterization and Modeling of iSAC
Junpeng Fang, Qian Wang, Jiexun Yu, Ziqing Wang, Jian Cai - Warpage During Wafer/Panel Level Packaging
Tsinghua University; Yikang Zhou, Kai Zheng - Semiconductor Lead-Free Solder
Yoshinori Matsuura, Joji Fujii, Vivek Dutta - Mitsui Mining &
Technology Innovation Center (Beijing) Corporation Golam Rakib Mazumder, Souvik Chakraborty, Mahbub Alam
Smelting Co., Ltd.
Maruf, Mohammad Al Ahsan, Jeffrey Suhling, Pradeep Lall -
Analysis of Vacancies in Wafer-Bonding Interface Via Auburn University Extremely Advanced Substrate as an Integrated
Positron Annihilation Lifetime Spectroscopy Package Solution (iPaS) for Next Generation High
Sotetsu Saito, Nobutoshi Fujii, Shunsuke Furuse, Naoki High Temperature RF Measurements Using Novel Performance Computing (HPC) Applications
Ogawa, Suguru Saito, Yoshiya Hagimoto, Hayato Iwamoto - SiO2 Cables With Edge Launch Connectors Tatsuya Kitamura, Takeshi Furukawa, Shuhei Yamada, Koshi
Sony Semiconductor Solutions Corporation Firas Alshatnawi, Ashraf Umar, Emuobosan Enakerakpo, Himeda, Atsushi Yamamoto - Murata Manufacturing Co., Ltd.
Mohamed Abdelatty, W.T. Alshaibani, Mohammed Alhendi,
Annealing Effects in Sub-8 µm Pitch Die-to-Wafer Novel Sheet Molding Compound Technology for
David Shaddock, Peter Borgesen, Mark Poliks - Binghamton Wafer Level Packaging to Overcome Wafer Warpage
Hybrid Bonding
University Issue
Partha Mukhopadhyay, Andrew Tuchman, Kevin Ryan, Adam
Gildea, Sitaram Arkalgud, Anton deVilliers, Jim Fulford - TEL Modeling and 3D Additively Manufactured Inductors Yuki Sugiura, Daisuke Mori, Yasuhito Fujii, Takashi Yagihashi,
Technology Center, America, LLC; Laura Wenzel, Catharina on Complex Shape for Extreme High Temperature Eiichi Nomura - Nagase ChemteX Corporation; Kenta
Rudolph - Fraunhofer IZM; Chuck Woychik, Chris Nichols - Electronics Imamura - Nagase America LLC; Ippei Yamai - Nagase &
SkyWater Technology; John Allgair - BRIDG Waleed Alshaibani, Ashraf Umar, Firas Alshatnawi, Co., Ltd.
3D Interconnect Technology With Serpentine Emuobosan Enakerakpo, Mohamed Abdelatty, Mohammed A CMP Process for Hybrid Bonding Application With
and Trapezoidal Corrugation Using a Flexible Alhendi, Mark D. Poliks - Binghamton University; David Conventional / nt-Cu and SixNy / SixOy Dielectrics
Photosensitive Dielectric to Strengthen the Bendability Shaddock - General Electric Company Tri Widodo, Yi Shi, Xavier F Brun - Intel Corporation; Prayudi
of FHE Lianto, Avery Tan, Joselyn Lie, Patrick Lim, Guan Huei See -
Underfill Selection Guideline for Fan-Out Applied Materials, Inc.
Chang Liu, Jiayi Shen, Atsushi Shinoda, Han Zhang, Tetsu Heterogeneous Integration Package
Tanaka, Takafumi Fukushima - Tohoku University Wen-Yu Teng, Liang-Yih Hung, Jackson Lee, Debby Li, Carl Effect of Material Aging on the Reliability of An
Through Dielectric Via Etching in Magnetic Neutral Chen, Don-Son Jiang, Yu-Po Wang - Siliconware Precision Automotive BGA Device Under TC Test Conditions
Loop Discharge Plasma for 3D Chiplets Interconnect Abdullah Fahim, Ryan Zhang, Amar Mavinkurve, Sandeep
Industries Co., Ltd.
Yasuhiro Morikawa - ULVAC, Inc. Shantaram, Ali Rezaie Adli, Wiwat Tanwongwan, Torsten
Comparison of Organic and Inorganic Dielectric Hybrid Hauck - NXP Semiconductor, Inc.
A Novel Plasma Etching Technology of RIE-Lag Free Bonding With Highly <111>-Oriented Nanotwinned Cu Overlay Challenges of Extremely Large Exposure Field,
TSV and Dicing Processes for 3D Chiplets Interconnect Pin-Syuan He, Chih Chen - National Yang Ming Chiao Tung Fine Resolution Lithography Due to Alignment Solution
Taichi Suzuki, Kenta Doi, Yasuhiro Morikawa - ULVAC, Inc. University Errors and a Solution Using Early Zone Corrections in
Aluminum-to-Aluminum and Aluminum-to-Copper Key Technologies and Design Aspects for Wafer Level Advanced IC Substrates
Thermal Compression Bonding for Heterogeneous Packaging of High Performance Computing Modules John Chang, Xin Song, Timothy Chang - Onto Innovation
Integration of Legacy Dielets Kai Zoschke, Hermann Oppermann, Michael Schiffer, Ivan World’s Smallest, Membrane-Based Capacitive
Krutikesh Sahoo, Randall Irwin, Golam Sabbir, Vineeth Harish, Ndip, Karl-Friedrich Becker, Marius Adler, Alexander Gäbler, Differential Pressure Sensor- Package Structure,
Subramanian Iyer - University of California, Los Angeles Material Selection, Assembly Challenges & Solutions
Uwe Maass - Fraunhofer IZM; Gianna Paulin - Swiss Federal
Directional Atmospheric Plasma De-oxidation for Ultra Institute of Technology; Walter Kocon - GlobalFoundries, Inc. KM Rafidh Hassan, Gaurav Mehrotra, Hazel Caballero, Young
Small Passive Component Assembly Kim, Steven Lee - Renesas Electronics America; Karim Allidina,
Khouloud Ben Harzallah, David Danovitch, Malak Kanso - One-Step Glycine Modified Boron Nitride for Epoxy Tommy Tsang, Mohannad Elsayed, Hani Tawfik - MEMS
University of Sherbrooke; Christian Bergeron, Marc-Olivier Composites With Enhanced Thermal Conductivity Vision International, Inc.
Pion - IBM Canada, Ltd. Zihao Lin, Jiaxiong Li, Zhijian Sun, Kyoung-Sik Moon, Ching-
Packaging Challenges and Solutions for Next
Ping Wong - Georgia Institute of Technology; Andrew Fang Generation Low-Profile WLCSP
Exploring Bonding Mechanisms of SiCN for Hybrid - Walton High School
Bonding Humi (Shih-Wen) Tang, Jerry (Che-Han) Li, Jessie (Yu-Shan)
Sodai Ebiko, Fumihiro Inoue - Yokohama National University; Investigation on the Use of Al-Ge eutectic Bonding in Wei, Baltazar Canete, Leo (Hsin-Hung) Huang, Jesus Mennen
Serena Iacovo, Soon-Aik Chew, Boyao Zhang - imec; Akira the Structural Part of a Multilayer Stacked MEMS Belonio - Renesas Electronics Corporation
Uedono - University of Tsukuba device A Study on Novel Low Temperature Soldering Process
Jun Wang, Manuel Mannarino, Jakob Visker, Shuo Kang, Using Vapor phase
Thursday May 30th
Bivragh Majeed, Lan Peng, Gauri Karve, Luc Haspeslagh - imec; Youngja Kim, Woojin Choi, Seungyeop Oh, Sinyeob Lee,
Session 40: Materials, Manufacturing and Assembly G nther Weidlinger, Tobias Wernicke, J rgen Burggraf, Markus Sunwon Kang - Samsung Electronics Co., Ltd.
Techniques in Advanced Packaging Solutions Wimplinger - EV Group, Inc. Numerically Study on Hybrid Discontinuous
Time: 2:30 PM - 4:30 PM Limits for Dicing Speed Based on Crack Stop Microchannel Heat Ink Combining Manifold With Pin
Committee: Interactive Presentations Constructions With Different Levels of Robustness Fins (DMC-MPF) for High Power Electronic Device
Maria Heidenblut, Michael Goroll, Stefan Kaiser, Andreas Jianyu Du, Lang Chen, Ran Hu, Chi Zhang, Wei Wang -
Session Co-Chairs: Peking University; Huaiqiang Yu - 26th Research Institute of
Bauer, Kristina Hopfauf - Infineon Technologies AG
Mark Eblen China Electronics Technology Group Corporation
Kyocera Vertical Stacking of Heterogeneous Chiplets of
Room-Temperature Hybrid Bonding of Via-Middle
Email: [Link]@[Link] Duplexer on LNA/SOI TSV Wafer Fabricated by Direct Si/Cu Grinding and
Stephen Lee Tai Chong Chai, Rotaru Dragos Mihai, Xiangyu Wang, Pei Residual Metal Removal
NXP Siang Sharon Lim, Lin Ji, Rathin Mandal, Raju Mani, Ming Chinq Naoya Watanabe - National Institute of Advanced Industrial
Email: [Link]@[Link] Jong, Yong Liang Ye - Institute of Microelectronics A*STAR Science and Technology; Hiroshi Yamamoto, Takahiko Mitsui
- Okamoto Machine Tool Works, Ltd.
Kristina Young Multi Chip Stacked Memory Module Development
Synopsys Using Chip to Wafer (C2W) Hybrid Bonding for Low Temperature Cu-Cu Direct Bonding Using
Email: [Link]@[Link] Heterogeneous Integration Applications Ruthenium Passivation Layer Deposited Various
Methods
Biao Cai Nagendra Sekhar Vasarla, Dileep Kumar Mishra, Sasi Kumar
Sang Woo Park, Min Seong Jeong, Yeon Ju Kim, Ji Hoon Kim,
IBM Tippabhotla, Chandra Rao Bhesetti, Ser Choong Chong, King- Jong Kyung Park - Seoul National University of Science and
Email: biaocai@[Link] Jien Chui, Srinivasa Rao Vempati - Institute of Microelectronics Technology; Hee Han - National NanoFab Center
Characterization of Warpage of Ultra-Low-K A*STAR
Dielectric Materials and Correlation With Modulus Optimizing Die-to-Wafer Hybrid Bonding Through
Challenges and Error Estimation in Immersion Cooling Metal Passivation and CMP Process
and Coefficient of Thermal Expansion
Mohanalingam Kathaperumal, Pragna Bhaskar, Austin Toro, Liquid Dk-Df Extraction using Different Methods Yeon Ju Kim, Sang Woo Park, Min Seong Jeong, Ji Hun Kim,
Pratik Nimbalkar, Lila Dahal, Muhannad Bakir - Georgia Saikat Mondal, Xenofon Konstantinou, Cemil Geyik, Zhichao Jong Kyung Park - Seoul National University of Science and
Institute of Technology Zhang, Kemal Aygun - Intel Corporation Technology
29
 Interactive Presentations: Thursday, May 30, 2:30 p.m. - 4:30 p.m and Friday, May 31, 10:00 a.m. - 12:00 p.m.

Ultra Thin Fan-Out 3D WLCSP Heterogeneous Comparison of Different Copper Nitride Passivation
Integration Packaging Layers Fabrication Methodology and Optimal Growth Hybrid Interconnect Infrastructure for Inter-Chiplet
Jay Li, Zen-Wei Zhang, Sam Lin, Vito Lin, Teny Shih, Nicholas Condition for Low Temperature Copper-to-Copper Communication in Wafer-Scale Systems
Kao - Siliconware Precision Industries Co., Ltd.; Yu-Po Wang Bonding in Advanced Packaging Yousef Safari, Rezvan Mohammadrezaee, Dima Al Saleh, Boris
Chiao-Yen Wang, Tzu-Heng Hung, Kuan-Neng Chen Vaisband - McGill University
- SPIL
- National Yang Ming Chiao Tung University; Ping-Jung Liu -
Panel Level Plasma Etching Characteristics for Taiwan Semiconductor Manufacturing Company, Ltd. Reliability of Indium Solder Joints using Laser-Assisted
Bonding (LAB) Process at Room Temperature
Advanced Packaging Fabrication and Testing of In-Line Structures for Ji Eun Jung, Yoon Hwan Moon, Ga-Eun Lee, Jiho Joo, Gwang-
Md Ishak Khan, Wei Wei, Haobo Chen, Xiyu Hu, Nicholas Non-Destructive Study of Solder Electromigration: Mun Choi, Chanmi Lee, Ki-seok Jang, Jin-Hyuk Oh, Yong-Sung
Haehn, Xiaoying Guo, Leonel Arana - Intel Corporation; Applications to SnBi Low Temperature Solder Eom, Jung-Ho Shin, Kwang-Seong Choi - Electronics and
Kensuke Akazawa - ULVAC, Inc. Chetan Jois, Pei-En Chou, Ganesh Subbarayan - Purdue Telecommunications Research Institute; Seung-Yoon Lee -
University Hanbat National University
Development of a Reusable Smart-Catheter System
for Improved Urinary Health Monitoring Application of Elevated-Laser-Liquid-Phase-Epitaxy Tailored Multi-mode, High-Q Nb Superconducting
Zhi Dou, W.T. AlShaibani, Erika Solano Diaz, Mohammed (ELLPE) Technique on Different Oriented Wafers for Resonators: Unique Platform for Magnon-Photon
Monolithic 3DIC Integration Coupling
Alhendi, Abdullah Obeidat, Riadh Al-Haidari, Mark Schadt,
Bo-Jheng Shih, Yu-Ming Pan, Chiao-Yen Wang, Huan-Yu Chiu, Muntasir Mahdi, Bhargav Yelamanchili, Archit Shah, Sherman
Mark Poliks - Binghamton University; Kara Allanach, Daniel Peek, Michael Hamilton - Auburn University; Yuzan Xiong,
Huang-Chung Cheng, Kuan-Neng Chen - National Yang Ming
Wollin, Souvik Paul - CathBuddy, Inc. Chiao Tung University; Chih-Chao Yang, Chang-Hong Shen - Wei Zhang - University of North Carolina; Dan-Chi Nguyen
Taiwan Semiconductor Research Institute - Ewha Womans University/The University of North Carolina;
Focal Extension – A Novel Lithography Technique to
Tae Hee Kim - Ewha Womans University
Enable Fine-Pitch Patterning on Large-Area Warped Manufacturing and Characterization of Planar
Substrate Transformers as Molded Interconnect Device Magnetic Cores for High Conversion Ratio Package
Technology Component for an Industrial Production Embedded Inductors
Golam Sabbir, Subramanian Iyer - University of California, Los
Tim Nils Bierwirth, Folke Dencker, Marc Christopher Wurz Sai Saravanan Ambi Venkataramanan, Prahalad Murali, Mohan
Angeles Kathaperumal, Mark Losego - Georgia Institute of Technology;
- Leibniz University Hannover; Sebastian Bengsch, Michael
Friday May 31st Dustin Allen Gilbert - University of Tennessee
Werner, Christian Henne, Stefan Bur - Ensinger GmbH; Rico
Session 41: Student Posters Wachs - Tridelta Weichferrite GmbH Unveiling Mechanical Stress in Lithium-Metal Batteries
for Flexible Electronics: A Novel Approach With
Time: 10:00 AM - 12:00 PM Hybrid Wiring Layers for Fine Pitch Integration
Optical Techniques and Artificial Interfaces
Vineeth Harish, Krutikesh Sahoo, Subramanian Iyer - CHIPS
Mayukh Nandy, Siyang Liu, Hongbin Yu - Arizona State
Committee: Interactive Presentations UCLA; Kai Zheng, Gilbert Park, Han-Wen Chen, Steven University
Session Co-Chairs: Verhaverbeke - Applied Materials, Inc.
Creep Properties of SAC305 Solder Specimens that
Alan Huffman Novel Single and Co-Ion Implantation Induced Mimic the Microstructures of a Micro Solder Ball:
Skywater Backside Etch Stop Structures for 3D Multilayer Measurement and BLR Prediction
Email: [Link]@[Link] Stacked Package You-Gwon Kim, Heon-Su Kim, Tae-Wan Kim, Seong-Ung
Yen-Shuo Chen, Hua-Tai Fan, Yu-Chien Ko, Fu-Hsiang Ko, Ryu, Hak-Sung Kim - Hanyang University; Yongrae Jang,
Mohd. Enamul Kabir Ching-Chia Lin - National Yang Ming Chiao Tung University; Bongtae Han - University of Maryland; Jun-Hyeong Lee -
Intel Tzu-Wei Chiu - Seriphy technology corporation; Chu-Chi DUKSAN HI-METAL CO., LTD; Jin-Kyu Kim - oneduksan.
Email: enamul101b@[Link] Chen - Taiwan Semiconductor Research Institute com
Ibrahim Guven New Method for Fluid Filling Through Silicon Vias With Performance Analysis of Physically Flexible Commercial
Virginia Commonwealth Silver Ink for Packaging Techniques Microcontroller With Soft Polymer Encapsulation
Email: iguven@[Link] Zachary Nelson, Alice Mo, Luke Theogarajan - University of Min Sung Kim, Muhammad Hussain - Purdue University;
California, Santa Barbara Galo Andres Sevilla - King Abdullah University of Science and
Jae Kyu Cho Technology
Electrospray Printed Silver Films for EMI Shielding of
Globalfoundries SiP Architectures Cu@Ag Core-Shell Nanoparticles for High-Power
Email: [Link]@[Link] Emma Pawliczak, Paul Chiarot - Binghamton University Density Electronic Packaging
Low Temperature Cu/SiO2 Hybrid Bonding Using Tongtong Wang, Liang Xu - Shenzhen Institutes of Advanced
Latency Insertion Method for Accelerated Simulation
Technology
Area-Selective Metal Passivation (Interface Metal) of Memristor Crossbar Array in Neuromorphic Chip
Technology for 3D IC and Advanced Packaging Yi Zhou, Tahsin Shameem, Zohreh Salehi, Shaloo Rakheja, RF Energy Harvesting Hybrid RFID Based Sensors for
Jose Schutt-Aine - University of Illinois; Hanzhi Ma, Junwei Yu, Smart Agriculture Applications
Mu-Ping Hsu, Wen-Tsu Tsai, Chi-Yu Chen, Zhong-Jie
Erping Li - Zhejian University Yihang Chu, Ethan Kepros, Bhargav Avireni, Sambit Kumar
Hong, Kuan-Neng Chen - National Yang Ming Chiao Tung Ghosh, Premjeet Chahal - Michigan State University
University; Ou-Hsiang Lee, Tzu-Ying Kuo, Hsiang-Hung Chang A Novel Packaging Approach to Reduce Shading Losses
in Emerging Submillimeter Concentrated Photovoltaic Influence of Nickel and Bismuth Addition on the
- Industrial Technology Research Institute
(CPV) Technologies Mechanical Shear Strength of SAC+ Ni, Bi Solders
Distributed Vertical Power Delivery for High Corentin Jouanneau, Thomas Bidaud, Artur Turala, David Under Isothermal Aging and Multiple Reflows
Performance Computing Systems With Buck-Derived Jyothsna Bandayagari, Dr. Darshil Patel, Dr. Yingge Zhou -
Danovitch, Gwenaelle Hamon, Maxime Darnon - University
Regulators Binghamton University; Dr. Santosh Kudtarkar, Dr. Arun Raj,
of Sherbrooke
Dr. Shafi Saiyed - Analog Devices, Inc.
Sriharini Krishnakumar, Inna Partin-Vaisband - University of
Fabrication and Packaging of a Heterogeneously
Illinois; Ramin Rahimzadeh Khorasani, Madhavan Swaminathan Process Development of Manifold Microchannels
Integrated, Flexible Quantum Dot Enabled Micro-
- Pennsylvania State University; Rohit Sharma - Indian Institute Cooling for Embedded Silicon Fan-Out (MMC- eSiFO)
Display Package
of Technology Ropar Henry Sun, Harshal Sonagara, Subramanian Iyer - University Zhou Yang, Yuchi Yang, Peijue Lyu, Jianyu Du, Lang Chen, Chi
Multi-Objective Optimization of a 1200V Fan-Out of California, Los Angeles; Lisong Xu, Kai Ding, Mingwei Zhu - Zhang, Wei Wang - Peking University
Applied Materials, Inc.
Panel-Level SiC MOSFET Packaging With Improved Demystifying Edge Cases in Advanced IC Packaging
Genetic and Particle Swarm Algorithms Intense Pulsed Light Soldering of SAC305 for Flip-Chip Inspection Through Novel Explainable AI Metrics
Xuyang Yan, Wei Chen, Jing Jiang, Jiajie Fan - Fudan University; Package Shajib Ghosh, Antika Roy, Md Mahfuz Al Hasan, Patrick
Seong-Ung Ryu, Young-Min Ju, Jong-Whi Park, Seok-Hoon Craig, Nitin Varshney, Sanjeev J. Koppal, Navid Asadizanjani -
Xuejun Fan - Lamar University; Guoqi Zhang - Delft
Jeong, Hak-Sung Kim - Hanyang University University of Florida
University of Technology
Design Space Exploration for Power Delivery Network Effective Heat Dissipation of White Laser Diodes by
Packaging of Silicon Photonic Neural Network in Next Generation 3D Heterogeneous Integration Welding Metallized Phosphor-Sapphire on Ceramic
Accelerators Architectures Substrate With 3D Metal Dam
Russell Schwartz, Nicola Peserico, Hamed Dalir, Volker Sorger Madison Manley, Ankit Kaul, Muhannad Bakir - Georgia Zikang Yu, Jiuzhou Zhao, Qing Wang, Yang Peng, Mingxiang
- University of Florida Institute of Technology Chen - Huazhong University of Science and Technology

30
 2024 ECTC EXHIBITION
The ECTC 2024 Exhibition is 3D Systems Packaging Research Center GTI Technologies, Inc. Qualitau
pleased to showcase dozens of Adeia Heidelberg Instruments, Inc. RENA Technologies GmbH
companies and organizations AI Technology Henkel Corporation Rochester Electronics, LLC
representing the full spectrum AIM Photonics Heraeus Electronics Royce Instruments (V-TEK, Inc.)
of materials, services, Ajinomoto Fine-techno USA HOREXS S-Cubed
equipment, and products Akrometrix IBM Canada SANYU REC CO., LTD.
for the electronic packaging All Flex Solutions, Inc. IMAT, Inc. SavanSys Solutions LLC
industry. Complementing the AMAZING COOL TECHNOLOGY CORP Indium Corporation Scientech
strength of the ECTC technical Amkor Technology Institute of Microelectronics (A Star Research SCREEN Holdings Co., Ltd.
program, the Exhibition AmTECH Microelectronics Entities) SEKISUI Chemical Co., Ltd.
provides an unparalleled AOI ELECTRONICS CO., LTD Institute of Microelectronics, Assembling, & Semiconductor Equipment Corp
opportunity for engineers Asahi Kasei Corporation Packaging Fukuoka University Senju Comtek Corp (SMIC)
and decision makers to ASE Intekplus SETNA
discuss and collaborate with ASMPT AMICRA GmbH Intel Shibuya Corporation
representatives from leading AT&S JSR
electronic packaging companies. SHIKOKU CHEMICALS CORPORATION
Averatek KAO Corporation Shin-Etsu MicroSi
With scheduled refreshment Bayflex Solutions LLC KLA Corporation
breaks and social events that Shinkawa USA Inc.
Besi North America, Inc. Kleindiek Inc.
will take place in the Exhibition Shinko Electric America
Binghamton University/S3IP Koh Young Technology, Inc.
space, exhibitors and attendees Sigray, Inc.
Brewer Science, Inc. Kulicke & Soffa Pte Ltd.
will enjoy continual interactions SkyWater Technology
Cadence Design Systems LB Semicon
with conference attendees. Camtek USA, In. Lintec of America, Inc.
Smart High Tech
We are also excited to again LPKF Laser & Electronics
Sono-Tek
Canon USA
offer the ECTC Lounge, where Surfx Technologies
Carl Zeiss Microscopy, LLC Metalor
attendees and exhibitors can SUSS MicroTec Inc.
CEA-Leti Metalor Technologies USA
take a few minutes to relax Taiyo Ink
CPS Technologies Corp. MicroCircuit Laboratories LLC
or converse with colleagues. TATSUTA Electric Wire & Cable Co., Ltd.
DATAPHYSICS INSTRUMENTS USA CORP. Micross Components
Exhibit hours will be from 9:00 TAZMO
Deca Technologies Mini-Systems, Inc.
AM to 12:30 PM and 2:00 PM TDK Corporation
to 6:30 PM on Wednesday, Disco Hi-Tec America, Inc. Mitsui Chemicals America
DuPont - HD Microsystems Ltd. MKS Atotech Technic Inc.
May 29, 2024, and 9:00 AM TechSearch International Inc.
to 12:30 PM and 2:00 PM to DuPont Electronics (Rohm & Hass Electronic Nagase ChemteX Corporation
Materials) NAMICS Technologies Inc. Teikoku Taping System, Inc.
4:00 PM on Thursday, May 30, Tektronix CSO
2024. Exhibit booths for 2024 Ebina Denka Kogyo Co., Ltd. nepes
Engent, Inc. Neu Dynamics Corp TOKYO OHKA KOGYO AMERICA, INC.
are currently on a waitlist. The
ERS electronic GmbH NICHING INDUSTRIAL CORPORATION Toray International America Inc.
2024 Exhibit waitlist signup can
be found at [Link] and EV Group, Inc. nScrypt Inc. TOWA USA CORPORATION
by clicking the “Exhibits” link. Evatec NA Inc. OKUNO CHEMICAL INDUSTRIES CO., LTD TOYOCHEM CO., LTD.
For additional information or F&K Delvotec, Inc. Onto Innovation Toyota Tsusho America, Inc.
questions, please contact Sam ficonTEC Service GmbH PacTech USA USHIO INC.
Karikalan, ECTC Exhibits Chair Finetech Panasonic Industrial Devices Sales Company of XYZTEC, Inc.
at +1-949-529-4802 or email Fraunhofer IZM America Yole Group
samkarikalan@[Link] and FUJIFILM ELECTRONIC MATERIALS U.S.A., Inc. Plan Optik AG Zuken USA Inc
exhibits@[Link] Fujimi Corporation QP Technologies Zymet, Inc.

HOW TO REGISTER FOR ECTC: HOTEL RESERVATIONS

Gaylord Rockies Resort & Convention Center
6700 N Gaylord Rockies Blvd., Aurora, CO 80019
By Internet: Submit your registration
Hotel reservations for ECTC 2024 can be made in one of two ways:
electronically via [Link]. Your 1) Contact the Gaylord Rockies Resort & Convention Center at +1-720-452-6900 and reference the
ECTC Conference to receive the conference rate of US$229 per night, unless the reserved room block
registration must be received by the for the conference is fully booked.
or
cutoff date, May 3, 2024, to qualify for
2) Log onto [Link] and click on the “Location” tab near the top of the page to find a special online
hotel registration link.
the early registration discounts.
Note about Hotel Rooms
Attendees should note that only reputable sites should be used to book a hotel room for the 2024
You may contact our registration staff ECTC. Be advised that you may receive emails about booking a hotel room for ECTC 2024 from 3rd
party companies. These emails and sites are not to be trusted. There are scam artists out there and if it’s
at registration@[Link] for additional too good to be true it likely is. The only formal communication ECTC will convey about hotel rooms
will come in the form of ECTC emailings to subscribers or ECTC emails from our Executive Committee.
information. Payment can be made by ECTC’s only authorized site for reserving a room is through our website ([Link]). You may,
however, want to use other trusted sites to book travel. Should you have any questions about booking a
Visa, Mastercard, or American Express. hotel room please contact ECTC staff at lrenzi@[Link].

31
 74th Electronic Components & Technology Conference

2024 ECTC REGISTRATION INFORMATION
Advance Registration Door Registration
Conference Registration Until May 3 Starting May 4
IEEE Member Attendee (full ECTC conference) US $1100 US $1265
Attendee (Joint ECTC + ITHERM conferences) $1430 $1665
Attendee One-Day Registration $835 $835
Speaker or Chair (full ECTC conference) $935 $1135
Speaker or Chair One-Day Registration $735 $735
Non-IEEE Member Attendee (full ECTC conference) $1365 $1530
Attendee (Joint ECTC + ITHERM conferences) $1665 $1995
Attendee One-Day Registration $835 $835
Speaker or Chair (full ECTC conference) $935 $1135
Speaker or Chair One-Day Registration $735 $735
Student Attendee or Speaker (full conference) $455 $455
Professional Development Courses (PDCs) Note: all PDCs include a luncheon
IEEE Member Full PDC (both a.m. and p.m.) $625 $625
Single PDC (a.m. or p.m.) $440 $440
Non-IEEE Member Full PDC (both a.m. and p.m.) $675 $675
Single PDC (a.m. or p.m.) $490 $490
Student Full PDC (both a.m. and p.m.) or Single PDC $150 $150
Other Registration Options
Extra Luncheon Tickets $100 $100
Cancellation Fee $100 $100

Please note that we are no longer offering the purchase of extra proceedings. Additionally, the various exhibit registration
types are no longer available for the general public.
Please log onto [Link]/registration to register for 2024 ECTC.
There will be no refunds or cancellations after May 3, 2024. Please note that a $100 cancellation fee will be in effect for all
cancellations made on or prior to May 3, 2024. Substitutions can be made at any time.
For additional information about registration or ECTC please contact us at:
ECTC Registration
℅ Renzi & Company, Inc. Management
Email: registration@[Link]
*If you join IEEE BEFORE you register for the 2024 ECTC you can save on registration fees and get the Electronics Packaging
Society (EPS) add-on membership free for the reminder of 2024!
To take advantage of this offer, simply go to: [Link]
At destination, create your IEEE Web Account. Once complete, proceed to the Shopping Cart and enter EPS2024ECTC in the
promotion code box. Click “Apply” and the Shopping Cart will be updated to show the discount. Use your new IEEE membership ID
number and register for ECTC at the discounted IEEE Member Rate.
If you are already and IEEE member, you can add EPS membership for free using the same promo code EPS2024ECTC

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 CONFERENCE SPONSORS
PLATINUM

[Link] [Link] [Link]

GOLD

[Link] [Link] [Link]/usa [Link]

[Link] [Link] [Link]/electronic-materials [Link]/

[Link] [Link]/us/en/industries/ [Link]

[Link]

[Link] [Link] [Link] [Link]

[Link]/ [Link]/en [Link]/

[Link]/ [Link]/ [Link]

[Link] [Link] [Link]/microscopy

SILVER

[Link] [Link]

[Link]/ [Link]/en/ [Link]/

33
 CONFERENCE SPONSORS
GALA RECEPTION SPONSOR REGISTRATION SPONSOR BADGE LANYARD

[Link] [Link] [Link]

STUDENT RECEPTION STUDENT BEST PAPER SPONSOR INTERNET SPONSOR

[Link] [Link] [Link]

PANEL SESSIONS SPONSOR CONFERENCE APP SPONSOR COFFEE CUP SPONSOS

[Link]/en/products/ic-substrates/ [Link]/s3ip [Link] .[Link]/

REFRESHMENT BREAK SPONSORS

[Link] [Link] [Link]

MEDIA

Official Media Sponsor

[Link]

Additional Media Sponsors

[Link] [Link] [Link] [Link] [Link]

[Link] [Link] [Link] [Link] [Link]

[Link]
34
 CONFERENCE OVERVIEW
Tuesday, May 28, 2024 ECTC Special Session on RF Packaging Thursday, May 30, 2024 Student Interactive Presentations Session 41
Morning Professional 3:30 p.m. - 5:00 p.m. ECTC Plenary Session on Emerging Start-ups 10:00 a.m. - 12:00 p.m.
Development Courses RF Packaging for Communication and 8:00 a.m. - 9:15 a.m.
8:00 a.m. - 12:00 p.m. Sensing Applications above 100 GHz The Future of the Semiconductor Raffle Prize Luncheon
1. High Reliability Soldering in – Technologies, Design Challenges and Industry. Emerging Start-ups and 12:45 p.m. - 2:00 p.m.
Semiconductor Packaging Emerging Solutions Technologies for Advanced Packaging
2. Photonic Technologies for Technical Sessions
Young Professionals Technical Sessions
Communication, Sensing, and 2:00 p.m. - 5:05 p.m.
Displays Networking Panel 9:30 a.m. - 12:35 p.m.
31. Advances in Flip Chip and Chip
3. From Wafer to Panel Level 7:00 p.m. - 7:45 p.m. 13. Next-Generation Substrate
Manufacturing Technologies Scale Packages
Packaging
14. Breakthrough Ultra-Fine Pitch 32. Advancement in Copper Hybrid
4. Eliminating Failure Mechanisms in ECTC EPS Seminar
Advanced Packages Redistribution Layer and Solder Bonding Technologies Common to
7:45 p.m. - 9:15 p.m.
5. Navigating Thermal and Reliability Bumping Technologies Multiple Applications
Challenges of Chiplets on Large
Challenges in Chip Components 15. Novel Materials and Process for
Substrates 33. Fine-Pitch Materials and Processes
for Automotive High-Performance Hybrid Bonding
34. Photonics Integration, Materials,
Compute Systems Wednesday, May 29, 2024 16. Reliability of High-Density and
High-Power Packages and Processes
6. Polymers for Wafer Level ECTC Keynote
Packaging 17. Advanced Additive Manufacturing 35. Reliability and Current Stressing of
8:00 a.m. - 9:15 a.m.
7. Flip Chip Technologies for Printed Electronics and Solder Interconnections
Petascale photonic chip connectivity for
8. Reliable Integrated Thermal Integrated Systems 36. Thermal Management and Cooling
energy efficient AI computing
Packaging for Power Electronics 18. Radio Frequency Antenna-in-
Solutions
Technical Sessions Package and Component Design
ECTC Special Session on Industry-
9:30 a.m. - 12:35 p.m. Interactive Presentation Session 39
Government Co-Investments for Advanced
1. Advances in Fan-Out, Wafer
10:00 a.m. - 12:00 p.m.
Session Summary
Packaging
8:30 a.m. - 10:00 a.m.
Level, and Panel-Level Packaging by Interest Area
Technologies Enabling New EPS Awards Luncheon
Exploring the Impact of Industry- Packaging Technologies
Applications 12:45 p.m. - 2:00 p.m.
Government Co-Investments for the
2. Advanced Die-to-Wafer Hybrid S1, S7, S13, S19, S25, S31
Advanced Electronics Sector in North
Bonding for Heterogeneous Technical Sessions
America, Asia and Europe 2:00 p.m. - 5:05 p.m.
Integration
19. 3D Integration Copper-Copper Applied Reliability
ECTC Special Session on Advanced Metrology 3. Co-Packaged Optics
Hybrid Bonding S4, S16, S29, S35
10:30 a.m. - 12:00 p.m. 4. Reliability of Advanced Substrates
20. Novel High-Density 3D & Thru-Via
Challenges and Opportunities in and Interconnects
Structures and Processes
Advancing Metrology for Next-Generation 5. Digital Health Care: Wearable 21. Innovations in Polymer Packaging Assembly & Manufacturing
Microelectronics Sensors, and Flexible Electronics Materials Technology
6. Thermal-Mechanical Reliability 22. Signal & Power Integrity for
Afternoon Professional S10, S23, S27
Simulations Advanced Packages and Systems
Development Courses 23. Novel Bonding Technology for
1:30 p.m. - 5:30 p.m. Interactive Presentation Session 37 Advanced Assembly Substrates and Emerging Technologies
9. Additive Flexible Hybrid Electronics 10:00 a.m. - 12:00 p.m. Integration S5, S11, S17
– Manufacturing and Reliability 24. Advances on Flex and
10. Fundamentals of RF Design and Wednesday Luncheon Redistribution Layer Technologies
Fabrication Processes of Fan-Out 12:45 p.m. - 2:00 p.m. and Warpage RF, High-Speed
Wafer/Panel Level and Advanced Components & Systems
Technical Sessions Interactive Presentation Session 40
RF Packages
2:00 p.m. - 5:05 p.m. 2:30 p.m. - 4:20 p.m. S18, S22, S26
11. Fan-Out Packaging and Chiplet
Heterogeneous Integration 7. Heterogeneous Integration:
Systems Design, Signal & Power Friday, May 31, 2023
12. Analysis of Fracture and Interconnections
Delamination in Microelectronic Delivery, and Process Optimization ECTC EPS President Panel Session on
S2, S8, S14, S20, S26, S32
Packages 8. Sub-Micron Scaling in Wafer-to- Education and Workforce Development
13. Advanced Packaging for MEMS and Wafer Hybrid Bonding 8:00 a.m. - 9:15 a.m.
Sensors 9. Advanced Processes for Chip Challenges in Education and Workforce Materials & Processing
14. Nano Materials and Polymer Stacking Development in the New Chips S9, S15, S21, S27, S33
Composites for Electronic 10. Novel 3D Integration and Hybrid Economy
Packaging Bonding Solutions
Technical Sessions Thermal/Mechanical
15. Design-On-Simulation for 11. Next-Generation Artificial
Advanced Packaging Reliability and Intelligence, Quantum Computing, 9:30 a.m. - 12:35 p.m. Simulation &
Life Prediction 25. High-Performance Computing, Characterization
and Secure Packaging
16. Thermal Spreading and Contact Design Challenges, and Solutions
12. Artificial Intelligence and Advanced S6, S12, S24, S30, S36
Resistance 26. Chiplet Interconnect Design and
Modeling Approaches
Validation
ECTC Special Session on Thermal Interactive Presentation Session 38 27. Advanced Die Bond and Board Photonics
Management 2:30 p.m. - 4:20 p.m. Level Reliability S3, S28, S34
1:30 p.m. - 3:00 p.m. 28. Optical Interconnections
Efficient and Innovative Thermal ECTC/ITHERM Diversity and Reception 29. Reliability in Harsh Environments
Management for Power Hungry AI/ 6:30 p.m. - 7:30 p.m. Including Automotive Interactive Presentations
ML Applications: Challenges and Best Practices to Attract, Hire and Retain 30. Process and Hybrid Bonding S37, S38, S39, S40, S41
Opportunities a Diverse Workforce Modeling and Characterization

35