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COA Assignment 1

The document discusses various concepts related to computer architecture, including shift operations, processor speed, stack operations, and instruction formats. It outlines how to calculate average cycles per instruction and the impact of processor speed on execution time. Additionally, it explains stack operations such as push and pop, and provides examples of converting expressions to reverse Polish notation.

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sahil1740b
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0% found this document useful (0 votes)
14 views6 pages

COA Assignment 1

The document discusses various concepts related to computer architecture, including shift operations, processor speed, stack operations, and instruction formats. It outlines how to calculate average cycles per instruction and the impact of processor speed on execution time. Additionally, it explains stack operations such as push and pop, and provides examples of converting expressions to reverse Polish notation.

Uploaded by

sahil1740b
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Name anisly Khandelsal

Beth’
Roll n o . y o | 0 | 6 0 7

Assgmed-1 (con)
Identity
5. (onsider value ( o), stored in regster , ns erted oik
chamge valuo tegr
e sht! exeuted,
exeuted 4 aftr that
tha position

all bits
A gt shift operatious mo
with O, anol t
rgu. The is pilled
bit is dis carded.
rigid
Before Rigut shit

With to tte
’ Left shitt all b} s One posjtion
moveS tafimost
A left shit operaton
bit filed with o, Qnd the

left. The rgktmost


carded.
bi- is
dis
Sit
1 O

Nter Ater et Swt


New Value Bimary
speed is execut
wth
A processor the
instru ti on . The fotloong
program ef lo9
bseneble,
ere uton times
take Cteek Cyele.
À 30

Clo ck ycles.
taks 8 cock ey clei.
what is the averag CPT (yclus Pes Inetuction ) o! the system?
whot will be
ue mpovemt in the exe ution
Same processot is increased to 3 GHz?
Sped
Sol"! Gven, Total no mstuctes
ycls se cond
Pro cessor speed = 2GH
we calculate te aveag
awage ba
Average CI Co.3 x2) * (0.4 x3) + Co.s)+ (o. x&)
= 0, 6 tl,2+ |,o t 1.8
- 3.6
Exeeuti on rocessor

CT. = Instru chion Cout X CPE 10 X 3. 3,6

Cloce Rat

fxewten 3qH frocessor

E.T. x3.6 Seconds

Tmp ovemnt in E.T.

Imptment Oldl New


= |.8t, 2 seconcs

Pescete Impsoye ment


O.G 33. 32 y.
tack
about regster Stack and memoy
Use a neatdigrom to s how te fop
atom in tems mi cro ofperatons Tmplment (
(A* B) Le cD + E)+ FJ in
Stack
A
Rogster
register Stack olleH on af high.-speed store
s taek,
locatio erganisecd to
s ta ck
bata pushed
Stack popecd off
ntena
Acc ess
time
vey faat becaue bsed rgister
maide
CRU. Qvailasle
umber physical regsters
Limite d
(small size)

Stack
Memory implemente in th system's mon
A menoy stak is
memony CRt
re&eved Qrea
Stored
Dota is
Stak Penter (s),
S Compaed gister stek
Access acs
becast t inuoles Ymem
sin c e
a tayerstack STU
A|ows for
by arailable

Pu SH 4 foP Operati
TaePosh operaton ìnserts elemet
reme
while
elemet to topmat.
* fush operadivn
Deeremet stack poiter (SP Sp- 1)
Store data t locatis n pited y jP(M [sP]e peta)
SP- I1 (Empty)

Push:
s P ’ [patal

* Pof operaion
Read data rem the location point d SP (Datae-m [s el)
by sP
Inereent stack potor (SP SP+ )

Sp Date]

Apo PoP
[ J Centty agen)

n Convert (A +8) C (D+ £) + FJ to revse folish Notetion (eN)


(A+ B) ’AB +
(P+E)’ DE +
(D1¬) CE +
C* (D+£)}+F ’(DE + * f+

relate to a
four registes Ro, R, R2, R3
Q3. The output o!
to the mput of dytmation regiss RY. faun
register Qnd h reqired ttanfes take
wtva To to T3.

Demontrate
bjt ea h)
4 Sourte
rgstrs R0, R), R2, R3 (8-
) destnatton regis ter : (8 bj+)

maltiplexer
Ti mig Contrel legic

Wor king
The out put s f Ro- R3 are
inputs
Soluton Ims S1, So) of the MUX are
Contollecd
by

At TO )
selet mput o (Ro)
At selet input (Re)
At T2) Selet input
Selet in pat 3 (R3) f R4.
MüX output is connete to the in ptt
The
loads the vae from MOX output.
Avck pula

(tortled by To, T, Ta, T3)

Ry

Table
lnteaval
Selectd Regzter -iMUN Select Tnpt
Tme
Ro
To
TI
Te

T3 R3
Q19. Show the stotes stack ofs each step
when perfom the fo ltog oPeretton
stack basod
S* 2 (3* 4 -4) +(o'+ 4 4)
Comput.
So)" Expressioy
5X2 + (3 x4- 4) + (214 x )
Convert
Break Nowy

244* +
Final RPN

Stuck Opetatin

Operation Stack

Push 5 L

Push 2 5, 2
2.
Multpy S
Push 3
4.
Push 4 |0, 37
S.
34 4 |0, |2
6 Mutipy
push u To, 12, 4
8 Subtsut 12-4 |0,8

lo. Push 2 18, 2


I|. ush Y I8,2,4
12 Push y 18,2,4, 4
13. Mutipy
14. Add 1 ,18
(S.
36

Valup Stack=36
Qnd he ins tou tion
Consi der 64 K d 20
memoy are tue opuand
amd
has thtee parts which i n d i t addes
modu bit to speufs d iset

Use reerene this memoy Size


instoucion fromat otlowed e) Tns truton

a)Addross regrstr b) ata rgstts gsta


locatton ned
S" There 64 k ne mory
ocatoy.
addresS
ay memo
The înatoution has
bit = bjt
Mode
(6 bit
oP code.
Re bits fes
Ofcod Size

Size
a) Address Registess address es.
holds memoy bits
So, 64K locatin

tes Size
b) Data
Regs Stotes one work f Memy
Data teaister Size 26 bits
So, Dota

) Tnstruction
Registrs Size Store te
Tnstayctton Regrstrs Srze
ins foucten
Jnstution size

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