Problems for MOS Section
Exercise 1: Compute iD (µpCox (W/L) = 0.4 mA/V2 , Vtp = −3 V
and λ = 0 ).
PMOS with vSG = 5 V and vGD = 6 V.
VOV = vSG – | Vtp|= 5 – 3 = 2 V
o VOV > 0 → MOS is ON
vSD = vSG + vGD = 5 + 6 = 11 V
o vSD = 11 > VOV = 2 → MOS in saturation
W 2
iD = 0.5µ p Cox VOV = 0.5 × 0.4 ×10-3 (2) 2 = 0.8 mA
L
Exercise 2: Find VS (µnCox (W/L) = 0.5 mA/V2 , Vtn = 0.8 V and
λ = 0 ).
Since iD = 10 µA, MOS is ON
Assume MOS in saturation
W 2
iD = 0.5µ nCox VOV
L
10 × 10-6 = 0.5 × 0.5 ×10-3 VOV
2
→ VOV = 0.2V
vGS = VOV + Vt = 0.2 + 0.8 = 1 V
vGS = VG − VS = 0 − VS → VS = −1 V
vDS = VD − VS = 7 − (−1) = 8V
vDS = 8 > VOV = 0.2 V (MOS in saturation)
Exercise 3: Consider this PMOS with µpCox (W/L) = 0.6 mA/V2 ,
Vtp = −1 V and λ = 0 .
A) For what values of VG, PMOS will be ON?
B) For what values of VD, PMOS will be in triode? (in terms of VG)
C) For what values of VD, PMOS will be in saturation? (in terms of VG)
vSG = VS − VG = 5 − VG
vSD = VS − VD = 5 − VD
VOV = vSG − | Vtp | = 5 − VG − | Vtp | = 4 − VG
A) Range of VG for MOS ON?
VOV ≥ 0 → 4 − VG ≥ 0 → VG ≤ 4 V
B) Range of VD for MOS in triode?
vSD ≤ VOV → 5 − VD ≤ 4 − VG → VD ≥ VG + 1
C) Range of VD for MOS in saturation?
vSD ≥ VOV → 5 − VD ≥ 4 − VG → VD ≤ VG + 1
Exercise 4: Find vGS , vDS , and iD (µnCox (W/L) = 0.4 mA/V2 ,
Vtn = 3 V and λ = 0 ).
GS - KVL : 0 = 106 iG + vGS + 103 iD − 15 = VOV + Vt + 103 iD − 15
→ 12 = VOV + 103 iD
DS - KVL : 15 = 103 iD + vDS + 103 iD − 15
→ 30 = vDS + 2 ×103 iD
Not in cut-off as for iD = 0, GS-KVL gives VOV =12 V > 0.
Assume MOS in saturation
W 2
iD = 0.5µ nCox VOV
L
GS - KVL : 12 = VOV + 103 × 0.5 × 0.4 ×10-3 VOV
2
2
0.2 VOV + VOV − 12 = 0
VOV = −10.64V ( incorrect, need VOV > 0)
VOV = 5.64V → vGS = 8.64V
GS - KVL : 12 = VOV + 103 iD → iD = 6.36 mA
DS - KVL : 30 = vDS + 2 × 103 iD → vDS = 17.27 V
vDS = 17.3 > VOV = 5.64 V (MOS in saturation)
Exercise 5: Find R such that PMOS is in saturation with VOV = 0.6 V
(µpCox = 0.1 mA/V2 , W/L = 10/0.18 , Vtp = −0.4 V and λ = 0) .
In an IC, W/L (typically specified as a fraction) is
a design parameter for MOS circuits.
W 2
iD = 0.5µ p Cox VOV = 0.5 × 0.1 × 10-3 × (10 / 0.18) × (0.6) 2 = 1 mA
L
SG - KVL : 1.8 = RiD + vSG
= 10 −3 R + VOV + | Vtp |
1.8 = 10 −3 R + 0.6 + 0.4
R = 800 Ω
SD - KVL : 1.8 = R iD + vSD → vSD = 1.0 V
vSD = 1.0 > VOV = 0.6 → MOS in saturation
Exercise 6: Find VD (µnCox (W/L) = 0.5 mA/V2 , Vt = 0.8 V and
ignore channel-width modulation).
When the gate and drain of a MOS are connected to each
other, MOS becomes a 2-terminal device.
o Called diode-connected transistor
If MOS is ON (vDS = vGS ≥ Vt ), MOS will always be in
saturation!
o vDS = vGS ≥ vGS − Vt = VOV
W 2
iD = 0.5µ nCox VOV
L
DS/GS - KVL : 5 = 103 iD + vGS = 103 × 0.5 × 0.5 × 10 -3 VOV
2
+ VOV + Vt
2
0.25 VOV + VOV − 4.2 = 0
VOV = −6.56V ( incorrect, need VOV > 0)
VOV = 2.56V
vGS = VOV + Vt → VD = vDS = vGS = 3.36V
Exercise 7: Find V1 and V2 (µnCox (W/L) = 5 mA/V2 , Vt = 1 V
and ignore channel-width modulation).
GS1 - KVL : 0 = vGS 1 + 103 iD − 2.5 = VOV 1 + Vt + 103 iD − 2.5
→ VOV 1 + 103 iD = 1.5
GS2 - KVL : 2.5 = vGS 2 + vDS 1 + 103 iD − 2.5
DS - KVL : 2.5 = vDS 2 + vDS1 + 103 iD − 2.5
KCL : iD1 = iD 2 = iD
Q1 is not in cut-off as for iD1 = 0, GS1-KVL
gives VOV =1.5 V > 0.
o Q2 is not in cut-off either as iD1 = iD2 > 0
Exercise 7 (cont’d) : Find V1 and V2 (µnCox (W/L) = 5 mA/V2 , Vt
= 1 V and ignore channel-width modulation).
Assume both MOS in saturation
W 2
iD = iD1 = 0.5µ nCox VOV 1
L
GS1 - KVL : 1.5 = VOV 1 + 103 iD = VOV 1 + 103 × 0.5 × 5 × 10 -3 VOV
2
1 + VOV 1 − 1.5 = 0
2
2.5 VOV
VOV 1 = −1.0V ( incorrect, need VOV > 0)
VOV 1 = 0.60V
Both MOS in saturation, iD2 = iD1 and λ = 0: VOV2 = VOV1 = 0.60 V
vGS1 = VOV 1 + Vt = 0.6 + 1 = 1.6 V
vGS1 = VG1 − VS 1 = 0 − V2 → V2 = −1.6 V
vGS 2 = VOV 2 + Vt = 0.6 + 1 = 1.6 V
vGS 2 = VG 2 − VS 2 = 2.5 − V1 → V1 = 0.9 V
Exercise 7 (cont’d) : Find V1 and V2 (µnCox (W/L) = 5 mA/V2 , Vt
= 1 V and ignore channel-width modulation).
Need to confirm our assumption of both MOS in saturation
vDS1 = VD1 − VS 1 = V1 − V2 = 0.90 − (−1.6) = 2.5 V
vDS1 = 2.5 > VOV 1 = 0.6 V
vDS 2 = VD 2 − VS 2 = 2.5 − V1 = 2.5 − 0.9 = 1.6 V
vDS 2 = 1.6 > VOV 2 = 0.6 V
For circuits with multiple transistors, it is usually advantageous
to keep track of node voltages (at transistor terminals!
