 Analog Design Trade-Offs

 Common-Source (CS) Stage

 Common -Drain (CD) Stage
 Common Gate (CG) Stage
 Cascode Stage
Common -Source (CS) Stage
Common -Drain (CD) Stage
Source follower (Common Drain):
• Source follower (or common drain stage)
may operate as a voltage buffer.
• M1 never operates in the triode region as
long as Vin ≤ VDD + VTH
• Vout follows Vin with a voltage difference
(level shift) equal to VGS
• As Vin increases, gm increases
monotonically and hence Av approaches :
gm / (gm + gmb ) = 1 / (1 +η) < 1
• The circuit results in a substantial
nonlinearity in the input-output
characteristic as gm Varies with Vin.
• Maximum possible gain = 1

gmRS
Vout   n Cox Vin  VTH  Vout  R S
1 W 2
A 
2 L 1  g m  g mb R S
Drawback of RS implemented as ohmic resistor:
• ID1 depends strongly on input DC level.
• For example: If Vin changes from 1.5 to 2.0 V (10 % increase)
then ID1 increases by a factor of 2, hence VGS – VTH increases by √2.
• Even if VTH is relatively constant, the increase in VGS means that Vout =(Vin
−VGS) does not follow Vin faithfully, thereby incurring nonlinearity.
• Improvement: instead of RS we take a constant current source M2
operating into saturation to get a linear behavior.
Output impedance of SF with constant current source as load:

V1  VX
 I X  g m VX  g mb VX  0
VX 1
Hence  R out 
IX g m  g mb
Note: Body effect decreases the output resistance of the source follower !
Example:
Source follower:

W/L = 20µm/0.5µm, VTH0 = 0.6 V, |2ΦF| = 0.7 V

µnCox = 50 µA/V2, γ = 0.4 V2, and I1 = 200 µA

Q1: What is Vout for Vin = 1.2 V?

Q2: If I1 is produced by an nMOS device, what is the minimum W/L ratio for
which M2 remains saturated?
Solution Q1:
• VTH depends on Vout
Iterative solution: (1) we calculate Vout for VTHo then we calculate VTH for Vout obtained in
(1)
W
I D   n Cox  Vin  VTH  Vout 
1 2 
VTH  VTH 0   2F  VSB  2F 
2 L
 VTH  0.6  0.4 0.7  0.153  0.7 
 Vin  VTH  Vout  
2 2I D
 n Cox
W  0.635 V
L
Using the new VTH=0.635V, the improved
2*200 A 2 value of Vout is 0.119 V, which is
 1.2  0.6  Vout 
2
 V approximately 35 mV less than the
50 A *40 calculated above.

 Vout  0.153 V
Solution Q2:

• Consider transistor M2 in place of current source:

• Drain-source voltage of M2 is VDS(M2) = 0.119 V
• Device is saturated only if VGS – VTH < 0.119 V
• In the saturation region we have,

W
I D  200 A   n Cox   0.119
1 2

2  L 2
W 283 m
  
 L  2 min 0.5 m
Drawbacks of the SF configuration:
• Source followers exhibit a high input impedance and a moderate
output impedance, but at the cost of two drawbacks:
1. Nonlinearity.
• Even with an ideal current source I1, the I/O characteristics
display a nonlinearity due to the dependence of VTH on Vsource .
• Submicron technology: rO of the transistor also changes with VDS
additional nonlinear effects !
Solution
• Nonlinearity due to body effect can be eliminated if the bulk is
tied to the source.
• Because all nMOS devices have a common bulk potential, this is
only possible for pMOS devices in a n-well technology.
• PFET have a lower carrier mobility leading to higher output
impedance than for a nMOS source follower.
 2. Voltage headroom limitation.

• Source followers shift the level of the signal by VGS consuming voltage
headroom and hence limiting the voltage swing.
• Without SF:
Vxmin = VGS1 – VTH1 because M1 in saturation
• With SF:
Vxmin > VGS2 + (VGS3 – VTH3) so that M3 is in saturation

• For (VGS1 – VTH1) = (VGS3 – VTH3)

• So the voltage swing allowable at X is reduced by VGS2

A cascade of a common-source
stage and a source follower.
3. Low voltage gain.

SF

CS
Common gate stage (CG)
 Common gate stage (CG)
• In the CS-Stage and for Source-Followers input signal is applied to a gate
of a MOSFET.
• If the input is applied to the source terminal of a MOSFET and output is
taken at the drain terminal we have a Common Gate Stage.
• Gate is connected to a dc voltage to establish proper operating
conditions
• Bias current flows directly through input signal source (direct coupling) (a)
• M1 can be biased by a constant current source, with the signal (a)
capacitive coupled to the circuit (capacitive coupling) (b).
• Without including the channel length modulation of M1, the voltage gain
and the input and output resistances are:

• Note that the gain is positive, and the body effect increases the
equivalent transconducatnce of the stage.
(b)
Direct coupling – Large signal analysis:
• Assume that Vin decreases from a large positive value
Vin >= Vb – VTH: M1 is off and Vout = VDD
• For lower values of Vin: M1 goes into saturation

I D   n Cox Vb  Vin  VTH 

1 W 2

2 L
Vout  VDD   n Cox Vb  Vin  VTH  R D
1 W 2

2 L
• As Vin decreases, so does Vout, eventually driving M1 into
the triode region if

Vout  Vb  VTH
 Cascode stage
(CS stacked with CG)
Cascode stage:
• Input signal of a CG-stage may be a current.
• A common source stage converts a voltage signal into
a current signal.
• Cascade of a CS and a CG stage is called a cascode
stage.
• M1 generates small signal drain current proportional to
Vin
• M2 routes this current to RD.
• M1 is the input device, M2 is the cascode device.
• M1 and M2 carry the same current.
• A cascode amplifier offers advantages over simple CS-
stages:
1. output impedance increases
2. intrinsic gain is squared
Cascode stage bias conditions:

• M1 is saturated if VX >= Vin – VTH1

• To keep M1 and M2 both in saturation,
VX = Vb – VGS2
• Hence, Vb – VGS2 >= Vin – VTH1

Or Vb = Vin + VGS2 – VTH1

• M2 in saturation  Vout >= Vb – VTH2

• Hence Vout >= Vin – VTH1 + VGS2 – VTH2
• If Vb is chosen to keep M1 at the edge of saturation,
minimum output voltage for which both transistors
operate in saturation is equal to the overdrive voltage of
M1 plus that of M2.
• Minimum output swing becomes:
• Voutmin=Vds1+Vds2
Cascode stage – large signal analysis:

• Vin = 0 V  Vout = VDD

• Vin < VTH1  M1 and M2 are „off“
Vout = VDD
VX = Vb – VTH2
• Vin >= VTH1  M1 is „on“
Vout drops as M1 draws current
VGS2 increases as ID2 increases
hence VX drops
• Vin sufficiently
large  VX drops below Vin by VTH1
- M1 enters triode region
Vout drops below Vb by VTH2
- M1 and M2 are in triode region
Cascode stage – small signal equivalent circuit:
Cascode stage – output impedance:

• The circuit can be viewed as a

degenerate common-source with a
source resistor rO1.
• Using the equation of output resistance
for CS stage,
R out  1  g m 2  g mb 2 rO2 rO1  rO 2
• Assuming g m rO  1 , we have
R out  g m 2  g mb 2 rO 2 rO1
• M2 boosts the output impedance of M1
by a factor of
g m2  g mb 2 rO2
Cascode stage – voltage gain:
Cascode stage – voltage gain:

R out  1  g m 2  g mb 2 rO2 rO1  rO 2

Av   g m1[1   g m 2  g mb 2 rO 2 rO1  rO 2 ]

Cascode stage – voltage gain:

• Voltage gain of a cascode stage is given as:

A   gm1  gm 2  gmb 2  rO 2 rO1
• The maximum voltage gain is roughly equal to the
square of the intrinsic gain of the transistors
• High output impedance of the cascode stage results in a
high voltage gain !