MICROPROCESSOR
SYSTEMS
The Intel Microprocessors
8086/8088, 80186/80188, 80286, 80386,
80486, Pentium, Pentium Pro Processor,
Pentium II, Pentium III, Pentium 4, and Core2
with 64-Bit Extensions
Architecture, Programming, and Interfacing
Eighth Edition, 2009 (By: BARRY B. BREY)
Mohamed M. Eljhani, Ph.D.
Department of Computer Engineering
University of Tripoli
Spring 2022
Chapter 4
Instruction Set
Chapter Outline
◼ Concentrates on different type of instructions
◼ Explain the operation of each instruction with
applicable addressing modes
◼ Data movement instructions
◼ Arithmetic instructions
◼ Logical Instructions
◼ String manipulation instructions
◼ Process control instructions
◼ Control transfer instructions
Chapter 4 — Instruction Set — 2
Instruction Mode
◼ Instructions vary in length from 1 to 13 bytes
◼ 80386 and above assume all instructions are 16 bit mode
instructions when the machine is operated in real mode
(DOS)
◼ In protected mode (Windows), the upper byte of the
descriptor contains the D-bit that selects either the 16- or
32-bit instruction mode
Chapter 4 — Instruction Set — 3
Instruction Set
Chapter 4 — Instruction Set — 4
Memory Address Calculation
Chapter 4 — Instruction Set — 5
Data Transfer Instructions
Chapter 4 — Instruction Set — 6
Data Transfer Instructions
Chapter 4 — Instruction Set — 7
Data Transfer Instructions
Chapter 4 — Instruction Set — 8
Data Transfer Instructions
Chapter 4 — Instruction Set — 9
Data Transfer Instructions
Chapter 4 — Instruction Set — 10
Data Transfer Instructions
Chapter 4 — Instruction Set — 11
PUSH / POP Instructions
◼ Important instructions that store and retrieve data from
the LIFO (last-in, first-out) stack memory
◼ Six forms of the PUSH and POP instructions:
◼ Register, Memory, Immediate
◼ Segment Register, Flags, All Registers
◼ The PUSH and POP immediate & PUSHA and POPA
(all registers) available 80286 - Core2
◼ Register-addressing allows contents of any register to
transfer to the stack or from the stack
◼ Memory-addressing PUSH and POP instructions store
contents of memory location on the stack or stack into a
memory location
Chapter 4 — Instruction Set — 12
PUSH / POP Instructions
PUSH, transfers 2 bytes of data to the stack;
◼ 80386 and above transfer 2 or 4 bytes
◼ PUSHA instruction copies contents of the internal
register set, except the segment registers, to the stack
◼ PUSHA (push all) instruction copies the registers to the
stack in the following order:
AX, CX, DX, BX, SP, BP, SI, and DI
◼ PUSHAD and POPAD instructions push and pop the
contents of the 32-bit register set in 80386 - Pentium 4
◼ PUSHF (push flags) instruction copies the contents of
the flag register to the stack
Chapter 4 — Instruction Set — 13
Data Transfer Instructions
Chapter 4 — Instruction Set — 14
Data Transfer Instructions
Chapter 4 — Instruction Set — 15
Data Transfer Instructions
Chapter 4 — Instruction Set — 16
Data Transfer Instructions
Chapter 4 — Instruction Set — 17
Data Transfer Instructions
Chapter 4 — Instruction Set — 18
Data Transfer Instructions
Chapter 4 — Instruction Set — 19
Data Transfer Instructions
Chapter 4 — Instruction Set — 20
Arithmetic and Logic
Instructions
◼ The arithmetic instructions include addition,
subtraction, multiplication, division, comparison,
negation, increment, and decrement
◼ The logic instructions include AND, OR, Exclusive-OR,
NOT, shifts, rotates, and the logical compare (TEST)
◼ Logic operations provide binary bit control
◼ Allow bits to be set, cleared, or complemented
◼ TEST, a special form of the AND instruction
◼ NEG, similar to the NOT instruction
Chapter 4 — Instruction Set — 21
Addition, Subtraction and
Comparison
◼ Exchange and add (XADD), appears in 80486 and
continues through the Core2
◼ XADD instruction adds the source to the destination and
stores the sum in the destination, as with any addition
◼ After the addition takes place, the original value of the
destination is copied into the source operand
◼ Compare and Exchange, compare and exchange
instruction (CMPXCHG) compares the destination
operand with the accumulator
◼ Found only in 80486 - Core2 instruction sets
◼ If they are equal, the source operand is copied to the
destination; if not equal, the destination operand is copied into
the accumulator
Chapter 4 — Instruction Set — 22
Multiplication and Division
◼ 32-Bit Multiplication, in 80386 and above, 32-bit
multiplication is allowed because these microprocessors
contain 32-bit registers
◼ Can be signed or unsigned by using IMUL and MUL instructions
◼ Contents of EAX are multiplied by the operand specified
with the instruction
◼ The 64 bit product is found in EDX–EAX, where EAX
contains the least significant 32 bits of the product
◼ 64-Bit Multiplication, the result of a 64-bit multiplication
in the Pentium 4 appears in the RDX:RAX register pair
as a 128-bit product
Chapter 4 — Instruction Set — 23
Multiplication and Division
◼ Division, occurs on 8-, 16-, 32- and 64-bit numbers
depending on the microprocessor
◼ Signed IDIV or unsigned DIV integers
◼ There is no immediate division instruction available to
any microprocessor
◼ In 64-bit mode Pentium 4 & Core2, divide a 128-bit
number by a 64-bit number
Chapter 4 — Instruction Set — 24
Multiplication and Division
◼ 32-Bit Division, 80386 - Pentium 4 perform 32-bit
division on signed or unsigned numbers
◼ 64-bit contents of EDX–EAX are divided by the operand
specified by the instruction
◼ leaving a 32-bit quotient in EAX
◼ and a 32-bit remainder in EDX
◼ 64-Bit Division, Pentium 4 operated in 64-bit mode
performs 64-bit division on signed or unsigned numbers
◼ The 64-bit division uses the RDX:RAX register pair to
hold the dividend
◼ The quotient is found in RAX and the remainder is in
RDX after the division
Chapter 4 — Instruction Set — 25
Arithmetic Instructions
Chapter 4 — Instruction Set — 26
Arithmetic Instructions
Chapter 4 — Instruction Set — 27
Arithmetic Instructions
Chapter 4 — Instruction Set — 28
Arithmetic Instructions
Chapter 4 — Instruction Set — 29
Arithmetic Instructions
Chapter 4 — Instruction Set — 30
Arithmetic Instructions
Chapter 4 — Instruction Set — 31
Arithmetic Instructions
Chapter 4 — Instruction Set — 32
Arithmetic Instructions
Chapter 4 — Instruction Set — 33
Arithmetic Instructions
Chapter 4 — Instruction Set — 34
Arithmetic Instructions
Chapter 4 — Instruction Set — 35
Arithmetic Instructions
Chapter 4 — Instruction Set — 36
Arithmetic Instructions
Chapter 4 — Instruction Set — 37
Arithmetic Instructions
Chapter 4 — Instruction Set — 38
Arithmetic Instructions
Chapter 4 — Instruction Set — 39
Arithmetic Instructions
Chapter 4 — Instruction Set — 40
Logic Instructions
◼ Include AND, OR, Exclusive-OR, and NOT
◼ Also TEST, a special form of the AND instruction
◼ NEG, similar to the NOT instruction
◼ Logic operations provide binary bit control in low-level
software
◼ Allow bits to be set, cleared, or complemented
◼ Low-level software appears in machine language or
assembly language form and often controls the I/O
devices in a system
◼ All logic instructions affect the flag bits
◼ Logic operations always clear the carry and overflow flags
◼ Other flags change to reflect the result
Chapter 4 — Instruction Set — 41
Logic Instructions
Chapter 4 — Instruction Set — 42
Logic Instructions
Chapter 4 — Instruction Set — 43
Logic Instructions
Chapter 4 — Instruction Set — 44
Logic Instructions
Chapter 4 — Instruction Set — 45
Logic Instructions
Chapter 4 — Instruction Set — 46
Logic Instructions
Chapter 4 — Instruction Set — 47
Logic Instructions
Chapter 4 — Instruction Set — 48
Logic Instructions
Chapter 4 — Instruction Set — 49
Logic Instructions
Chapter 4 — Instruction Set — 50
Logic Instructions
Chapter 4 — Instruction Set — 51
Logic Instructions
Chapter 4 — Instruction Set — 52
Logic Instructions
Chapter 4 — Instruction Set — 53
Logic Instructions
Chapter 4 — Instruction Set — 54
Logic Instructions
Chapter 4 — Instruction Set — 55
Logic Instructions
Chapter 4 — Instruction Set — 56
Logic Instructions
Chapter 4 — Instruction Set — 57
Logic Instructions
Chapter 4 — Instruction Set — 58
Logic Instructions
Chapter 4 — Instruction Set — 59
Logic Instructions
Chapter 4 — Instruction Set — 60
Logic Instructions
Chapter 4 — Instruction Set — 61
Logic Instructions
Chapter 4 — Instruction Set — 62
Logic Instructions
Chapter 4 — Instruction Set — 63
Logic Instructions
Chapter 4 — Instruction Set — 64
String Manipulation Instructions
Chapter 4 — Instruction Set — 65
String Manipulation Instructions
Chapter 4 — Instruction Set — 66
String Manipulation Instructions
Chapter 4 — Instruction Set — 67
String Manipulation Instructions
Chapter 4 — Instruction Set — 68
String Manipulation Instructions
Chapter 4 — Instruction Set — 69
String Manipulation Instructions
Chapter 4 — Instruction Set — 70
String Manipulation Instructions
Chapter 4 — Instruction Set — 71
String Manipulation Instructions
Chapter 4 — Instruction Set — 72
String Manipulation Instructions
Chapter 4 — Instruction Set — 73
String Manipulation Instructions
Chapter 4 — Instruction Set — 74
String Manipulation Instructions
Chapter 4 — Instruction Set — 75
Processor Control Instructions
Chapter 4 — Instruction Set — 76
Control Transfer Instructions
Chapter 4 — Instruction Set — 77
Control Transfer Instructions
Chapter 4 — Instruction Set — 78
Control Transfer Instructions
Chapter 4 — Instruction Set — 79
Control Transfer Instructions
Chapter 4 — Instruction Set — 80
Control Transfer Instructions
Chapter 4 — Instruction Set — 81
Control Transfer Instructions
Chapter 4 — Instruction Set — 82
