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Instruction Set of 8086

The document outlines the instruction set of the 8086 microprocessor, categorizing it into eight types, including data transfer, arithmetic, and control instructions. It details specific instructions within each category, their uses, and various addressing modes. Additionally, it explains the concept of interrupts, including hardware and software interrupts, and their handling in the 8086 architecture.

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0% found this document useful (0 votes)
16 views10 pages

Instruction Set of 8086

The document outlines the instruction set of the 8086 microprocessor, categorizing it into eight types, including data transfer, arithmetic, and control instructions. It details specific instructions within each category, their uses, and various addressing modes. Additionally, it explains the concept of interrupts, including hardware and software interrupts, and their handling in the 8086 architecture.

Uploaded by

Rahul Rudra
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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Instruction set of 8086:

There are 8 types of instruction sets of 8086 Microprocessor. They are:

1. Data Copy / Transfer Instructions


2. Arithmetic and Logical Instructions
3. Branch Instructions
4. Loop Instructions
5. Machine Control Instructions
6. Flag Manipulation Instructions
7. Shift and Rotate Instructions
8. String Instructions

Data Transfer Instructions

S.No Instructio Use


. n

1 MOV Copies the byte/ word from the


source to the destination

2 PUSH Puts a word at the top of the stack

3 POP Gets a word from the top of the


stack

4 PUSHA Puts all the registers into the stack

5 POPA Get words from the stack to all


registers

6 XCHG Exchanges the data from two


locations

7 XLAT Translates a byte in AL using a


table in the memory
8 IN Reads a byte or word from the
port to the accumulator

9 OUT Sends a byte/word from the


accumulator to the port

10 LEA Loads the address into the


register

11 LDS Loads DS register and other


register from the memory

12 LES Loads ES register and other


register from the memory

13 LAHF Loads AH with the low byte of the


flag register

14 SAHF Stores AH register to low byte of


the flag register

15 PUSHF Copies the flag register at the


top of the stack

16 POPF Copies a word at the top of the


stack to the flag register

Arithmetic and Logical Instructions

S.No. Instructio Use


n

1 ADD Adds byte/word to word


2 ADC Adds with carry

2 INC Increments byte/word by 1

3 AAA Adjusts ASCII after addition

4 DAA Adjusts decimal after the


addition/subtraction

5 SUB Subtracts byte/word from


word

6 SBB Performs subtraction with


borrow

7 DEC Decrements byte/word by 1

8 NPG Negates each bit of


byte/word and add 1/2's
complement

9 CMP Compares 2 provided


byte/word

10 AAS Adjusts ASCII codes after


subtraction

11 DAS Adjusts decimal after


subtraction

12 MUL Multiplies unsigned byte by


byte/word by word
14 AAM Adjusts ASCII codes after
multiplication

15 DIV Divides unsigned words/bytes

16 IDIV Divides signed words/bytes

17 AAD Adjusts ASCII codes after


division

18 CBW Fills the upper byte of the


word with the copies of sign
bit of the lower byte

19 CWD Fills the upper word of the


double word with the sign
bit of the lower word

20 NOT Performs the logical NOT


operation

21 ABD Performs the logical AND


operation

22 OR Performs the logical OR


operation

23 XOR Performs the XOR operation

24 TEST Adds the operands to


update flags

25 SHL Adds the left-shift operation


26 SHR Adds the right-shift operation

Branch and Loop Instructions

S.No. Instruction Use

1 CALL Calls a procedure

2 RET Returns from the procedure

3 JMP Jump

Machine Control Instructions

S.No. Instruction Use

1 NOP No Operation

2 HLT Halt

3 DI Disable Interrupts

4 EI Enable Interrupts

5 SIM Set Interrupt Mask

6 RIM Reset Interrupt Mask

Flag Manipulation Instruction

S.No. Instruction Use


1 CLC Clears carry flag

2 CLD Clears direction flag

3 CLI Clears interrupt flag

4 CMC Complements of carry flag

5 STC Sets carry flag CF to 1

6 STD Sets direction flag 1

7 STI Sets interrupt flag 1

String Instructions

S.No. Instruction Use

1 REP, Repeats the given instructions


REPE/REPZ,
REPNE/REPNZ

2 MOVS, MOVSB, Moves the byte/word from a string


MOVSW to another

3 COMS, Compares two string byte/word


COMPSB,
COMPSW

4 INS, INSB, INSW Input string/byte/word from the


I/O port

5 OUTS, OUTSB, OUTSW Outputs string/byte/word


6 SCAS, SCASB, SCASW Outputs string/byte/word

7 LODS, LODSB, LODSW Stores the string byte into AL or


string word into AX

Addressing Mode of 8086:

he way of specifying data to be operated by an instruction is known as addressing modes. This


specifies that the given data is an immediate data or an address. It also specifies whether the
given operand is register or register pair.
Types of addressing modes:
1. Register mode – In this type of addressing mode both the operands are registers.
Example:
MOV AX, BX
XOR AX, DX
ADD AL, BL
2. Immediate mode – In this type of addressing mode the source operand is a 8 bit or 16 bit data.
Destination operand can never be immediate data.
Example:
MOV AX, 2000
MOV CL, 0A
ADD AL, 45
AND AX, 0000
Note that to initialize the value of segment register an register is required.
MOV AX, 2000
MOV CS, AX
3. Displacement or direct mode – In this type of addressing mode the effective address is
directly given in the instruction as displacement.
Example:
MOV AX, [DISP]
MOV AX, [0500]
4. Register indirect mode – In this addressing mode the effective address is in SI, DI or BX.
Example: Physical Address = Segment Address + Effective Address
MOV AX, [DI]
ADD AL, [BX]
MOV AX, [SI]
5. Based indexed mode – In this the effective address is sum of base register and index
register.
Base register: BX, BP
Index register: SI, DI
The physical memory address is calculated according to the base register.
Example:
MOV AL, [BP+SI]
MOV AX, [BX+DI]
6. Indexed mode – In this type of addressing mode the effective address is sum of index
register and displacement.
Example:
MOV AX, [SI+2000]
MOV AL, [DI+3000]
7. Based mode – In this the effective address is the sum of base register and displacement.
Example:
MOV AL, [BP+ 0100]
8. Based indexed displacement mode – In this type of addressing mode the effective address
is the sum of index register, base register and displacement.
Example:
MOV AL, [SI+BP+2000]
9. String mode – This addressing mode is related to string instructions. In this the value of SI
and DI are auto incremented and decremented depending upon the value of directional
flag.
Example:
MOVS B
MOVS W
10. Input/Output mode – This addressing mode is related with input output operations.
Example:
IN A, 45
OUT A, 50
11. Relative mode –
In this the effective address is calculated with reference to instruction pointer.
Example:
JNZ 8 bit address
IP=IP+8 bit address

Interrupt of 8086:

An interrupt is a condition that halts the microprocessor temporarily to work on a different task
and then returns to its previous task. An interrupt is an event or signal that requests the CPU’s
attention. This halt allows peripheral devices to access the microprocessor. Whenever an interrupt
occurs, the processor completes the current instruction and starts the implementation of an
Interrupt Service Routine (ISR) or Interrupt Handler. ISR is a program that tells the processor what
to do when the interrupt occurs. After the ISR execution, control returns to the main routine
where it was interrupted. In the 8086 microprocessor following tasks are performed when the
microprocessor encounters an interrupt:
1. The value of the flag register is pushed into the stack. It means that first, the value of SP (Stack
Pointer) is decremented by two then the value of the flag register is pushed to the memory
address of the stack segment.
2. The value of starting memory address of CS (Code Segment) is pushed into the stack.
3. The value of IP (Instruction Pointer) is pushed into the stack.
4. IP is loaded from word location (Interrupt type) * 04.
5. CS is loaded from the following word location.
6. Interrupt, and Trap flags are reset to 0.
The different types of interrupts present in the 8086 microprocessor are given by:
1. Hardware Interrupts – Hardware interrupts are those interrupts that are caused by any
peripheral device by sending a signal through a specified pin to the microprocessor. There are
two hardware interrupts in the 8086 microprocessor. They are:
 NMI (Non-Maskable Interrupt): It is a single pin non-maskable hardware interrupt that
cannot be disabled. It is the highest priority interrupt in the 8086 microprocessor. After its
execution, this interrupt generates a TYPE 2 interrupt. IP is loaded from word location
00008 H, and CS is loaded from the word location 0000A H.
 INTR (Interrupt Request): It provides a single interrupt request and is activated by the I/O
port. This interrupt can be masked or delayed. It is a level-triggered interrupt. It can receive
any interrupt type, so the value of IP and CS will change on the interrupt type received.
2. Software Interrupts – These are instructions inserted within the program to generate
interrupts. There are 256 software interrupts in the 8086 microprocessor. The instructions are
of the format INT type, where the type ranges from 00 to FF. The starting address ranges from
00000 H to 003FF H. These are 2-byte instructions. IP is loaded from type * 04 H, and CS is
loaded from the following address given by (type * 04) + 02 H. Some important software
interrupts are:
 TYPE 0 corresponds to division by zero(0).
 TYPE 1 is used for single-step execution for debugging the program.
 TYPE 2 represents NMI and is used in power failure conditions.
 TYPE 3 represents a break-point interrupt.
 TYPE 4 is the overflow interrupt.

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