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Save PLL Design Notes For Later Phase Locked Loop Circuits
ECE145B/ECE218B
Reading: General PLL Description: T. H. Lee, Chap. 15. Gray and Meyer, 10.4.
1. Definition. A PLL is a feedback system that includes a VCO, phase detector, and low
pass filter within its loop. Its purpose is to force the VCO to replicate and track the
frequency and phase at the input when in lock. This enables the PLL to be used as a
control system allowing one system to track with another.
out (t) = Vin (t) + const.
Wout (4) = in)
The PLL output can be taken from either V.., the filtered (almost DC) VCO control
voltage, or from the output of the VCO depending on the application. Either phase or
frequency can be used as the input variables.
Phase
detector
Of course, phase and frequency are interrelated by:
=
=F
:
O62) = 6(0)+ farrar’
a
2. Phase detector: compares the phase at each input and generates an error signal, ve(t),
proportional to the phase difference between the two inputs. Kp is the gain of the phase
detector (V/rad).
velt) = Kp[Oour() ~ On ()]
As one familiar circuit example, an analog multiplier or mixer can be used as a phase
detector. Recall that the mixer takes the product of two inputs. v(t) = A(QB(O. If,
AW) =A cos(at + 0,)
B(t) = B cos(ayt + >) Then, A(®B(t) = (AB/2)[ cos(2a,t + >, + 4) + c0s(0, + 4]
Since the two inputs are at the same frequency when the loop is locked, we have one
output at twice the input frequency and an output proportional to the cosine of the phase
difference. The doubled frequency component must be removed by the lowpass loop
filter. The phase difference then is ideally a DC signal, the control voltage to the VCO.
3. VCO. In PLL applications, the VCO is treated as a linear, time-invariant system.
Excess phase of the VCO is the system output.
0. IWeon dt"
Pout =
The VCO oscillates at an angular frequency, ©. Its frequency is set to a nominal «,
when the control voltage is zero. Frequency is assumed to be linearly proportional to the
control voltage with a gain coefficient K,, (rad/s/v).
®out = 9+ Ko Veont
PLL response: To see how the PLL works, suppose that we introduce a frequency step at
the input
in
This will cause the phase difference to grow with time since a frequency step is a phase
ramp. This in turn causes the control voltage, Vcont, to increase, moving the VCO
frequency up to catch up with the input reference signal. Bvehoot 2 ghase will octue if Wee =Htn
before dese -drn = Crstantk. The frogwuey
AL conbrnue Ho Ca erease unht pro phase sf Mov
cobs ug te Ae xnput.
Win=.@ | Qy+ Ao
y(t)
Wwose
PD
Output
LPF
Output > ---> = bose = bn
see
te t Fig.13_R
UPe intesedes PD cute
