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Introduction To Microprocessor

Chapter 1 introduces microprocessors, defining them as CPUs housed in a single silicon chip that perform basic instructions to drive computers. It discusses the evolution of computing from mechanical devices to early electronic computers and the development of programming languages. The chapter also covers the architecture of microprocessors, their tasks, and the organization of memory in relation to data processing.

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0% found this document useful (0 votes)
23 views69 pages

Introduction To Microprocessor

Chapter 1 introduces microprocessors, defining them as CPUs housed in a single silicon chip that perform basic instructions to drive computers. It discusses the evolution of computing from mechanical devices to early electronic computers and the development of programming languages. The chapter also covers the architecture of microprocessors, their tasks, and the organization of memory in relation to data processing.

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Ashraful Islam
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Chapter 1

Introduction to Microprocessors
by Barry B. Brey
[email protected]

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
• A processor is the logic circuitry that responds
to and processes the basic instructions that
drive a computer.
• The term processor has generally replaced the
term central processing unit (CPU)

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Microprocessor
• CPU housed in a single silicon chip called
microprocessor.
• Incorporate function of CPU in a single IC
• Set of circuit which connect the CPU with the
rest of the computer.
• Consists of CPU, I/O ckt and memory access
ckt

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Microprocessor
• MP is a programmable digital device.
• Designed with registers, flip-flop’s (FF)
& timing circuits.

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
How MP works
• MP has a set of instructions, designed
internally, to manipulate(using with excellence)
data & communicate with peripherals.(mouse,
keyboard, printer etc.)
• These instructions are given to MP by writing
into its memory.
• Writing (or entering) instructions & data is
done through an input device (keyboard).

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
How MP works
• MP reads or translates one instruction at a
time, matches it with its instruction set, &
performs data manipulation indicated by
instruction.
• Result stored in memory or sent to such output
devices as LED or a CRT (cathode ray tube)
terminal.

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
How MP works
• MP can respond to external signals.
• It can be interpreted, reset or asked to Wait to
synchronize with slower peripherals.

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Mechanical Computing
• The abacus circa 500 B.C. – the first calculator
• Blaise Pascal – the first modern mechanical
adder
• Charles Babbage – the first true computer
• Herman Hollerith – the punched card system
and founder of IBM

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Early electronic computers
• Konrad Zuse – Z3 (relay logic at 5.33 Hz)
– 1936-39, German used for aircraft and missile design during World
War II.
• Alan Turing – Colossus
– 1943, vacuum tube, British military for decoding German
codes in World War II.
• University of Pennsylvania – ENIAC, 1946
– The first general-purpose, programmable electronic
computer.
– 1946, 17000 vacuum tubes, 500 miles of wires, weight 30
tons.

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Early milestones
• 1948 – the transistor at Bell Labs
• 1958 – the integrated circuit
• 1961 – RTL digital logic
• 1971 – the microprocessor (4004)

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Early programming
• Countess of Lovelace (1823) wrote programs
for the Analytical Engine
• Machine Language then Assembly Language
• Grace Hopper (1957) develops FLOW-MATIC
• FORTRAN, ALGOL, and RPG
• COBOL

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Modern programming

• Visual BASIC (most common business)


• Visual C/C++ (most common technical)
• JAVA (most common web)
• ADA and PASCAL
• C# (gaining on web)

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Terms
• KIP – Kilo of Instructions per Second
• MIP – Millions of Instructions per Second
• Bit - a binary digit with a value of 1 or 0
• Nibble – 4-bit-wide binary number
• Byte – 8-bit-wide binary number
• Word (16 bits)
• Doubleword (32 bits) Quadword (64 bits)
• Octalword (128 bits)
• K – 1024, 1M – 1024K, 1G – 1024M

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Early Microprocessors
• 4004 the first microprocessor (4-bit) 4K RAM
• 8008 (8-bit)
• 8080 (8-bit) 64K RAM, 2Mhz clock
• 8086 (16-bit) 1M RAM, 5MHz clock
• 80286 (16-bit) 16M RAM, 16MHz clock

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
32-bit Microprocessors
• 80386, 4G RAM, 33 MHz clock
• 80486, 4G RAM, 66 MHz clock
• Pentium, 4G RAM, 66 MHz clock
• Pentium Pro, 64G RAM, 133 MHz clock
• Pentium II, 64G RAM, 233 MHz clock
• Pentium III, 64G RAM, 500 MHz clock
• Pentium 4, 64G RAM, 1.5 GHz clock

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
The P nomenclature
• P1 – 8086/8088 class
• P2 – 80286 class
• P3 – 80386 class
• P4 – 80486 class
• P5 – Pentium class
• P6 – Pentium Pro/Pentium II, Pentium III, and
Pentium 4 class

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Tasks

• μP performs 3 main tasks:


– Data transfer - μP and the memory or I/O
systems.
– Arithmetic and logic operations.
– Program flow via simple decisions

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Power of μP

• Capable of executing billions of millions of


• instructions per second from a program or
software
• stored in the memory system

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
μP-based PC
• μP-based PC Systems consists of
• Memory system
• I/O system
• μP

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Computer System Functions
• CPU (microprocessor) – performs
– arithmetic and logic operations (table 1-4)
– data transfers (to memory or i/o)
– program flow via simple decisions (table 1-5)
• Memory – stores program and data
• I/O – communicates to humans and machines
(figure 1-11)

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Von Neumann Model
• Roots of the modern PC go back to the 1940’s
• John Von Neumann proposed this design:
• – CPU
• – Input
• – Output
• – Working Memory
• – Permanent Memory

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Buses: A common group of wires that
interconnect components in a
computer system.

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Buses
• Address Bus – selects a location in the
memory or a specific I/O device
• Data Bus – transfers data between the
microprocessor and the memory or I/O
• Control Bus – selects I/O or memory and
causes a read or a write
• See Table 1-6 for Bus widths and memory sizes

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Control Bus
In most computer systems, there are four
control bus connections:
•MRDC (memory read control)
•MWTC (memory write control)
•IORC (I/O read control)
•IOWC (I/O write control).
•overbar indicates the control signal is active-low;
(active when logic zero appears on control line)

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Buses
• The microprocessor reads a memory location
by sending the memory an address through
the address bus.
• Next, it sends a memory read control signal to
cause the memory to read data.
• Data read from memory are passed to the
microprocessor through the data bus.
• Whenever a memory write, I/O write, or I/O
read occurs, the same sequence ensues.

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Intel μP Buses

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Reading from Memory
• Multiple machine cycles are required when reading from memory,
because it responds much more slowly than the CPU. The steps are:
– address placed on address bus
– Read Line (RD) set low
– CPU waits one cycle for memory to respond
– Read Line (RD) goes to 1, indicating that the data is on the data bus

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Memory Organization
• Memory is organized in byte-sized (wide) chunks of
data
• Memory is numbered in bytes
• Memory is number in hexadecimal addresses or
locations
• Modern memory is 64-bits wide containing 8 bytes
per memory physical location.
• Modern DRAM is SLOW! (40 ns per a random access)
• Buffering and double clock edge transfers can speed
memory access times to about 25 MHz

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Microprocessor Internals

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Memory Organization
• 8086/8088 – 8- or 16-bits in width
• 80286 – 16-bits in width
• 80386/80486 – 32-bits in width
• Pentium/Pentium 4 – 64-bits in width

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
8-bit Data

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
8-bit Data Formats
• In the assembler use:
DATA1 DB 10H
• In C++
char Data1 = 0x10;
or
unsigned char Data2 = 3;

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
16-bit Data

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
16-bit Data Formats
• In the assembler
Data3 DW 1000H
• In C++
short Data3 = 0x1000;
or
_int16 Data4 = 23;
or
unsigned short Data5 = 4;

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
32-bit Data

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
32-bit Data Formats
• In the assembler
DATA6 DD 10002345H
• In C++
int Data6 = 0x10002345;
or
unsigned int Data7 = 34566;
or
UINT Data8 = 344;

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Floating-point Data

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Floating-Point Formats
• In the assembler
DATAA DD 23.4
DATAB DQ -345.0
DATAR DQ 3.5E2
• In C++
float DataC = 23.4;
double DataD = -345;
double DataE = 3.5e2;

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Digits
• Before converting numbers between bases,
digits of a number system must be
understood.
• First digit in any numbering system is always
zero.
• A decimal (base 10) number is constructed
with 10 digits: 0 through 9.
• A base 8 (octal) number; 8 digits: 0 through 7.
• A base 2 (binary) number; 2 digits: 0 and 1.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Digits
• If the base exceeds 10, additional digits use
letters of the alphabet, beginning with an A.
– a base 12 number contains 10 digits: 0 through 9,
followed by A for 10 and B for 11
• Note that a base 10 number does contain a 10
– a base 8 number does not contain an 8
• Common systems used with computers are
decimal, binary, and hexadecimal (base 16).
– many years ago octal numbers were popular

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Number Systems

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Conversions
• Conversion to a number base requires learning
exactly what the weights of each position are worth.

• Once the weights are learned, conversion is a simple


task that can even be accomplished on a calculator.

• To convert a decimal integer to any radix divide by


the radix and keep the remainders as significant
digits in the result

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Conversions (continued)
• To convert a fraction to any radix multiply by
the radix and keep the whole number part of
each result

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Decimal to binary

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Decimal fraction to binary

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Binary to decimal

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Binary fraction to decimal

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Complements
• Twos complements are used to store negative
data in modern computers
• To twos complement a number invert all the
bits and then add 1 to the result

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Hexadecimal-coded Binary
• Binary numbers are often coded in groups of 4
bits to represent hexadecimal numbers.
• 0100 0001 1010 = 41A16
• 3C4516 = 0011 1100 0100 0101

Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.
Brey: The Intel Microprocessors, 7e © 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

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