FET&MOSFET

: 375:

Yoo - 20V (b) Calculate the voltage gain (Vo/Vi), of the

amplifier with no feedback (Rr = oo).
(c) Determine the value of the resistance Rr,
400 Kn 2Kn required to give a voltage gain (Vo/Vi),
G D + or - 10. (GATE - 87)
Von
lOOKQ
Ro = lOK.n
Rr
Vo
gm = 5 x 10-3 mhos

rd = lOOK.n

Eight Marks Questions

Rs = 2Kn
Large
7
Ror
(a) Specify the type of th
feedback in the JFETe negative
shown in Fig. amplifier

Hyderabad IDelhi IBhopal IPone IBbubuiawar IBmpuu l1--

 === === === ~
Chapter
OP- Amplifier I
05. The circuit shown in the figure is that of
One ,1ark Questions
Vin .,.._--,

0 l. Tot? frequenc~ compensation 1s used in

OP-Amps to mcrease its
(GATE -94)

02. In the giYen circuit if the voltage inputs V_

and \ ·- are to be Amplified by the same
..\mplification factor, the value of 'R'
should be (GATE-96)
(GATE -95) (a) a non-inverting Amplifiers
(b) an inverting Amplifier
22:K.n
(c) an oscillator
(d) a Schmitt trigger

06. An Amplifier A has 6 dB gain and 50 Q

input and output impedances. The noise
figure of this Amplifier as shown in the
figure is 3 dB. A cascade of two such
Amplifiers as in the figure will have a noise
figure of
03. An op-Amp is used as a zero-crossing (GATE-97)
detector. If maximum output available from
the Op-Amp is ±12 Vp-p and the slew rate of
the Op-Amp is 12 V/µ sec then the
maximum frequency of the input signal that son son
can be applied without causing a reduction
in the P-P output is
(GATE-95)

04. A change in the value of the Emitter

resistance (~) in a difference Amplifier.
(GATE-95) son son
(a) Affects the difference mode gain~
(b) Affects the common mode gain Ac.
(c) Affects both Ao and Ac (a) 6 dB
(d) Does not affect either Ao (or) Ac. (b) 8 dB
(c) 12 dB (d) none of the above
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.ti. .
,~-
I .,,J

1 one input
A:,CE . .

• · tennmal of high gain comparator

: 377:

(a) zero
OP-Amplifier

I . circuit 'dis I colnnect~d to ground and

a sinusob1 a vo tage is applied to the other (b) (V 1 - V2) sin wt
input. T e output of comparator will be (c)- (Vi + V 2) sinwt
(GATE-98) (d) (V 1+ V 2) sinwt
(a) a sinusoid_ .
(b) a full recti_fied s~nusoid 12. The ideal Op-ArnP has the following
(c) a half rectified sinusoid characteristics. (GATE - Ol)
(d) a square wave
(a) Ri = oo, A = oo, Re == 0
uS-
In a differential Amplifier CMRR
db . ,
b
can e (b) Ri = 0, A = oo, Re == 0
improve y usmg an increased (c) Ri = oo, A = oo, Re== oo
(GATE-98) (d) Ri = 0, A= oo, Re == oo
(a) Emitter resistance
(b) Collector resistance
13. If the differential voltage gain and the
(c) Power supply voltage
common mode voltage gain of a differential
(d) Source resistance
Amplifier are 48 dB and 2 dB respectively,
then it's common mode Rejection Ratio is
,• The first dominant pole encountered in the
19 (GATE-03)
frequency response of a compensated op-
amp is approximately at (GATE _ 99) (a) 23 dB (b) 25 dB
(c) 46 dB (d) 50 dB
(a)5Hz (b) l0KHz
(c) 1 MHz (d) 100 MHz
14. An ideal Op-Amp is an ideal
IO. In the circuit of the figure VO is (GATE-04)
+ 15 V (a) voltage controlled current source
(b) voltage controlled voltage source
(c) current controlled current source
+ IV
(d) current controlled voltage source

15. The circuit in the figure is a

R (GATE-2000)
(a)-1V (b)2 V
(d) +15 V Y out
(c) +l V

11. If the Op-Amp in the figure, is ideal, then

Vo is (GATE - 2000)
C
(GATE-04)
(a) low-pass filter
V, sin rot C
0-------, (b) high-pass filter
V2sinro~ (c) band-pass filter
(d) band-reject filter
C

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 Ana l~c~ "
~
Vo
~
10
16. The input resistance R, of the amplifier (a)
sho\\'Il in the figure 1s
(GATE - OS) Y1
30Kn -10

Vo

r
I

(b)
R. ---- 5
v,
(a) 30 4 KO (b) 10 Kn -10 -5 0
(c) 40 KO (d) infinite

17. Assuming the OP-AMP to be ideal, the

voltage gain of the amplifier shown below
is
(c)

i 0+5
)y I

19. Toe circuit below implements a filter

between the input curren t ii and the output
voltage v0 • Assum e that the op-amp is ideal.
18. Toe transfer characteristic for the precision The filter implemented is a
rectifier circuit shown below is (assume L1 (GATE-11)
ideal OP-A MP and practical diodes)
(GATE- to)

Vo
{a) low pass filter (b) band pass filter
(c) band stop filter ( d) high pass filter

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 OP-Amplifier
: ~7!):

In the circuit shown. . below' wh·at .. 1s the (<1) A i;m increases. . ratio increases.
,0• output vo Itagc (V,,u1) 1f a silicon trans· 1 ( eiect1on
and an ideal op amp arc used? is or > (b J common-mode r J

(c) Ai increases. , ion ratio decreases.

(CATE - 13) (d) common-mode reject
+ IS V ()
21. The circuit shown represeGntAsTE_ l4)(Set4)
o + 12 V (

v,,ut
<2
v,--ji..----1
..... l

2V

(a)-!5V (b)-0.7 V
(c)+0.7V (d) + 15 V
(a) a band pass filter
~I- In the low - pass filter shown in the figure (b) a voltage controlled oscillator
for a cut - off frequency of 5 kHz, the valu; (c) an amplitude modulator
ofR2 (in kn) is _ __ (d) a monostable multivibrator
(GATE - 14)(Setl)
24. In the circuit shown, Vo = VOA for switch
C
SW in position A and Vo=Voa for SW in
position B. Assume that the opamp is ideal.
lOnF
!ill The value of Voa is _ _ _ _ __
V OA
V, IKfl

5V

12. In the differential amplifier shown in the

figure, the magnitudes of the common-
mode and differential-mode gains are ~
IKfl
and Ai,, respectively. If the resistance RE is IV
increased, then
- - V e e (GATE-14)(Set2) (GATE - lS)(Set 2)

Re 25. In the bistable circuit shown, the ideal

o opamp has saturation levels of ± 5V. The
value of R 1(in kn) that gives a hysteresis
width of 500 mV is - - - -
V, R2=20kn

R,

(GATE - lS)(Set 2)
~ VEE
II •• ti' '-IO...'.'i:; •v-. 'nn.-W:aapalyfl.aAaral
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 : 38 0: Analogcit .
ln the cir cui t sho wn usi ng an
10v
~
ideal opa mp ,
the- 3-d B cut -of f fre que ncy (in 10v
Hz ) is __ __.

"-~~ 8k 0
----ovo

O.l µF T.
~/n 2k0
IO ~

(G AT F - 15)(Set 3)
27 . Co11s cter the con sta nt ~UlT~n VJ
t sou rce sho wn
in the figure bel o,, . L~t p
rep res ent the
cur ren t ga m of the tra nsi sto r 4v
2v ·- ·- - ·- ·
\ n-

The number of tim es the LE D

glows is _
(Gate-16)(Set-1)

29. for the op era tio nal am pli fie r circ

uit shown,
the output sat ura tio n vo lta ges
are ± lSV.
Th e upper and low er threshold
Th e loa d cur ren t Io through RL voltages for
is the circuit are, res pec tiv ely .
(G ate -16 )(S et- l)
,,.fl . . . 1" vref
(a )h = -f 3- ;R >-- --- ,-- oVout

(b) Io= (_LI Vref

J3+ 1) R
( P.+l)Vref
( C) Io = I _P
f3- 2R
( f3 V,tt
(d) l-O =lf 3+ 1 2R
J
Th e following signal V1 of pea (Gate-17) (Set 1)
28. k voltage 8V
is ap pli ed to the non-inve~ing
terminal of
an ide al Opamp. Th e transisto (a) +5 V and - SV (b) +7 V and -3V
r has Vee =
0.7 V, f3 = 100; VLJm = 1.5V, (c) +3V and - 7V (d) +3 V and -3V
Vee = IOV
and - Vee =- IOV.
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i IV\iayawada jVm g I Tuupali I ~
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 0 p.A.mplifier
: 381 :

-- ~l VI
, larks Questions
1\, o 1 (a)fo rV1> 0 • V 0 R1

(b) For V, > 0, Vo== O.

In fig. if the CMRR of the opcrntionul Ri ,
- - ~V
f• V , < 0 , V o -
(c) ·or
8111p1tficr I'- 60dB. then
the magnitude nl the
output , l,ltag r i s
(d)Fo rV,< 0, Yo- 0.
very poor open .
0L The Op-A mp of fig h as a .
. o f 45 but is other wise
.
loor volta ge gain 1
i<lc,1I. The gain of the Amplifier eqTuaE ~- )
90 (GA
8k!l

'>--.., ._---<> Yout

Th: OP- \~ 1P sho,, n in Fig. below is ideal. (a) 5 (b) 20

(d) 4.5
R _ , - C . The phase angle between y 0 (c) 4
:?{I \ • JI O) = 1, ✓LC is
05. The CMRR of the differential Amplifier of
(GA TE-8 8) the fig is equal to
(GATE -90)
90 kn

V 10---'V VI/V'' ---.J..- --l

V 2 <>--.. .J\fl~/ \1'~~- --<

lOOkn
:i) -: 2 (b) n
c) 3-: 2 (d) 2n
(a) 1000 (b) 0
(c) 900 (d) 1800
, Refer to Fig.
(GA TE-8 9)
...,..... + 06. If the input to the circuit of figure is a sine
\ 111111,._ __ _

Vo
wave the outpu t will be.
(GA TE- 90)
1 V
i/p o--- --;

>--- - o/p

(a) A half-wave rectified sine wave.

(b) A full-wave rectified sine wave.
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 Analog c
: 382:
the - ~ of
ideal Op-Am p circuit
(c) A triangul ar ""a\"e.
10. ror . theoutp utvolta geV0 fig.
Determi ne
(d) A square wa, e. (GA'ft ·93)
07. An Op-Am p has an offset ,oltagc of tmY
and is ideal 111 all othet respects. lf this OP-
Amp ts used in the circuit shown in lig. The
0 'P , oltage \\ ill be (Select the nearest
, alue).
Vo
(GATE -92) 4Y
n.n

The output voltage Vo of the circuit sho\lin

11. in the figure is (GATE - 97)
10 Kn

(a) 1 mV (b) l V
(c) :t 2 mV (d) 0 V
V
08. The circuit of fig. uses an ideal OP-Am p for
small positive values of Vin, the circuit
works as
(GATE -92)

R
(a)-4 V (b) 6 V
.,,,__,___. V out (d) - 5.5 V
(c) 5 V

12. If the Op-Am p in the figure has an input

(a) a half wave rectifie r offset voltage of 5 m V and an open-loop
(b) a differen tiator voltage gain of 10, 000, then VO will be
(c) a logarith mic amplifi er (GATE-2000}
( d) an expone ntial Amplif ier +15 V

09. Assum e that the operational amplifier in

figure is ideal the current I through the lK
ohm resistor is (GATE - 92)
2k!2 - 15 V

2 mA
-
I kn
(a) 0 V
(b) 5 mV
2 kn (c) + 15 V (or)-15 V
(d) + 50 V (or) - 50V

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 Thc I ny I:'rt°mg 0 P·Anl -J : H8B ••
Q ().... p S lO\\ 1 • OP-Amplifier
has on '-Ten loop gnin • l Ill the 11 011
\ o1 loo ' 11IC clo 'c, 1' 1'
1(~1p ga1 n t ts oscd If the input to the ideul comparator shown
\ (G \T•·· 111the figure is sinusoidal signal of 8 V
Ri ' · c. - OJ)
(Pcnk to Peuk) with out any DC component,
then the output of the comparator has a duty

-R1 11'.0

\ '
\\\\

,,,
cycle of

Input
·----1
(GATE-OJ)

i + ~

\'.,

I v,.,.. 2v
Output

(s) ·S
(b) - 9 (a) l/2
(c) IO (b) l/3
(d) 1l (c) 1/6 (d) 1/ 12
In the figure assume the O A
p- mps to be
"d -1 The output Vo of the circuit 17. The output voltage of the Regulated power
J ea.i. is
supply shown in the figure is
10 mH (GATE-Ot)
(GATE -OJ)
10 µF

\\
ooos (lOO t) l5VDC
i
"F
Vo Unregulated
Power source
(a) 10 cos (100 t)
I
l Regulated
DC Output
(b) 10 f cos (I0O t) dt
0
I
4
(c) 10 Icos (100 t) dt (a) 3 V (b) 6 V
0 (c) 9 V (d) 12 V
4 d
(d) 10 - cos(I00t)
dt
18. If the Op-Amp in the figure is ideal, the
output voltage V0u1 will be equal to
.5. An Amplifier using an Op-Amp with a (GATE-OJ)
Slew-Rate SR = 1 V/µsec, has a gain of
5Kn
40 dB. If this Amplifier has to faith fully
amplify sinusoidal signals from de to
20 KHz. Without introducing any Slew 2V-·VW11,.._._--1
Rate induced distortion, then the input 3v---•V\/1/V~--,l You,
signal level must not exceed.
(GATE-01)
(a) 795 mV
(b) 395 mV (a) 1 V (b) 6 V
(c) 79.5 mV (c) 14 V (d) 17 V
(d) 39.5 mV
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 Analogcir .
: 384:
. . ~
. current or thehmvertm g input
19 · In the op-amp circuit given in the figure, the
load current iL is
(a) B1as . .
Bias current or t e mvert1ng and
Ont"
on.
t
(b) inverting inputs only.
R (GATE -04) ) In ut offset current only
((cd) B~th the bias currents and the i
nput
offset current.

2 Tb OP-Amp typ cLrcmt shown in the ft~ .

2 . e e ts
of filter and Its cut•ofi
a filter. The e .
frequenc) are respectn el) (GATE. OS)

20. In an ideal differential amplifier shown in

the figure, a large value of (RE).
(GATE - 05) (a) high pass, I 000 mu sec.
Vll (b) low pass, IO00 md/scc.
(c) high pas:., 10 rnlllscc.
(d) low pass, IO rndfscc.

Vi
23. Given the ideal operational it11tplilicr circui1
sho\\fl in the figure, indicate the corrccl
Vn trnnsfcr characteristics assuming ideal
diodes ..., ith zero cut-in vult11gc.
(a) increases both the differential and +IOV (GATE-OS)
common-mode gain.
V,,..- - - i
(b) increases the common-mode gain only.
(c) decreases the differential-mode gam
only.
(d) decreases the common-mode gain only.

21. The voltage eo indicated in the figure bas 2~.5K n

been measured by an ideal voltmeter.
Which of the following can be calculated?
IMO (GAT E-0~
(a) + ov

-lOV
-d
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1....._ ,,......_
-1"- -!a. -. v-.._. v.... ..... .....~
.
 OP-AmP~
: 385:
· h n in the figure,
25. ro, the Op-Amp circuits ow
V 11 IS (GATE-07)

2K.0

IQ\,

- 5\ ' +5V
v,

- IOV
(a) 2V
'I' Vo
ld) +!OV (b)-1 V
"' ';
(c)-0.5 V
-5V +5V,,
(d) 0.5 V
, '
,,,,
-5V

26. In the Op-Amp circuit shown, assume that

For the circuit shown in the following the diode current follows the equation I = ls
figure, the capacitor C is initially exp (VNr). For Vi= 2V, V0 = Vo,, and for
uncharged. At t = 0, the switch S is closed. Vi = 4 V, V0 = V02 . The relationship
The voltage Vc across the capacitor at t = 1 between V01 and V02 is
(GATE-07)
millisecond is
(GATE-06)
S ~lµF

-Ve+
Y out

(a) Vo2 = ✓2 Vo1

In the figure shown above, the OP -AMP is
2
supplied with± 15V. (b) Vo2 = e Vo1
(a) 0 Volt
(c) Vo2= Vo1 In 2
(b) 6.3 Volts
(c) 9.45 Volts (d) Vo1 - Vo2 = Vr In 2
(d) 10 Volts
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- \ . ACE
~•~~ ===~ ~-== ===- ===~ ~~~
_ ~ :386 : ~

10_ The Op-Amp circuit shown ~

Iii, l.liiliei rcprescntsa •i,,,,,
~..u,a211 <G-'t•
C'~,nsidcr th1.' OP \ C ~ '08)
"., mp c1rcuu shown m the figure.
- Th, tr ,
I.: ,\nstcr fonctton V~,(s). V,(s) is

R, (GATE-07)
1\/-.N.t-
\ R

--c,,.,vy~
(a) high pass filter
(b) low pass filter
(a) .!_:- sR_S_ (c) band pass filter
(b) l +sRC
l+sRC (d) band reject filter
1-sRC
lC)--!_
1-sRC (d) l+;RC 31. Consider the Schmitt trigger circuit sho
below. \\'Ji
2
8. If V1 == V1 sin(cot+~), then the minimum and (GAl].08)
maximum values of ~ (in radians) are
respectively (GATE - 07) +15 V
(a) - rc/2 and rc/2 (b) Oand rc/2
(c) -rr and O (d)-rc/2 and 0
29. Consider the following circuit using an
ideal Op-Amp. The 1-V characteristics of
the diode is described by the relation
10 K.Q
I= 1.( e:, -1). where Yr = 25mV, L, =I

IOK.n
µA and V is the voltage across the diode
(taken as positive for forward bias). For an - 15V
input voltage V, = -1 V, the output voltage
V0 is
A triangular wave which goes fonn-12V to
(GATE-08) 12V is applied to the inverting input of the
D 41<.n
OP-AMP. Assume that the output of the
JOO Kn
OP-AMP swings from +15 V to-15V. The
voltage at the non-inverting input switches
V, =- 1 V between.
v..,
(a) - 12V and+ 12V
(b)-7.5 and +7.5 V
(a) OV (b) 0.1 V (c) -5 V and +5 V
(c) 0.7 V (d) 1.1 V (d) 0 Vand 5 V
\< I I 11 1'111,1,, '""",
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-~~~ OP-Amplifier
:r~~-~::::~= ========
:, rh~ circrnt sho,vn a a;..=~38~7~=============~~~~~
1s
1;, circuit shown in the
34. In the voltage regulat~r 'd The BJT has
r: h
1 tgure, t e op - a
mp 1s 1 ea1.
d the Zener
C Vn1 O•7 V an d I-'A == 100, Iant d output of
voltage is 4.7 V. For a re_gu a e
+-i
Input
t---'VV\/\,~

Output
9 V, the value of R (in n;~~ TE_ 14).( Setl)
-
l ~
-5V
I
~
V, 12V

1 kn
(GATE-12)
(a) Jow pass filter with
1
f,dB == (
- R, + RJ
)c rad/s R

(b)high pass filter with

l
6dB == - - rad/s 35. In the circuit shown, the op-amp has finite
R1C
/ input impedance, infinite voltage gain and
(c) low pass filter with zero input offset voltage. The output voltage
l Yout is (GATE -14)(Setl)
fJdB == -rad/s R2
R 1C
(d)high pass filter with
1
f•dB == rad/s Y out
~ (R 1 +R 2 )c

;i In the circuit shown below the op-amps are

(a)-h(R1 + R2) (b) hR2
ideal. Then Yout in Volts is
(c) l1R2 (d)-l1(R1 + R2)
(GATE-13)
I ill 1 ill 36. Assuming that the Op-amp in the circuit
shown is ideal, VO is given by
+15 V (GATE - 14)(Set3)

R 3R

-15 V
R
I ill 1 ill
+IV

(a) 4 (b) 6
(c) 8 (d) lO
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 Analog,,.
~-~
'-'lt1~ ,
·•lit~
w
ACE " • • : 388:
" :~ •• l'\1bliatior~ Jtage regulator circuit sho
39 For the " 0 (V ) is 20V ± 20o/c0 wn, th
(c) - 'V +
~
2 I '.?
.\
· . t voltage
inpu d output voltage (Vout) is I lht~
'" and
regulate the opamp to be ideal. For a lo O 'v.
A,ssu~e 200 mA, the maximurn ad ~L
(d) - 3\'1 + .!.!_ V
2
2 dra~tn~ in Qi (in Watts) is Powe
diss1paUOil (GA~
3 7• In the circuit ~ho\\ n. assume that the opntnP lS)(Set 2
is ideal. The bridge output , oltngc \ o ( in
mV) for 8 = 0.05 is
(GATE - 15) (Set-I)
100n
"-
.., "O(, "\') _..:tf-~---'VN,
.~~►-' -~'(1\1~'\)l.1
~,- I\
250(1-S)O - ~50( l-+t\)
\()00 R2=10k n
son

The circwt shown in the figure has an Assuming that the op-amp in the circui
ide.al op:imp. Tue oscillation frequency
40
· shown below is ideal, the output voltage y
0
and the condition to sustain the (in volts) 2ld1
oscillanons. respectively, are
(GATE - 15)(Set 1)

Vo

R.::
lV
Yout

2R (GATE -15)(Set2

2CUR 41. In the circuit shown, assume that the opamp

is ideal. If the gain (VJVin) is -12, the value
of R (in kn) is _ _.
1
(a) -and R1 = R2
CR
1
(bJ -andR 1 = 4R 2 R
CR
1
(cJ -and R 1 = R 2 , '>------ oVo
2CR
l
(d) -and R 1 = 4R 2
2CR
(GATE - 15)(SetJ)

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 If" A1J ideal opamp has voltage s
y5, •••. , V_N I connected lo the
1 o r>-
!,·
. ou rec V V
1, 3
. .
44. In the opamp circUit the output voltage
shown, the Zener
• .,erting rnput and y y 4, V non- 0
10 ., . 2, diodes Z I and Z2 clamt The switch S is
000 ected to the inverting inp t ." · · · VN Vo to +5 V or .- 5 . d t time t 0
c b I (
the figure cow +Vee == 15
u as show .
I nm initially closed and ts opene a
5 volt). The voltage y y voyt, V cc -
... 1 i, 2, 3 V V
v6 .... arc I_, - 1/2, 1/3,- 1/4, 115 , ' 11 s,
volt respectively. As N approach . ' · · ...
t S +lOV:i
• I • cs infinity
the output vo tage (in volt) is ____ , IOOµF
10kf2 l 0

IO kn
- lOV Zl

..,----.._yOUl - lOV 4kn Z2

lkn l kn
V1 -'IJ\J\1\,-....---'
)kn
V3 ~'/Vlr--t--...J\/1.M,..._
:• ov ov
lkn
V:u lkn
The time t = t 1 (in seconds) at which Vo
changes state is _ _ __
(Gate-16)(Set-1)
(Gate-16)(Set-2)
f i~CP"°"
.j.JA p-i-n photo diode o~ responsivity 0.8NW
is connected to the inverting input of an 45. An opamp has a finite open loop voltage
ideal opamp as shown in the figure, JI gain of 100. Its input offset voltage
-Vee= 15V, -Vee = - 15V,Load resistor Vios ( = +SmV) is modeled as shown in the
Rt = IO kn. If 1Oµ W of power is incident circuit below. The amplifier is ideal in all
on the photodiode, then the value of the other respects. Vinput is 25 mV.
pbotocurrent (in µA) through the load is lk.O 15 kn

(Gate-16)(Set-1)

IMO

JOkn
The output voltage (in millivolts) 1s

( Gate-16)(Set-2)

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Th-, . . . -~,r•·t- · '-'tl•J1

. . .,.._~,..."" :"It,,• te-:- 12"1rcu1t shown in the figure is

• '" -
in
-.- ... • ... •<='u
._..,.c'e~~ .. (\ I
using compensated
a
... ~ ·-•· r1.... amplifier (op-amp), and
· - ~ ~ ?pen-loop voltage gain, Ao = 20lill
_ ' and an open-loop cut-off
~uenc~~ (. = 8 Hz. The voltage gain of
ilie runpht.ler at 15 kHz in VN, is
---
R2= 79k.O

(Gate-17) (Set 1) The output voltage Vout (in volts) is_

(Gate-17) (Setll

48. In the ioltage reference circuit shown in the

o figure, lhe op-amp is ideal and the
transistors 0 1. Qz .. .. , On arc identical in all
respectS and have infinitely large values of Five Marks Questions
common - emitter current gain (f3). The
co1lector current (J, ) of the tranc;istors is
01. . . f' jti
related to their base emitter voltugc: (Vw) by ~ons~der the circuit sho~ m ig.lifilt
the relation Jc. Is exp (Vm/ V•,). where I, is c1rcu1t uses an ideal operational iun~es ~
the saturation current. Assume that the Assuming that the impedances 8_1 n bnJi1
voltage Vp 5hown m the figu1e is O 7V and nnd B do not load the preceedmg ·
the thermal voltage V1- 26mV circuit, calculate the output vol~~;~E-9)1

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,,................
, .,, ACE

(a) when Ra = ~ = R: = ~ = 100 ohms.

: 391 :
OP-Amplifier

Shown that the system in Fig. is athadoubthle

04.
(b)wben Ra = ~ = R: = 100 ohms d . th
mtegrator In o er wo '
rds prove t e
&i = 120 ohms. an . Vo(s) - I
2
~ IOV transfer gain is given by V,(s) - (CRs) '

assume ideal OP-AMP

(GATE-9 5)

C find the output voltage, VO in the following

circuit assuming that the Op-Amps are
ideal.
(GATE - 93) 05. Consider the circuit given in fig. using an
ideal operational Amplifier.
(GATE-9 7)

2Kfl
R

IV
2V

The characteristics of the diode are given by

t3. Find the output voltage of the following
circuit assuming ideal op-amp behavior.
the relation I = 1{e ~~ - I l
(GATE-9 4) Where V is the forward voltage across the
diode
2Kfl 4KO 8Kfl
(a) Express Vo as a function of V I assuming
V,>0.

(b) If R = l00Kn, Is = 1µA and

KT= 25mV
7Iffi q
]Kn Find the input Vi for which VO= 0.

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 : 892:
£ight Marks Quc~firm,
06 A umc that the OP-AMP m the figure,
ideal AmP in the fig below ;8 .<lea
(GA ff · OI) 0 I. The Op- t when V, = (] - exp(1 ..

R A
+ Assume
. to be unch• ''tJ
the outputhe capacitor
d -:tr~
. ut is applied an ''- = IICP.
\

l
0--J,/,M-

•1v
B
the mp · J
the unit step function .
[
((,.ifJ f••

a Obt m n cxprc s1on for \ m tcnns of

\ ~ nd the re, crsc sacumuon current
I of the tran t'-tor
Cb It R 1n. I 1pA and the rhem1al
\'Oltage \ l5m\. then \\hnt is the
value of the output ,oltage Vo for an
mput Yoltage \ 1\ ?
(c) Suppo,e that the trnn,istor in the
fe-ecfoacl.: path 1, replaced by a p-n
jUn.:-tlon diode \\1th a re,·erse saturation
!1L.'"Tetlt of 11 • The p-side of the diode is
connected to node A and the n-side to
node B. Then what is the expression for
\' m terms \15 • Rand I,?

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 Oscillators
c~apter

One Marks Questions

Two Marks Questions

consider the oscillator circuit shown in th (GATE-94)

01. Match the following.
figure. The function of the network (show e
10 dotted lines) consisting of the 100 ~
Group - I
(A) Hartley
resistor in series with the two diodes (B) Wein-bridge
connected back-to-back is to: (C) Crystal
Group - II
( 1) low frequency oscillator
(2) High frequency oscillator
(3) Stable frequency oscillator
(4) Relaxation oscillator
(5) Negative Resistance oscillator

02. Value of R in the oscillator shown in the

given figure. So chosen that it just oscillates
lOkn at an angular frequencies of 'ro'. The value
of 'ro' and the required value of R will
respectively be (GATE - 96)
IOOKO
(Gate-16)(Set-1)

(a) introduce amplitude stabilization by

preventing the op-amp from saturating
and thus producing sinusoidal R
oscillations of fixed amplitude
(b) introduce amplitude stabilization by
forcing the op-amp to swing between
O.OlµF IOmH !KO
positive and negative saturation and thus
producing square wave oscillations of
fixed amplitude
(c} introduce frequency stabilization by
forcing the circuit to oscillate at a single (a) 105 rad/ sec, 2 X 104 Q
frequency 4
(b) 2 X 10 rad/ Sec, 2 X 104 Q
(c) 2 x 10 rad/ sec, 105 n
4
(d) enable the loop gain to take on a value
that produces square wave oscillations (d) 10 rad/ sec, 105 n
5

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 : 8!H:

O'.\ The Osc1llntor ctrcun shov,11 m the figure is

(GA1 E • Ol)

L• t()Jlf
r--__.-..r,;n:n~-"'° Vo

C lpf+-

(a) "i.rc✓6RC
I
(c) /6RC

(a) Han C) Osallator ,,1th ~ lllll

= ""O 6 MH~ Ob.

The value of 'C' required for a
f fr sinllso
(b) Ooq,ttts Osctllator ,nth (--... ti1' oscillat1ons o e~uency J I(Jf7: ~
~0.3 MHz circuH of the figure 1s \
(c) HanJcy Oscillator,, uh r~ tall..-.r lk!l l.lk.Q (GAJt>
a 1)9 .. MHz
'-·~
(d) Oo}p:tts Q-.nlbtnr ,,,th fosc11btor
e 1:l9 2MHz

04 The a:rou t m lhe figure employs positive

IFccdb3d: and b intended to generate
:JSOidal osollation. If at a frequency fo,
IB{ij = A\ (f) = .!.Lo0 then to sustain lkn
,.(f) 6
osciibnio:i al this frequency. (GA TE - 02) 1
(a) -µF (b)21tµF
21t
1
(c) 21t ✓6µF (d) 21t ✓6 µF

+
Five Marks Questions
Vo(f)
Find the value of R 1 in the circuit of fig. Fil
-l 01.
generating sinusoidal Oscillations. Fmd ~
frequency of oscillations.
1
(a) IR. =:S JR r---.J\~-,
R (GATE·'8l
R
(c}R.I,!< S

OS. The Oscillator c1rcv1t ,hown 111 the figure

has an 11deal mvertrng Amplifier. Its
frequency ofOscdlat1on (in Hz) 1s
(<,A1 E - 03)
H~Dd»~ I~
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 Feedback Amplifier
One Mark Questions -
-
' t +
v,n V1 Ao Y oul
.,..
~,. Negative feed back in Amplifiers. 0-- r-
-

. t1 . (GATE_ 93)
l proves 1e signal to noise ratio at the
(a) ~m
p.
l
(b) improves the signal to noise t·
0 Ip.
ra 10 at the Vr
-
kvou1 + k
-+
-
-
(c) does not effect the signal to noise . t'
ta 10 at
/
the op.
(d) Reduces distortion (a) The input impedance increases and
output impedance decreases.
02. To obtain very high input and output (b) The input impedance increases and
impedances in a feedback Amplifier, the
mostly used is output impedance also increases.
(GATE- 95)
(c) The input impedance decreases and
(a) Voltage - series
output impedance also decreases.
(b) Current - series
(c) Voltage - shunt (d) The input impedance decrease and
(d) Current - shunt output impedance increases.

03. In a shunt-shunt negative feedback 05. A good current buffer has

Amplifier, as compared to the basic I
Amplifier, (GATE - 14)(Setl)
(GATE - 98) (a) low input impedance and low output
impedance.
(a) both input and output impedance
decreases. (b) low input impedance and high output
(b) input impedance decreases but output impedance.
impedance increases. (c) high input impedance and low output
(c) input impedance increases but output impedance.
impedance decreases.
(d) both input and output impedance (d) high input impedance and high output
impedance.
mcreases.

04. In a voltage-voltage feedback as shown 06. In the ac equivalent circuit shown in the
below, which one of the f~llowin_g o figure, if iin is the input current and RF is
statements is TRUE, if the gam k is very large, the type of feedback is
increased? (GATE - 14)(Setl)
(GATE-13)
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 : 396: Analogc·
It~
h
(c) low input resistance and lgh 0
~
u~ 0
resistance. .
(d) low input resistanc e and low
0
resistance. u~

amplifier sh
09 _ A good trans-con ductance 0
have uld
(GATE- 17) (
(a) high input resistanc e and low ou% Set IJ
resistance
Small signal RF (b) low input resistanc e and high outpllt
mput ~ im t .
resistanc e
..... (c) high input and output resistance s
(d) low input and output resistances
(a) voltage - voltage feedback
(b) voltage - current feedback
(c) current - voltage feedback
(d) current - current feedback
Two Marks Questio ns]
07. ~e _feedback topology in the amplifier
crrcmt (the base bias circuit is not shown for
simplicit y) in the figure is 0 1. The feedback amplifier shown in Fig. has:
(GATE - 14)(Set2) (GATE- 89)
Yee Yee

Vo
\

(a) voltage shunt feedback .

(b) current series feedback.
(a) current - series feedback with large
(c) current shunt feedback.
input impedan ce and large output
(d) voltage series feedback.
impedan ce.

08. The desirable characteristics of a trans- (b) ~oltage - series feedback with larg~
conducta nce amplifier are mput impedan ce and low outpu
(GATE - 14)(Set3) impedan ce.
(a) high input resistanc e and high output (c) voltage - shunt feedback with low input
resistanc e. impedan ce and low output impedance.
(b) high input resistanc e and low output (d) current - shunt feedback with tow uiput
resistanc e. impedan ce and output impedance.
~
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 ..., ACE Feedback Amplifier

,
'.~
...•
~~Puhlicaticu
f\\O non-imcrting amplifiers, one hanng 8

: 397:
07. In a negative feedback amplifier using
' nit)• gain and the other luwing a gain Voltage - Series (i.e., voltage-sampling ,
u d .
of twenty, are ma l' usmg identical series mixing) fcedhack.
(GATE-02)
1Jp.:-rati0nal am~hfier~. As compared to the
unity gain amplifier, the amplifier with gain (a) R, decreases and Ro decrea:,\,:,
l\\cntyha~ (GATE - 91) (b) R, decreases and Ro increases
(c) R; increases and Ro decreases
(a) less negatiw feedback
{d) R, increases and Ro increases
(b) grc.ater mput impedance
(R; and R11 denote the input and output
c) tes~ bandwidth
resistances re5pec:lively)
d) none of the aboYe
08. An Amplifier without Feedback has a
~egative fo:-d haC\... in voltage gain of 50, input Resistance of I k.O
Volmgc ,c .c-~ configur3tion and output Resistance of 2.5 ill, The input
2. Cum. • 5hU'h configur3t1on Resistance of the current-shunt negative
. . . (GATE- 97) feedback amplifier using the above
al mcre;:ises ~"'"'Ul impedance Amplifier with a feedback factor of 0.2 is
b) decreases !!'put impedance (GATE - 03)
:l mcre2Ses dosed loop gain (a) 1/11 kn (b) 115 kn
d) Je3ds to oscillation. (d) 11 ill
(c) 5 kn
• ~egam·e feedback in an amplifier
09. Voltage series feedback (also called series-
(GATE- 99)
shunt feedback) results in
aJ Reduces gain (GATE-04)
lb) Increase frequency and phase distortions
(a) increase in both input and outpm
d Reduces bandwidth impedances.
di Increase Noise (b) decrease in both input and output
,., An amplifier has an open-loop gain of 100, impedances.
( c) increase in input impedance and
an input impedance of 1 ill, and an output
decrease in output impedance.
nnpedance of I00 n. A feedback network
( d) decrease in input impedance and
v.-ith a feedback factor of 0.99 is connected
increase in output impedance.
to the amplifier in a voltage series feedback
mode. The new input and output impedance
IO. The effect of current shunt feedback in an
~pectively are (GATE - 99)
amplifier is to
(a) 10 n and I n (b) 10 n and 10 n (GATE - 05)
(c) 100 k..'1 and In (d) 100 kD and I Jill {a) increase the input resistance and
decrease the output resistance
"6. The most commonly used Amplifier in (b) increase both input and output
sample and hold circuit is (GATE• 2000) resh,tances
(a) A Unity gain inverting Amplifier (c) decrease both input and output
(b)A Unity gain non•inverting Amplifier resistances
(c) An inverting Amplifier with a gain of (d) decrease the input resistance and
10. increase the output resistance.
(d)An inverting Amplifier with a gain of
100.
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Chapter 8 Power AtnPllJle•
One Mark Questions
0 I . In case of class A amplifiers
(efficiency of transfonne ' the 1
Ol. ln a tmnsistorpush•pull Ainpl ifitt amplifier)/~efficiency of a tran:fo cau~~
(GATE · 9l)
amplifier) 1s (GAlt-
11ner I't1i
(a) there is no d.c prc~cnt 111 the o 1p,
(a)2.9 (b)2 ~--~1
(b) there is no disto11ilm in the ofp.
(c) there 1s no eycn lumnotllt'.:- in the oip. (c) 1.0 (d) 0.5 I
(d)thuc 1:s no odd lmmmnics in the orp.
0 2. A C'las:-;-A tmnsfonncr (ouplcd. tiansiSlor
power Amplifier is -cquimJ lo deliver
a power output of 1o" ,\Its The nw,i1nu111
A regulated power supply, shown in fi
below, bas an unregulated input (URJ ~~
power mtin!!. of the tr,in,1stt)t should not be
ks:- than. ~ (GATE - 94)
(a) 5 W lb) 10 W Volts and generates a regulated output V
(c)20W td)40W Use the component values shown ID• !Iii-.
figure.
03. The circui sht"'' m. the figure supplies
15V (UR) -- Qi ~~--
power too::. Sn speaker or LS. The values ,---
.--
of le and Va for ~his circuit will be lkD 12k.Q
(GATE-95) 12kn v.,
- - - - ~ - - +15 V
CD le
6V 24kQ
l
- 15 V I 02. The power dissipation across the tran5istor
04. A power Amplifier delivers 50 W output at Q, shown in the figure is
50% iefficiency. The ambient temperature is (GATE -~~
25°C. If the maximum allowable junction (a) 4.8 Watts (b) 5.0 Watts
temperature is 150°C, then the maximum (c) 5.4 Watts (d) 6.0 Watts
thermal resistance 0 1c that can be tolerated is
(GATE - 95) 03. If the unregulated voltage increases b) 2~
05. Crossover distortion behavior is the . power dissipation across .~i
characteristic of (GATJ~- 99) transistor Q 1• (GATE
(a) class A output stage (a) increases by 20%
(b) class B output stage (b) increases by 50%
(c) class AB output stage (c) remains unchanged
(d) common-base output stage (d) decreases by 20%
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 3
pter 9 One Mark Questions

555 Timer
Five Marks Quesuons
Implement a monostable multivibrator
0 I.
consider the following two statements. using the timer circuit shown, in fig. Also
~t. (GATE-01) determine an expression for ON time T of
Statement 1: Astable Multivibrator can be the o/p pulse. (GATE - 98)
used for generating Square Wave. V~c
Statement 2: Bistable Multivibrator can be
used for storing binary information.
(a) Only statement 1 is correct o/p
(b) Only statement 2 is correct
(c) Both the statements 1 and 2 are correct
(d) Both the statements 1 and 2 are in Trigger
correct
~- In the astable multivibrator circuit shown in
the figure, the frequency of oscillation (in GND R
kHz) at the output pin 3 is _ _ GND
(Gate-16)(Set-3) 02. An IC 555 chip has been used to construct a
pulse generator. Typical pin connections
IVcc with components is shown below in fig. for
such an application. However it is desired to
generate a square pulse of 10 KHz.
-Vee
RA= 2.2 k.Q
Res -,.RA
4
Reset ys .
I Discharge
cc
555Timer I 3
61 Thresh Outi
output 13 IC 555 7 TriggerI ~Re
6
'Threshold
~ 0.01 µF
~Trig
Gnd
C== 0.022µF -=· 0.05 µF
Evaluate values of RA and R8 if the
W' capacitor has the values of O.Ql µF for the
configuration chosen. If necessary you can
suggest modifications in the external circuit
configuration. (GATE - 97)
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