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CMG - Unix Server Sizing

The Computer Measurement Group (CMG) is a non-profit organization focused on the performance evaluation and capacity management of computer systems. This paper discusses methodologies for estimating Unix server sizing using TPC benchmarks and CPU ratings, providing a relative sizing chart for various Unix server families. It also outlines different scaling algorithms for shared memory processors (SMP) and their implications on performance metrics.

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12 views13 pages

CMG - Unix Server Sizing

The Computer Measurement Group (CMG) is a non-profit organization focused on the performance evaluation and capacity management of computer systems. This paper discusses methodologies for estimating Unix server sizing using TPC benchmarks and CPU ratings, providing a relative sizing chart for various Unix server families. It also outlines different scaling algorithms for shared memory processors (SMP) and their implications on performance metrics.

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The Association of System

Performance Professionals

The Computer Measurement Group, commonly called CMG, is a not for profit, worldwide organization of data processing professionals committed to the
measurement and management of computer systems. CMG members are primarily concerned with performance evaluation of existing systems to maximize
performance (eg. response time, throughput, etc.) and with capacity management where planned enhancements to existing systems or the design of new
systems are evaluated to find the necessary resources required to provide adequate performance at a reasonable cost.

This paper was originally published in the Proceedings of the Computer Measurement Group’s 2000 International Conference.

For more information on CMG please visit http://www.cmg.org

Copyright Notice and License

Copyright 2000 by The Computer Measurement Group, Inc. All Rights Reserved. Published by The Computer Measurement Group, Inc. (CMG), a non-profit
Illinois membership corporation. Permission to reprint in whole or in any part may be granted for educational and scientific purposes upon written application to
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Copyright: No part of this publication or electronic file may be reproduced or transmitted in any form to anyone else, including transmittal by e-mail, by file
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Disclaimer; Limitation of Liability: The ideas and concepts set forth in this publication are solely those of the respective authors, and not of CMG, and CMG
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UNIX SERVER SIZING, OR WHAT TO DO WHEN THERE ARE NO


MIPS?

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Bob Chaney
Delta Technology, Inc.
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MIPS have been the main “quick-sizing” metric


for estimating the relative size of mainframe computers
for a number of years. Unix has SPEC and TPC measurements,
but neither creates the familiar “bottom to top” MIPS
chart we’ve come to know and love. This paper takes
published TPC benchmarks and vendor-supplied CPU ratings,
applies a simple SMP algorithm and creates a
relative sizing chart for several unix server families.

Introduction http://www.tpc.org. This paper uses the


MIPS. The CPU metric that can’t be TPC-C benchmark as a basis for estimating
measured by the average capacity planner, relative unix systems’ capacity. The TPC-C
but shows up in almost every OS/390 CPU benchmark simulates an order-entry system
upgrade request. You won’t find it in your with prescribed transactions that both query
performance database, it doesn’t show up and update a database. The resultant
anywhere in RMF, and every modeling benchmark, tpmC (Transactions Per
software vendor will freely caution you from Minute), measures the maximum number
using it. However, in a pinch or to answer a of orders processed per minute, making it a
manager’s question, most OS/390 capacity “business throughput” measurement rather
planners will refer to the ubiquitous MIPS than a transaction execution rate. [TPC
chart tacked up on their cubicle wall. Using 1999] The TPM benchmarks provide
a MIPS chart to do relative “quick sizing” metrics for a fully configured highly tuned
has been a mainstay of OS/390 capacity system, with the objective of producing the
planning for many years. highest possible TPM number for
Those of us with an OS/390 capacity advertising purposes. So unless you’re
planning background who find ourselves interested in a 32-way HP V2500 or a 64-
responsible for unix capacity plans, miss way SUN E10000, the TPM rating shown on
having that relative sizing chart as a quick the TPC’s web site doesn’t help a lot.
reference. This paper provides a
methodology for creating a simple, quick The SPEC benchmarks measure a number
relative sizing table using some published of different computing environments, for
benchmark metrics and a few SMP scaling example, the compute intensive
factors. performance of CPUs (SPEC CPU2000),
Java Virtual Machines (SPEC JVM98),
Published Metrics WEB performance (SPEC WEB99). The
Most unix vendors participate in benchmark entire range of SPEC benchmarks can be
organizations like the Transaction found at: http://www.spec.org. SPEC is
Processing Performance Council (TPC- with mentioned simply as a reference point.
its Transactons per Minute -TPM metric) Since the workloads we measure tend to be
and the Standard Performance Evaluation commercial OLTP, thereby lending
Corporation(SPEC - with its various SPEC themselves to the tpmC metric, no SPEC
ratings). scaling metrics will be included in this
paper. However, the scaling methodology
The TPC produces a number of shown later in the paper for CPU MHZ can
benchmarks which can be found at

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(p-1)
also be applied to uniprocessor SPEC ECPU = P / 1 + f
ratings.

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From the unix vendors we have the MHZ Quadratic Scaleup
rating of the CPU, which gives a good
uniprocessor metric but does little in the way ECPU = P - fP(P-1)
of providing the relative capacities of
different SMP configurations. The MHZ Where:
rating is the CPU’s clock speed, and
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measures Millions of Cycles per second. ECPU = Effective CPUs


MHZ ratings for CPUs have been around for (available to the workload)
a number of years and were actually P = Number of physical
provided for early MVS systems as Cycle processors
Time measurements. Cycle time measures f = CPU seriality/overhead
the average single CPU cycle and is factor, where f < 1
expressed in nanoseconds. The cycle time O = CPU net-of-overhead
of a 3090-180J is 14.5 nanoseconds factor, calculated as 1 - f
(0.0000000145)to complete one cycle. This
translates to 68.96 MHZ via the following
calculation: The above algorithms differ in their
underlying assumptions about how inter-
1 / 0.0000000145 * 1,000,000 = 68.96 MHZ CPU and CPU-memory communications are
(Millions of Cycles Per Second) accomplished.

While only representing one system The geometric algorithm models CPU-CPU
capacity metric (CPU clock speed), MHZ communications as a “token-passing”
can still be a useful relative sizing method, where each CPU communicates
measurement and certainly is no more risky with the one next to it.
than the aforementioned tpmC benchmark.
The tpmC benchmark and CPU MHZ ratings Amdahl’s algorithm assumes a “broadcast
discussed in this section will be used later in method” of CPU-CPU communication,
the paper to create SMP scaling tables for where one CPU broadcasts information to
various unix systems. all other CPUs in the complex.

SMP Scaling The quadratic algorithm models a one-to-


There are three prevalent SMP (Shared one CPU-CPU and/or CPU-memory
Memory Processor) scaling algorithms used communication method. This method
in the I/T industry: Geometric scaleup, assumes the higher overhead of two-way,
Amdahl’s scaleup and Quadratic scaleup. direct communications.
The algorithms estimate the non-linear CPU
overhead impact of O/S code path lengths Many commercial computing environments
(syscalls in unix, supervisor calls in will contain some or all of the above types
OS/390), exchange of data between CPU of communications methods caused by both
caches, spin lock serialization and CPU wait the operating systems and applications
for I/O completion. [Gunther 1998] The code.
three algorithms are:

Geometric Scaleup

ECPU = 1 - Op
f
Seriality Factor
The most subjective part of all three
Amdahl’s Scaleup algorithms is the seriality/overhead factor
(denoted in the above calculations as “f”).

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This factor, not easily measured/estimated are added to the configuration. In other
in commercial systems, represents the words, that portion which cannot be

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percentage of the workload that is serial in parallelized. Using a 3% seriality factor
nature and will not benefit linearly as CPUs would produce the following scaleup chart.

SMP SCALING AT 3.0% SERIALITY


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Geometric Scaleup Amdahl Scaleup Quadratic Scaleup Average

32

30

28

26

24

22

20
Productive CPUs

18

16

14

12

10

0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Physical CPUs

Chart 1

The x-axis represents the number of It turns out the 3% seriality factor provides a
physical CPUs in a server while the Y-axis very good approximation of CISC (Complex
is the number of effective CPUs, which Instruction Set Computing) systems like
takes into account the increasing SMP OS/390. Table 1 shows the data for 1 - 10
overhead experienced as physical CPUs are CPUs included in the chart above. The data
added. The quadratic algorithm actually in this table was created by applying the
projects negative capacity growth at greater three scaling algorithms then averaging the
than 18 CPUs, assuming a loss of three scaleup factors.
productive CPUs to overhead functions at
that level and beyond.

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No. CPUs
Geometric Scaleup Amdahl Scaleup Quadratic Scaleup Average

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1 1.000 1.000 1.000 1.000
2 1.970 1.942 1.940 1.951
3 2.911 2.830 2.820 2.854
4 3.824 3.670 3.640 3.711
5 4.709 4.464 4.400 4.524
6 5.568 5.217 5.100 5.295
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7 6.401 5.932 5.740 6.024


8 7.209 6.612 6.320 6.713
9 7.992 7.258 6.840 7.363
10 8.753 7.874 7.300 7.976
Table 1

By using the factors from Table 1 and the the CW MIPS rating. The uniprocessor
MIPS ratings from Cheryl Watson’s CPU MIPS are identical and are taken directly
chart [Watson 1999], we can determine from the CW CPU chart. Each
which SMP curve best fits the 9672-xx6 configuration thereafter is estimated by the
family of CMOS machines. Table 2 shows appropriate scaling factor.
how each SMP scaling table matches with

# OF MODEL
CPUs GEOMETRIC AMDAHL QUADRATIC AVERAGE CW MIPS RATING
1 9672-T16 128.5 128.5 128.5 128.5 128.5
2 9672-T26 253.1 249.5 249.3 250.6 243.2
3 9672-R36 374.1 363.7 362.4 366.7 351.5
4 9672-R46 491.3 471.6 467.7 476.9 454.2
5 9672-R56 605.1 573.7 565.4 581.4 549.4
6 9672-R66 715.4 670.4 655.4 680.4 638.8
7 9672-R76 822.5 762.3 737.6 774.1 720.1
8 9672-R86 926.3 849.6 812.1 862.7 795.1
9 9672-R96 1027.0 932.7 878.9 946.2 865.0
10 9672-Rx6 1124.7 1011.8 938.1 1024.9 929.3
Table 2

We find the quadratic model most closely the calculated quadratic scaling model and
approximates the published MIPS rating, the CW MIPS ratings in Figure 2 below.
and can see a close relationship between

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MIPS SCALING FOR 9672 CMOS - 3% SERIALITY FACTOR

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QUADRATIC CW MIPS RATING
1000

900

800
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700
Productive MIPS

600

500

400

300

200

100

0
9672-R36

9672-R46

9672-R56

9672-R66

9672-R76

9672-R86

9672-R96
9672-T16

9672-T26

9672-Rx6
Chart 2

We can make the two curves almost out-of-order instruction execution or parallel
identical by applying a more exact seriality execution are more difficult to implement on
factor of 3.075%, but we’ll use 3% as the CISC machines.[Patterson 1980] Therefore
baseline seriality factor for CISC systems. it is feasible and probable that RISC
The purpose of this paper, however, is to systems, by virtue of their short simple
estimate SMP capacity for RISC (Reduced instructions will result in a lower seriality
Instruction Set Computer) systems. The factor than CISC systems. The ideal RISC
primary difference between RISC and CISC CPU will complete an instruction in one
systems is how the CPU works. RISC CPU clock cycle, allowing for higher
CPUs take short, simple instructions and do degrees of parallelization, and lower SMP
them very quickly, issuing many more overhead at high physical CPU numbers.
instructions than a CISC CPU. CISC For the above reasons, a 2% seriality factor
systems use longer, more complex will be used to estimate the SMP capacity of
instructions. As a result, CPU features like unix systems. Figure 2 shows the 2% chart.

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SMP FACTORS AT 2% SERIALITY

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Geometric Scaleup Amdahl Scaleup Quadratic Scaleup Average

32

30

28

26
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24

22

20
Effective CPUs

18

16

14

12

10

0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Number of Physical CPUs

Chart 3

The above scaling curves will be used to


estimate unix systems’ SMP capacity in the The table containing the factors charted in
next sections of the paper. All four factors Figure 3 above appears on the next page
will be used to provide a range of capacity (Table 3).
estimates at different SMP configurations.

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No. CPUs
Geometric Scaleup Amdahl Scaleup Quadratic Scaleup Average

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1 1.000 1.000 1.000 1.000
2 1.980 1.961 1.960 1.967
3 2.940 2.885 2.880 2.902
4 3.882 3.774 3.760 3.805
5 4.804 4.630 4.600 4.678
6 5.708 5.455 5.400 5.521
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7 6.594 6.250 6.160 6.335


8 7.462 7.018 6.880 7.120
9 8.313 7.759 7.560 7.877
10 9.146 8.475 8.200 8.607
11 9.963 9.167 8.800 9.310
12 10.764 9.836 9.360 9.987
13 11.549 10.484 9.880 10.638
14 12.318 11.111 10.360 11.263
15 13.072 11.719 10.800 11.863
16 13.810 12.308 11.200 12.439
17 14.534 12.879 11.560 12.991
18 15.243 13.433 11.880 13.519
19 15.938 13.971 12.160 14.023
20 16.620 14.493 12.400 14.504
21 17.287 15.000 12.600 14.962
22 17.941 15.493 12.760 15.398
23 18.583 15.972 12.880 15.812
24 19.211 16.438 12.960 16.203
25 19.827 16.892 13.000 16.573
26 20.430 17.333 13.000 16.921
27 21.022 17.763 12.960 17.248
28 21.601 18.182 12.880 17.554
29 22.169 18.590 12.760 17.840
30 22.726 18.987 12.600 18.104
31 23.271 19.375 12.400 18.349
32 23.806 19.753 12.160 18.573
Table 3

Estimated TPM Table 3, we can now create a table of


Using the following published tpmC estimated TPM metrics.
benchmarks and the SMP factors from

MODEL tpmC # CPUs MHZ DATABASE DATE


HP 9000 V2250 52,117 16 240 Sybase 2/13/98

HP N4000 49,308 8 440 Sybase 4/13/99

HP 9000 V2500 102,023 32 440 Sybase 8/24/99

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The first step is to estimate the uniprocessor TPM by dividing the tpmC benchmark by the

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appropriate geometric factor. For the HP V2250, the calculation would be:

52,117 / 13.810 = 3,774 est. TPM

metric, this seems like a fairly good


Using the geometric factor provides the assumption. So on all the estimated TPM
most conservative uniprocessor estimate tables the actual tpmC benchmark will
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while at the same time assumes the appear only in the geometric column (at the
benchmark was established with the lowest appropriate CPU number - in this case 16),
possible seriality level. Given the objective with all other scaling factors returning lower
of the benchmark effort, namely to produce TPM estimates. The complete scaling
the highest possible tables for each HP server appear next.

HP 9000 V2250
G e o m etric Amdahl Q uadratic Average
1 3774 3774 3774 3774
2 7472 7400 7397 7423
3 11097 10886 10869 10950
4 14648 14241 14190 14360
5 18129 17471 17360 17653
6 21541 20585 20379 20835
7 24884 23586 23247 23906
8 28160 26483 25964 26869
9 31370 29280 28530 29727
10 34517 31982 30945 32481
11 37600 34593 33210 35134
12 40622 37120 35323 37688
13 43583 39564 37285 40144
14 46486 41931 39097 42505
15 49330 44225 40757 44771
16 52117 46447 42267 46944
Table 4

HP N4000
G e o m etric Amdahl Q uadratic Average
1 6608 6608 6608 6608
2 13084 12957 12952 12997
3 19430 19062 19031 19174
4 25650 24936 24846 25144
5 31745 30593 30397 30911
6 37718 36044 35683 36482
7 43571 41300 40705 41859
8 49308 46372 45463 47048
Table 5

HP 9000 V2500

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G e o m etric Amdahl Quadratic Average


1 4286 4286 4286 4286

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2 8486 8403 8400 8430
3 12601 12362 12343 12435
4 16635 16172 16114 16307
5 20588 19841 19714 20048
6 24462 23376 23142 23660
7 28258 26785 26399 27148
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8 31979 30075 29485 30513


9 35625 33251 32399 33758
10 39198 36319 35142 36886
11 42700 39285 37714 39899
12 46131 42154 40113 42799
13 49494 44930 42342 45589
14 52790 47618 44399 48269
15 56020 50222 46285 50842
16 59185 52746 47999 53310
17 62287 55194 49542 55674
18 65327 57568 50913 57936
19 68306 59873 52113 60097
20 71225 62111 53142 62159
21 74087 64284 53999 64123
22 76890 66397 54685 65991
23 79638 68451 55199 67763
24 82331 70449 55542 69441
25 84970 72392 55713 71025
26 87556 74284 55713 72518
27 90091 76126 55542 73920
28 92575 77921 55199 75231
29 95009 79669 54685 76454
30 97394 81373 53999 77589
31 99732 83034 53142 78636
32 102023 84654 52113 79597
Table 6

The last table points out the huge difference to scratch a little beneath the surface to
in estimated TPM’s at higher CPU better understand the tpmC benchmark.
configurations. Depending on how well both While both systems were running HP-UX
the application(s) and operating system 11.0, they were on different Extension
scale, the V2500 could generate a high of Packs. The N benchmark used Sybase
102,023 tpmC or a low of 52,113 estimated Adaptive Server 11.9.3 while the V used
TPM. It also indicates that extreme caution version 12.0. The N benchmark server had
should be taken when using any SMP 16GB of memory to the V’s 32GB, so there
scaling tables. Of particular note is the was more memory per CPU (16/8 for the N,
difference between the N4000 and the 32/32 for the V)and both servers were fed
V2500 at 8 CPUs. Referring to the TPC by 14 client machines (HP C3000). One
web site we see that both systems used PA- could argue that more clients should have
RISC 8500 440MHZ CPUs, with the V2500 been used for the 32-CPU V benchmark
having 32 CPUs and the N4000 having 8 than were used for the 8-CPU N. All this
CPUs. If the scaling factors are relatively proves is that relying on the TPC
close, then why does the V2500 at 8 CPUs benchmark requires caution and
have 31,979 estimated TPMs while the understanding.
N4000 actually generated 49,308. We have

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MHZ Scaling estimated productive CPU MHZ at different


Applying the Table 3 factors to CPU MHZ CPU configurations. Using the V2500’s 440

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provides us with a CPU MHZ SMP scaling MHZ CPU clock cycle and the SMP scaling
table. In each case, the uniprocessor CPU factors from Table 3 produces the 440 MHZ
MHZ is provided by the computer vendor. SMP SCALING table.
We simply multiply the uniprocessor MHZ
by the SMP scaling factor to arrive at

440 MHZ SMP SCALING


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G e o m etric Am dahl Q uadratic Average


1 440 440 440 440
2 871 863 862 865
3 1294 1269 1267 1277
4 1708 1660 1654 1674
5 2114 2037 2024 2058
6 2511 2400 2376 2429
7 2901 2750 2710 2787
8 3283 3088 3027 3133
9 3658 3414 3326 3466
10 4024 3729 3608 3787
11 4384 4033 3872 4096
12 4736 4328 4118 4394
13 5082 4613 4347 4681
14 5420 4889 4558 4956
15 5751 5156 4752 5220
16 6076 5415 4928 5473
17 6395 5667 5086 5716
18 6707 5910 5227 5948
19 7013 6147 5350 6170
20 7313 6377 5456 6382
21 7606 6600 5544 6583
22 7894 6817 5614 6775
23 8176 7028 5667 6957
24 8453 7233 5702 7129
25 8724 7432 5720 7292
26 8989 7627 5720 7445
27 9250 7816 5702 7589
28 9505 8000 5667 7724
29 9754 8179 5614 7849
30 9999 8354 5544 7966
31 10239 8525 5456 8073
32 10475 8691 5350 8172
Table 7

Once again we see that at 32 CPUs, the the scaling factors to a number of different
V2500 could rate at 10,475 estimated total CPU MHZ ratings. In the following table
CPU MHZ or 5,350 estimated total CPU we’ll use the AVERAGE scaling factor
MHZ, depending on the scaling curve. column to create the CPU MHZ TABLE
Another way to use the scaling factors in USING AVERAGE SCALING FACTORS.
Table 3 is to choose one method and apply

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CPU MHZ TABLE USING AVERAGE SCALING FACTORS

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100 MHZ 180 MHZ 200 MHZ 240 MHZ 400MHZ 440MHZ 550 MHZ
1 100 180 200 240 400 440 550
2 197 354 393 472 787 865 1082
3 290 522 580 696 1161 1277 1596
4 381 685 761 913 1522 1674 2093
5 468 842 936 1123 1871 2058 2573
6 552 994 1104 1325 2208 2429 3036
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7 633 1140 1267 1520 2534 2787 3484


8 712 1282 1424 1709 2848 3133 3916
9 788 1418 1575 1890 3151 3466 4332
10 861 1549 1721 2066 3443 3787 4734
11 931 1676 1862 2234 3724 4096 5121
12 999 1798 1997 2397 3995 4394 5493
13 1064 1915 2128 2553 4255 4681 5851
14 1126 2027 2253 2703 4505 4956 6195
15 1186 2135 2373 2847 4745 5220 6525
16 1244 2239 2488 2985 4976 5473 6842
17 2338 2598 3118 5196 5716 7145
18 2433 2704 3244 5407 5948 7435
19 2524 2805 3366 5609 6170 7713
20 2611 2901 3481 5802 6382 7977
21 2693 2992 3591 5985 6583 8229
22 2772 3080 3696 6159 6775 8469
23 2846 3162 3795 6325 6957 8696
24 2917 3241 3889 6481 7129 8912
25 2983 3315 3977 6629 7292 9115
26 3046 3384 4061 6768 7445 9307
27 3105 3450 4140 6899 7589 9487
28 3160 3511 4213 7022 7724 9655
29 3211 3568 4282 7136 7849 9812
30 3259 3621 4345 7242 7966 9957
31 3303 3670 4404 7340 8073 10092
32 3343 3715 4458 7429 8172 10215
Table 8

The above table provides a quick way to MHZ CPUs is experiencing peak CPU
see the relative capacity of various CPU utilization of 99% with a single workload,
configurations using the same scaling factor and the server is upgraded to 32 CPUs, we
and CPU metric. can calculate the new peak utilization as:

Practical Uses
Whatever tables you use, estimated TPM or
CPU MHZ can be used to compare different
RISC system configurations between the
same or different vendors’ models. They
can also be used to quantify not only the
success of an upgrade but also the relative
accuracy of the scaling factor. For
example, by using the previous MHZ table
we can estimate the utilization results of a
CPU upgrade. If a V2500 containing 16 440
Base Peak util. / (32-CPU Factor/16-Cpu Factor) + latent demand

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The factors are taken from Table 3, and for calculation purposes the latent demand is estimated
at 10%.

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For each of the scaling possibilities the calculation is:

Geometric 99% / (23.806/13.810) = 57% + 10% = 67%

Amdahl 99% / (19.753/12.308) = 62% + 10% = 72%


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Quadratic 99% / (12.160/11.200) = 91% + 10% = 101%

Average 99% / (18.573/12.439) = 66% + 10% = 76%

By measuring the peak CPU utilization after detailed explanation of the underlying
the upgrade we can tell which scaling curve concepts summarized in this paper, please
would most apply to this server/workload refer to the references noted below.
combination by how close the actual comes
to the estimate. As we see, if the workload
scales close to the quadratic model, we
would see no improvement at all! If the
actual utilization is much higher/lower than References
these estimates then we’ll need to revisit the
2% seriality factor used to create Table 3. If [TPC 1999] TPC Benchmark? C Standard
the actual post-upgrade utilization is much Specification Rev. 3.5, October 25, 1999,
lower (better) than these estimates, then a Pg. 71
lower seriality factor should be used. If
much higher, then the workload has more [Gunther 1998 ] Gunther, Neil J., The
serial instructions and a higher seriality Practical Performance Analyst, McGraw-Hill,
factor would be in store. Applying this 1998
technique is meant to be a constant iterative
effort, once again with caution taken at [Watson 1999] Cheryl Watson’s CPU Chart,
every step. However, given the wide range Watson Walker, Inc., December 1999
of possibilities, it should be possible to
construct an appropriate SMP scaling table [Patterson 1980] D.A. Patterson, D.R.
for your workload/server configurations. Ditzel, “The Case for the Reduced
Instruction Set Computer”, Computer
Architecture News, October 1980
Summary
The SMP scaling tables created in this www.tpc.org, web site of the Transaction
paper can be a quick-sizing tool for Processing Performance Council
estimating the capacity of unix systems.
However, once again we must caution www.spec.org, web site of the Standard
against blindly relying on the metrics. Performance Evaluation Corporation
The calculations allow for customized tables
for each company’s configuration, with the
stipulation that other proof of the concept be
applied, e.g., verifying the pre and post
upgrade utilization against the tables. Using
the tables for management presentations
has the advantage of simplicity and ease of
use. The table construction process and the
concept of SMP overhead can be easily
explained and readily charted for any
management presentation. For a more

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