Submitted by:
Nimra, Neelam, Noreen
Submitted to:
Sir. Muhammad Zaman Mughal
Assignment title:
Shift Registers (SIPO, PISO, PIPO)
Course title:
Digital Logic and Design
Course code:
CMPC-5104
Department:
Computer Science (Regular)
Baba Guru Nanak University Nankana Sahib
1. Shift Registers
Flip flops can be used to store a single bit of binary data (1 or 0). However, in order to store
multiple bits of data, we need multiple flip-flops. N flip flops are to be connected in order to
store n bits of data. A Register is a device that is used to store such information. It is a group of
flip-flops connected in series used to store multiple bits of data. The information stored within
these registers can be transferred with the help of shift registers.
Shift Register is a group of flip flops used to store multiple bits of data. The bits stored in such
registers can be made to move within the registers and in/out of the registers by applying clock
pulses. An n-bit shift register can be formed by connecting n flip-flops where each flip-flop
stores a single bit of data. The registers which will shift the bits to the left are called “Shift left
registers”. The registers which will shift the bits to the right are called “Shift right registers”.
1.1 Types of Shift registers:
Shift registers are basically of following types:
Serial In Serial Out shift register
Serial In parallel Out shift register
Parallel In Serial Out shift register
Parallel In parallel Out shift register
Bidirectional Shift Register
1.1.1 Serial-In Serial-Out Shift Register (SISO)
The shift register, which allows serial input (one bit after the other through a single data line)
and produces a serial output is known as a Serial-In Serial-Out shift register. Since there is
only one output, the data leaves the shift register one bit at a time in a serial pattern, thus the
name Serial-In Serial-Out Shift Register. The logic circuit given below shows a serial-in serial-
out shift register. The circuit consists of four D flip-flops which are connected in a serial
manner. All these flip-flops are synchronous with each other since the same clock signal is
applied to each flip-flop.
Figure 1-1 Serial-In Serial-Out Shift Register (SISO)
The above circuit is an example of a shift right register, taking the serial data input from the
left side of the flip flop. The main use of a SISO is to act as a delay element.
1.1.2 Serial-In Parallel-Out Shift Register (SIPO)
The shift register, which allows serial input (one bit after the other through a single data line)
and produces a parallel output is known as the Serial-In Parallel-Out shift register. The logic
circuit given below shows a serial-in-parallel-out shift register. The circuit consists of four D
flip-flops which are connected. The clear (CLR) signal is connected in addition to the clock
signal to all 4 flip flops in order to RESET them. The output of the first flip-flop is connected
to the input of the next flip flop and so on. All these flip-flops are synchronous with each other
since the same clock signal is applied to each flip-flop.
Figure 1-2 Serial-In Parallel -Out shift Register (SIPO)
The above circuit is an example of a shift right register, taking the serial data input from the
left side of the flip-flop and producing a parallel output. They are used in communication lines
where Demultiplexing of a data line into several parallel lines is required because the main use
of the SIPO register is to convert serial data into parallel data.
1.1.3 Parallel-In Serial-Out Shift Register (PISO)
The shift register, which allows parallel input (data is given separately to each flip flop and in a
simultaneous manner) and produces a serial output is known as a Parallel-In Serial-Out shift
register. The logic circuit given below shows a parallel-in-serial-out shift register. The circuit
consists of four D flip-flops which are connected. The clock input is directly connected to all
the flip-flops but the input data is connected individually to each flip-flop through
a multiplexer at the input of every flip-flop. The output of the previous flip-flop and parallel
data input are connected to the input of the MUX and the output of MUX is connected to the
next flip-flop. All these flip-flops are synchronous with each other since the same clock signal
is applied to each flip-flop.
Figure 1-3 Parallel-In Serial-Out Shift Register (PISO)
A Parallel in Serial out (PISO) shift register is used to convert parallel data to serial data.
1.1.4 Parallel-In Parallel-Out Shift Register (PIPO)
The shift register, which allows parallel input (data is given separately to each flip flop and in a
simultaneous manner) and also produces a parallel output is known as Parallel-In parallel-Out
shift register. The logic circuit given below shows a parallel-in-parallel-out shift register. The
circuit consists of four D flip-flops which are connected. The clear (CLR) signal and clock
signals are connected to all 4 flip-flops. In this type of register, there are no interconnections
between the individual flip-flops since no serial shifting of the data is required. Data is given
as input separately for each flip flop and in the same way, output is also collected individually
from each flip flop.
Figure 1-4 Parallel-In Parallel-Out Shift Register (PIPO)
A Parallel in Parallel out (PIPO) shift register is used as a temporary storage device and like
SISO Shift register it acts as a delay element.
