MIRPUR UNIVERSITY OF SCIENCE AND TECHNOLOGY (MUST), MIRPUR
DEPARTMENT OF ELECTRICAL ENGINEERING
DIGITAL SYSTEM DESIGN
EE-474
Module No. 03: Basic Verilog Concepts
Engr. Jabbar Younis
Lecturer
Date: December 04, 2020
Learning Objectives
• Understand lexical conventions for operators, comments, whitespace, numbers,
strings, and identifiers
• Define the logic value set and data types such as nets, registers, vectors, numbers,
simulation time, arrays, parameters, memories, and strings
• Identify useful system tasks for displaying and monitoring information, and for
stopping and finishing the simulation
• Learn basic compiler directives to define macros and include files.
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Lecture 1: Key Points
• Lexical Conventions
• Data Types
• System Tasks
• Compiler Directives
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Lexical Conventions
• The basic lexical conventions used by Verilog HDL are similar to those
in the C programming language.
• Verilog HDL is a case-sensitive language.
• All keywords are in lowercase
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Lexical Conventions
• Whitespace
• Comments
• Operators
• Number Specification
• Strings
• Identifiers and Keywords
• Escaped Identifiers
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WhiteSpace
• Blank spaces (\b) , tabs (\t) and newlines (\n)
comprise the whitespace. Whitespace is ignored by
Verilog except when it separates tokens.
• Whitespace is not ignored in strings.
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Comments
• Comments can be inserted in the code for readability and
documentation
• One Line comment: starts with “//”
• Multiple line comment: starts with “/*” and ends with “*/”
• Multiple-line comments cannot be nested
• One-line comments can be embedded in multiple-line
comments
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Comments (Example)
• a = b && c; // This is a one-line comment
• /* This is a multiple line
comment */
• /* This is /* an illegal */ comment */
• /* This is //a legal comment */
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Operators
• Operators are of three types:
• Unary: Unary operators precede the operand
• Binary: Binary operators appear between two
operands
• Ternary: Ternary operators have two separate
operators that separate three operands.
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Operators (Example)
• a = ~ b; // ~ is a unary operator. b is the operand
• a = b && c; // && is a binary operator. b and c are
operands
• a = b ? c : d; // ?: is a ternary operator. b, c and d
are operands
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Number Specification
• There are two types of number specification in
Verilog:
• Sized
• Unsized
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Number Specification
• Sized Numbers
They are represented as <size> '<base format> <number>.
• <size> is written only in decimal and specifies the
number of bits in the number
• Legal <base formats> are decimal ('d or 'D),
hexadecimal ('h or 'H), binary ('b or 'B) and octal ('o or
'O)
• <number> is specified as consecutive digits from 0, 1,
2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f.
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Sized Number (Example)
• 4'b1111 // This is a 4-bit binary number
• 12'habc // This is a 12-bit hexadecimal number
• 16'd255 // This is a 16-bit decimal number.
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UnSized Number
• Numbers that are specified without a <base format>
specification are decimal numbers by default
• Numbers that are written without a <size>
specification have a default number of bits that is
simulator- and machine-specific (must be at least 32).
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UnSized Number (Example)
• 23456 // This is a 32-bit decimal number by default
• 'hc3 // This is a 32-bit hexadecimal number
• 'o21 // This is a 32-bit octal number
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X or Z Values
• Verilog has two symbols for unknown and high
impedance values
• An unknown value is denoted by an x
• A high impedance value is denoted by z.
Important for modeling real circuits.
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X or Z Values (Example)
• 12'h13x // This is a 12-bit hex number; 4 least
significant bits unknown
• 6'hx // This is a 6-bit hex number
• 32'bz // This is a 32-bit high impedance number
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Negative Numbers
• Negative numbers can be specified by putting a minus
sign before the size for a constant number
• Size constants are always positive
• It is illegal to have a minus sign between <base
format> and <number>
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Negative Numbers (Example)
• -6'd3 // 8-bit negative number stored as 2's
complement of 3
• -6'sd3 // Used for performing signed integer math
• 4'd-2 // Illegal specification
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Underscore Character and Question Mark
• An underscore character "_" is allowed anywhere in a
number except the first character
• Underscore characters are allowed only to improve
readability of numbers and are ignored by Verilog.
• A question mark "?" is the Verilog HDL alternative for z
in the context of numbers.
• The ? is used to enhance readability in the casex and
casez statements
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Strings
• A string is a sequence of characters that are enclosed
by double quotes
• String must be contained on a single line, that is,
without a carriage return.
• Strings are treated as a sequence of one-byte ASCII
values.
• "Hello Verilog World" // is a string
• "a / b" // is a string
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Identifiers and Keywords
• Keywords are special identifiers reserved to define the
language constructs
• Keywords are in lowercase.
• Identifiers are names given to objects so that they can be
referenced in the design
• Identifiers are made up of alphanumeric characters, the
underscore ( _ ), or the dollar sign ( $ ).
• Identifiers start with an alphabetic character or an
underscore
• They cannot start with a digit or a $ sign
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Identifiers and Keywords (Example)
• reg value; // reg is a keyword; value is an identifier
• input clk; // input is a keyword, clk is an identifier
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Escaped Identifiers
• Escaped identifiers begin with the backslash ( \ )
character and end with whitespace
• All characters between backslash and whitespace are
processed literally
• Any printable ASCII character can be included in escaped
identifiers
• Neither the backslash nor the terminating whitespace is
considered to be a part of the identifier.
• \a+b-c
• \**my_name**
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Escaped Identifiers
• Escaped identifiers begin with the backslash ( \ )
character and end with whitespace
• All characters between backslash and whitespace are
processed literally
• Any printable ASCII character can be included in escaped
identifiers
• Neither the backslash nor the terminating whitespace is
considered to be a part of the identifier.
• \a+b-c
• \**my_name**
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References
• VERILOG HDL”-A guide to digital design and synthesis by Samir
Palnitkar, Prentice Hall Publisher
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End of Lecture
