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Digital Logic & Computer Organization

The document outlines the structure of the B.Tech IV Semester End Examinations for Digital Logic & Computer Organization at Aditya Engineering College. It includes details on the examination format, with Section-A consisting of 10 short answer questions and Section-B requiring one question from each unit. The content covers various topics such as binary number systems, digital circuits, computer architecture, memory organization, and input/output systems.

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Rasul Ahmed
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3K views2 pages

Digital Logic & Computer Organization

The document outlines the structure of the B.Tech IV Semester End Examinations for Digital Logic & Computer Organization at Aditya Engineering College. It includes details on the examination format, with Section-A consisting of 10 short answer questions and Section-B requiring one question from each unit. The content covers various topics such as binary number systems, digital circuits, computer architecture, memory organization, and input/output systems.

Uploaded by

Rasul Ahmed
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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H.T.

No: Course Code: 231AM4T01

ADITYA ENGINEERING COLLEGE (A)


B.Tech - IV Semester End Examinations (AR23)
DIGITAL LOGIC & COMPUTER ORGANIZATION
(Common to AIML & CSE(DS))
Time: 3 hours Max. Marks: 70
1. Answer all 10 questions from Section-A. Each question carries 2 marks.
2. Answer one question from each unit in Section-B. Each question carries 10 marks.

SECTION –A 10 X 2 =20

1 a Convert the decimal number 45 into binary, octal, and hexadecimal L3 CO1 [2M]
formats
b List significance of multiplexers in digital circuits. L1 CO1 [2M]
c Compare combinational and sequential circuits. L4 CO2 [2M]
d List significance of Von Neumann architecture? L1 CO2 [2M]
e Explain the difference between signed and unsigned binary L2 CO3 [2M]
numbers.
f List limitations of a Multiple Bus Organization L1 CO3 [2M]
g Explain the importance of cache memory in a computer system. L2 CO4 [2M]
h Define and differentiate between RAM and ROM. L1 CO4 [2M]
i Explain the concept of direct memory access (DMA). L2 CO5 [2M]
j List interrupts and their role in I/O organization. L1 CO5 [2M]

SECTION –B 5 X 10 =50

UNIT-I
2 a Discuss fixed-point and floating-point representation with examples. L2 CO1 [5M]
b Apply a Karnaugh Map for the given Boolean Expression L3 CO1 [5M]
F = AB + A'C + BC.
OR
3 a Construct a combinational circuit for a half adder. L6 CO1 [5M]
b Explain the working of a decoder and its applications. L2 CO1 [5M]

UNIT-II
4 a Explain the working of flip-flops with a detailed diagram. L2 CO2 [5M]
b Discuss the types of counters and their applications. L2 CO2 [5M]
OR
5 a Describe the functional units of a computer system. L2 CO2 [5M]
b Compare multiprocessors and multi-computers with examples. L4 CO2 [5M]

UNIT-III
6 a Construct a circuit to perform the addition of two signed numbers. L6 CO3 [5M]
b Explain the concept of floating-point arithmetic with suitable L2 CO3 [5M]
examples.

(P.T.O)
OR
7 a Discuss the design and working of a fast multiplier. L2 CO3 [5M]
b Explain the execution of a complete instruction in a computer system. L2 CO3 [5M]

UNIT-IV
8 a Explain the concept of virtual memory and its importance. L2 CO4 [5M]
b Discuss the various types of secondary storage devices. L2 CO4 [5M]
OR
9 a Describe the organization of a cache memory system. L2 CO4 [5M]
b Explain the relationship between memory speed, size, and cost. L2 CO4 [5M]

UNIT-V
10 a Explain the role of buses in input/output organization. L2 CO5 [5M]
b Discuss standard I/O interfaces with examples. L2 CO5 [5M]
OR
11 a Describe the process of interrupt handling in a computer system. L2 CO5 [5M]
b Explain the working of direct memory access (DMA) in detail. L2 CO5 [5M]

*****

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