FPGA Basics
Last updated 7/19/23
FPGA Basics
• Field Programmable Gate Array
• Long history
• PROM, PAL, CPLD
• Gate Array, Standard Cells
• Why FPGAs
• Rapid prototyping
• In field test / modification
• Rapidly changing technology / standard
• Low / mid volume production
• High volume → ASIC or ASSP
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FPGA Basics
• Advantages
• Flexibility
• Speed to market
• Well characterized
• Disadvantages
• COST
• Maximum clock frequency
• Power
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FPGA Basics
• Basic Concept
• Many small fixed circuits
+
• Multiple levels of interconnect
+
• Programmable connections
• Enhancements
• Fixed IP blocks
• Memory
• Processors
• Interfaces
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FPGA Basics
• FPGA – programmable
• 3 primary programming methods
• RAM
• Volatile
• Must be loaded on power-up
• Most common
• Electrically erasable (flash)
• Non-volatile
• Expensive
• Fuse / Anti-fuse
• Non-volatile
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FPGA Basics
• FPGA – programmable
• JTAG Programming Configurations
• On power-up, the contents of the Configuration Flash Memory
(default program) are loaded into the Configuration RAM
• Flashing lights and numbers we see on power up
• Load programming information (xx.sof file) directly into the
Configuration RAM via the JTAG interface (Programmer)
• Our configuration is loaded
xx.sof file Configuration
SRAM Object File RAM
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FPGA Basics
• FPGA – programmable
• SRAM based
Switches
Src: Altera - PLDBasics_FPGA_Architecture
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FPGA Basics
• FPGA – programmable
• Switches are programmed (On or Off) by connecting their
control inputs to C-RAM bit cells
• Switch configurations
CTL from CRAM
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FPGA Basics
• FPGA – programmable
• Switches connect a series of horizontal and vertical wires
• Connect wires to logic block inputs/outputs
• Allow connections to span across the chip
• Switches connect VDD and Gnd to the inputs of gates to
force 1/0 inputs
VDD Wire Gnd Wire
• Switches connect external pins to block inputs/outputs
Input Pin Wire Wire Output Pin
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FPGA Basics
• Intel/Altera Max 10
ELE 3510 10 Src: MAX 10 Device Handbook © tj
FPGA Basics
• Xilinx Versal
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FPGA Basics
• Xilinx Zynq
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FPGA Basics
• Intel/Altera Stratix 10
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