SiS9446DN

[Link]
Vishay Siliconix
Dual N-Channel 40-V (D-S) MOSFET
FEATURES
PowerPAK® 1212-8 Dual
D1 • TrenchFET® Gen IV power MOSFET
D1 8
D2 7 • Fully lead (Pb)-free device
D2 6
5 • Optimized Qg, Qgd, and Qgd/Qgs ratio reduces
switching related power loss
• 100 % Rg and UIS tested
3.
• Material categorization: for definitions of
3 1 compliance please see [Link]/doc?99912
m 2 S
m
3 G 1
mm 4 S 1
1 3.3 2 APPLICATIONS D1 D2
G2
Top View Bottom View
• Synchronous rectification
• Load switch
PRODUCT SUMMARY G1 G2

VDS (V) 40 • Motor drive control

RDS(on) max. () at VGS = 10 V 0.012 • Battery management S1 S2

RDS(on) max. () at VGS = 4.5 V 0.017 N-Channel N-Channel

MOSFET MOSFET
Qg typ. (nC) 4.7
ID (A) a 34
Configuration Dual

ORDERING INFORMATION
Package PowerPAK 1212-8
Lead (Pb)-free and halogen-free SiS9446DN-T1-GE3

ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS 40
V
Gate-source voltage VGS +20 / -16
TC = 25 °C 34
TC = 70 °C 24
Continuous drain current (TJ = 150 °C) ID
TA = 25 °C 11.3 b, f
TA = 70 °C 9b
A
Pulsed drain current (t = 100 μs) IDM 60
TC = 25 °C 21
Continuous source-drain diode current IS
TA = 25 °C 2.4 b
Single pulse avalanche current IAS 13
L = 0.1 mH
Single pulse avalanche energy EAS 8.2 mJ
TC = 25 °C 23
TC = 70 °C 13
Maximum power dissipation PD W
TA = 25 °C 2.6 b, f
TA =70 °C 1.7b, f

Operating junction and storage temperature range TJ, Tstg -55 to +150
°C
Soldering recommendations (peak temperature) c 260

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYPICAL MAXIMUM UNIT
Maximum junction-to-ambient b, e t  10 s RthJA 38 48
°C/W
Maximum junction-to-case (drain) Steady state RthJC 4.3 5.4
Notes
a. TC = 25 °C
b. Surface mounted on 1" x 1" FR4 board
c. See solder profile ([Link]/doc?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection
d. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
e. Maximum under steady state conditions is 94 °C / W
f. t = 10 s

S23-0274-Rev. A, 01-May-2023 1 Document Number: 62242

For technical questions, contact: pmostechsupport@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 SiS9446DN
[Link]
Vishay Siliconix

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA 40 - - V
VDS temperature coefficient VDS/TJ ID = 250 μA - 26 -
mV/°C
VGS(th) temperature coefficient VGS(th)/TJ ID = 250 μA - -4.5 -
Gate-source threshold voltage VGS(th) VDS = VGS, ID = 250 μA 1.1 - 2.3 V
Gate-source leakage IGSS VDS = 0 V, VGS = +20 / -16 V - - ± 100 nA
VDS = 40 V, VGS = 0 V - - 1
Zero gate voltage drain current IDSS μA
VDS = 40 V, VGS = 0 V, TJ = 70 °C - - 10
VGS = 10 V, ID = 10 A - 0.0098 0.0012
Drain-source on-state resistance a RDS(on) 
VGS = 4.5 V, ID = 5 A - 0.0137 0.017
Forward transconductance a gfs VDS = 10 V, ID = 20 A - 40 - S
Dynamic b
Input capacitance Ciss - 720 -
Output capacitance Coss VDS = 20 V, VGS = 0 V, f = 1 MHz - 160 - pF
Reverse transfer capacitance Crss - 19 -
VDS = 20 V, VGS = 10 V, ID = 10 A - 10.2 16
Total gate charge Qg
- 4.7 7.1
nC
Gate-source charge Qgs VDS = 20 V, VGS = 4.5 V, ID = 10 A - 2.7 -
Gate-drain charge Qgd - 0.7 -
Gate resistance Rg f = 1 MHz 0.6 3 6 
Turn-on delay time td(on) - 10 20
Rise time tr VDD = 20 V, RL = 2 , ID  10 A, - 5 10
Turn-off delay time td(off) VGEN = 10 V, Rg = 1  - 15 30
Fall time tf - 5 10
ns
Turn-on delay time td(on) - 14 30
Rise time tr VDD = 20 V, RL = 2 , ID  10 A, - 90 180
Turn-off delay time td(off) VGEN = 4.5 V, Rg = 1  - 13 30
Fall time tf - 6 15
Drain-Source Body Diode Characteristics
Continuous source-drain diode current IS TC = 25 °C - - 21
A
Pulse diode forward current ISM - - 60
Body diode voltage VSD IS = 5 A, VGS = 0 V - 0.85 1.1 V
Body diode reverse recovery time trr - 13 30 ns
Body diode reverse recovery charge Qrr - 5 10 nC
IF = 10 A, dI/dt = 100 A/μs, TJ = 25 °C
Reverse recovery fall time ta - 5 -
ns
Reverse recovery rise time tb - 8 -
Notes
a. Pulse test; pulse width  300 μs, duty cycle  2 %
b. Guaranteed by design, not subject to production testing

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.

S23-0274-Rev. A, 01-May-2023 2 Document Number: 62242

For technical questions, contact: pmostechsupport@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 SiS9446DN
[Link]
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Axis Title Axis Title

60 10000 60 10000
VGS = 10 V thru 5 V

50 VGS = 4 V 50
ID - Drain Current (A)

ID - Drain Current (A)

40 1000 40 1000

2nd line
2nd line

1st line
1st line

2nd line
2nd line

30 30 TC = 25 °C

20 100 20 100

10 VGS = 3 V
10 TC = 125 °C
TC = -55 °C
0 10 0 10
0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5
VDS - Drain-to-Source Voltage (V) VGS - Gate-to-Source Voltage (V)

Output Characteristics Transfer Characteristics

Axis Title Axis Title

0.025 10000 1000 10000
Ciss

0.020
RDS(on) - On-Resistance (Ω)

C - Capacitance (pF)

VGS = 4.5 V 1000 1000

0.015
2nd line

2nd line
1st line

1st line
2nd line
2nd line

Coss
100
0.010
100 100
VGS = 10 V
0.005 Crss

0 10 10 10
0 10 20 30 40 50 60 0 5 10 15 20 25 30
ID - Drain Current (A) VDS - Drain-to-Source Voltage (V)

On-Resistance vs. Drain Current and Gate Voltage Capacitance

Axis Title Axis Title

10 10000 1.8 10000
ID = 10 A
RDS(on) - On-Resistance (Normalized)
VGS - Gate-to-Source Voltage (V)

VDS = 20 V
1.6 VGS = 10 V
8 ID = 10A

1000 1.4 1000

6
2nd line

2nd line
1st line

1st line
2nd line

VDS = 10 V
2nd line

VDS = 32 V
1.2 VGS = 4.5 V

4
100 1.0 100

2
0.8

0 10 0.6 10
0 3 6 9 12 -50 -25 0 25 50 75 100 125 150
Qg - Total Gate Charge (nC) TJ - Junction Temperature (°C)

Gate Charge On-Resistance vs. Junction Temperature

S23-0274-Rev. A, 01-May-2023 3 Document Number: 62242

For technical questions, contact: pmostechsupport@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 SiS9446DN
[Link]
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Axis Title Axis Title

100 10000 2.0 10000

1.8
10 TJ = 150 °C
IS - Source Current (A)

VGS(th) (V)
2nd line
1000 1000
1.6 ID = 250 μA

2nd line

2nd line
1st line

1st line
2nd line

TJ = 25 °C
1
1.4
100 100
0.1
1.2

0.01 10 1.0 10
0 0.2 0.4 0.6 0.8 1.0 -50 -25 0 25 50 75 100 125 150
VSD - Source-to-Drain Voltage (V) TJ - Junction Temperature (°C)

Source-Drain Diode Forward Voltage Threshold Voltage

Axis Title Axis Title

0.04 10000 50 10000

40
RDS(on) - On-Resistance (Ω)

0.03
1000 1000
P - Power (W)

30
2nd line

2nd line
2nd line
1st line

1st line
2nd line

0.02
TJ = 125 °C
20
100 100
0.01
10
TJ = 25 °C

0 10 0 10
0 2 4 6 8 10 0.001 0.01 0.1 1 10 100 1000
VGS - Gate-to-Source Voltage (V) t - Time (s)

On-Resistance vs. Gate-to-Source Voltage Single Pulse Power, Junction-to-Ambient

Limited by RDS(on) a Axis Title IDM limited

100 10000
ID(ON) limited

10 100 μs
ID - Drain Current (A)

1000
2nd line
1st line
2nd line

1 1 ms

10 ms
100
100 ms
0.1 TA= 25 °C, 1s
single pulse
10 s
DC
BVDSS limited
0.01 10
0.1 1 10 100
VDS - Drain-to-Source Voltage (V)

Safe Operating Area, Junction-to-Ambient

Note
a. VGS > minimum VGS at which RDS(on) is specified

S23-0274-Rev. A, 01-May-2023 4 Document Number: 62242

For technical questions, contact: pmostechsupport@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 SiS9446DN
[Link]
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Axis Title Axis Title

40 10000 30 10000

25
30
ID - Drain Current (A)

1000 20 1000

P - Power (W)
2nd line

2nd line
1st line

1st line
2nd line

2nd line
20 15

100 10 100
10
5

0 10 0 10
0 25 50 75 100 125 150 0 25 50 75 100 125 150
TC - Case Temperature (°C) TC - Case Temperature (°C)

Current Derating a Power, Junction-to-Case

Note
a. The power dissipation PD is based on TJ max. = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the
package limit.

S23-0274-Rev. A, 01-May-2023 5 Document Number: 62242

For technical questions, contact: pmostechsupport@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 SiS9446DN
[Link]
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Axis Title
1 10000
Duty cycle = 0.5
Normalized Effective Transient

0.2 Notes
Thermal Impedance

1000
PDM

2nd line
1st line
0.1
0.1
0.05 t1
t2
t1 100
1. Duty cycle, D = t
0.02 2

2. Per unit base = RthJA = 94 °C/W

3. TJM - TA = PDMZthJA (t)

Single pulse 4. Surface mounted

0.01 10
0.0001 0.001 0.01 0.1 1 10 100 1000
Square Wave Pulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Ambient

Axis Title
1 10000
Duty cycle = 0.5
Normalized Effective Transient

0.2
Thermal Impedance

0.1 1000

2nd line
1st line
0.05
0.1
0.02
Single pulse
100

0.01 10
0.0001 0.001 0.01 0.1
Square Wave Pulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Case

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see [Link]/ppg?62242.

S23-0274-Rev. A, 01-May-2023 6 Document Number: 62242

For technical questions, contact: pmostechsupport@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
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Revision: 01-Jan-2023 1 Document Number: 91000