Birla Institute of Technology and Science, Pilani

II semester 2017-2018
EEE F341 /INSTR F341 Analog Electronics
Comprehensive Exam (Closed Book)
Date: 07/05/2018 Duration: 100 minutes M.M.: 60

There are Four questions. Answer all sub-parts of a question at one place.
Note: Assume Op-Amp to be ideal and Vsat=±12 V until or unless
specifically mentioned.
____________________________________________________________________________________
_
Q.1 (a) Design a multirange voltmeter using V-I converter to have 2 M input
impedance and can measure 0-100 mV, 0-10V and 0-100 V. Use PMMC to
show the output assume full scale deflection as 100 A and meter resistance
as 10 K. Extend the design to measure same range AC voltages (RMS) also
using only half wave rectifier at suitable place. [9M]
Q.1 (b) Draw transfer characteristic for the circuits (Vsat= ± 12 V).
[6M]

3.0 KW 3.0 KW

1.0 KW 1.0 KW
+ -
Vi Vi
- Vo + Vo

1.0 V 1.0 V

Circuit (a) Circuit (b)

E
A R
-
Vs R1 + Vo1
K

R2
Vo2

Q.2 (b) Sketch and label Vo for the given circuit if given input is applied.
[8M]
Vin(V) +7.5 V R C=1.0 mF
+5
2R
Vin 10.0 KW
-
t(ms) -
1.0 2.0 3.0 + Vo
Vz=5.0 V 2R
Vin
+ Vo
-5 R

Input Circuit (a) Circuit (b)

P.T.O.

=16
Q.3 (a) For the given circuit, find S V, RO, V
VO. Implement current limit for i L(max) =
100mA. Also find power dissipation
through Q1 and zener diode when
maximum current is being drawn.
( β Q 1=50, βQ 2=100,r z=10Ω , V BE =0.7 V , i
gnore rx,rΠ )
[8M]

Q.3 (b) Design an astable free running multivibrator using opamp to generate
10kHz frequency having 40% duty cycle (T H/T). Use β = 0.1, C = 10nF and V sat
= ±10V. [7M]

Q.4 (a) i) Sketch and label transfer characteristics for circuits (a) and (b) shown
below.
( V CE ≈ 0, V BE =0.5 V , β=40 for all transistors)

Circuit (a) Circuit (b)

ii) In circuit (b), assume junction areas of Q1 and Q2 are double of the
biasing diodes and biasing diodes require minimum of 1mA current.
 Find Quiescent current and quiescent power dissipation of the output
transistor. [3+3=6M]
Q.4 (b) A tuned intermediate frequency (IF) amplifier for FM is to be designed
using two synchronous tuned stages with central frequency of 10MHz. Find-
i) The required bandwidth of single stage to produce overall bandwidth of
200KHz.
ii) Use a 3µH inductance and find R, C for each stage.
iii) Suggest a suitable circuit to avoid output-input coupling of tank
circuits. [2+3+1=6M]
Q.4 (c) An 8-bit ADC uses 6.4 V as reference voltage. Find-
i) Full scale range,
ii) Analog voltage corresponding to 00010111,
iii) Same analog voltage calculated in (ii) is to be converted using dual
slope integrator having R=40kΩ and C=0.1µF. If the integrator is
connected to analog voltage for 10ms, then find the peak voltage
across integrator output. [2+2+2=6M]
**********End**********