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Code reordering, also known as instruction scheduling 2, is a
technique used to optimize the execution of a program and avoid
data hazards in a MIPS processor1. It involves rearranging the
sequence of instructions to minimize pipeline stalls while preserving
the functionality of the code3.
Here's how it works:
1.Identifying Dependencies: The first step in code reordering
is to identify the data dependencies between instructions 3. An
instruction is dependent on an earlier one if it uses a value
computed by the earlier instruction3. The order of these
dependent instructions must not be reversed3.
2.Reordering Instructions: Once the dependencies are
identified, the instructions can be reordered to minimize
pipeline stalls2. This is done by moving independent
instructions into the delay slots of dependent instructions 2.
3.Preserving Functionality: It's crucial that the reordering of
instructions does not change the overall functionality of the
program3. Therefore, only independent instructions
(instructions that do not affect each other) can be swapped 3.
4.Compiler's Role: The task of reordering instructions is mainly
performed by the compiler during the code optimization
phase1. The compiler must respect the restrictions when
dealing with hardware and low-level drivers, so it will not
reorder instructions or keep variables in CPU registers without
updating SFR registers1.
Remember, code reordering is a powerful technique for optimizing
program execution, but it must be done carefully to ensure that the
functionality of the program is preserved3. Also, it's worth noting
that code reordering is most effective when combined with other
techniques like forwarding and stall insertion2.
Source(s)
1. Placing NOPs in order to ensure no RAW Data hazard in MIPS assembly ...
2. PIC32 MIPS archetecture and memory/instructions reordering
3. Part C - cl.cam.ac.uk
4. https://www.mips.com/prod...rchitectures/mips32-2/