Verilog Operators and Expressions Guide

The document is a Verilog assignment focused on operators, including conditional assignments, equality operators, and bitwise operations. It poses questions about the differences between certain expressions, evaluates specific Verilog expressions with given inputs, and asks for simplified Boolean equations. Additionally, it requires the evaluation of various expressions based on defined values of variables a, b, and c.

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Verilog Operators and Expressions Guide

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Ruturaj Nakum

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VERILOG OPERATORS

eInfochips Training and Research Academy [eiTRA]

Verilog assignment
Operators: Level 0
Q1. What is the difference between (a) and (b)
(a) c = foo ? a : b;
(b) if (foo) c = a; else c = b;
Q2. Explain the difference between the == and === operators.
Q3. Give the result of each Verilog expression (in binary) for the following inputs:
A = 4b’1001, B = 5b’10010, and C = 5b’11010. Assume A is a 4-bit wire and B and C are each 5-
bit wires.
Show your results using Verilog notation, such as 3b’101. A=3’b001, B=3’b010, C=3’b010
A & (B | C);
^ B;
(A < B) ? A : B;
Q4. Give a simplified Boolean equation that is equivalent to the following Verilog statement,
assuming that a, b, c and z are each one-bit wires:
assign z = c ? (a ? b : c) : b;
Q5. Given values of a, b, and c as shown, write the result of expressions shown below.
Assume: a is [3:0], b is [3:0], c is [5:0]
Assume: a = 4'b0010 , b = 4'b1010 , c = 6'b001101
Evaluate the following expressions:
a&b=? a || b = ?
a && b = ? a|b=?
a+b= ? a=c,a=?
c = b, c = ? a-b=?
&b = ? |a=?

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Verilog Operators and Expressions Guide

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Verilog Operators and Expressions Guide

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VERILOG OPERATORS

eInfochips Training and Research Academy [eiTRA]

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