Running head: Section 1 – Investigation of Analogue Circuits 1

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Section 1 – Investigation of Analogue Circuits 2

LAB EXPERIMENT 1: Verification of Circuit Analysis Methods

1) MESH ANALYSIS
The circuit to be analyzed is as shown in the figure below:

Assuming the currents in both loops to be flowing in the clockwise direction and applying
Kirchhoff’s voltage law, we have:
1st Loop
-20=5i1+8(i1-i2)-2
-20=5i1+8i1-8i2-2
-20=13i1-8i2-2
-18=13i1-8i2
13i1-8i2=-18 ---------------------------------- (i)

2nd Loop
-5=2i2+2+8(i2-i1)
-7=2i2+8i2-8i1
-7=-8i1+10i2
-8i1+10i2=-7 ---------------------------------------- (ii)
There are two simultaneous equations with two unknowns which can be summarized in matrix
form as follows:

[−813 −810 ][ ii ]=[−18

1

2
−7 ]

The two simultaneous equations are solved using MATLAB software as follows:
Section 1 – Investigation of Analogue Circuits 3

>> A=[13 -8; -8 10]

A=

13 -8
-8 10

>> B=[-18;-7]

B=

-18
-7

>> A\B

ans =

-3.5758
-3.5606

i1=-3.5758A, i2=3.5606A

The currents in both loops are flowing in the counter clockwise direction:
The current flowing in the middle branch is the difference of the two currents and is flowing
upwards.

iR2=3.5758-3.5606
= 0.0152A

2) NODAL ANALYSIS
There is only a single node located at the top of the middle branch. Assuming the voltage at this
node to be equal to V1 and applying Kirchhoff’s current law (KCL) we have:
−20−V 1 V 1+ 2 V 1−5
= +
5 8 2
The LCM of the equation is 40. The equation simplifies to:
8 (−20−V 1 )=5 ( V 1+2 )+20 (V 1−5)
−160−8 V 1=5V 1+10+20 V 1−100
−160+100−10=33 V 1
Section 1 – Investigation of Analogue Circuits 4

−70=33V 1
−70
V 1= =¿ -2.1212V
33

The current flowing through the resistor R1 is:

−20−−2,1212 −17.8788
I ( R 1 )= = =−¿3.5758A
5 5

The current flowing through the resistor R2 is equal to:

(V 1+2) −2.1212+ 2 −0.1212
I ( R 2 )= = = =−0.0152 A
8 8 8
The current flowing through the resistor R3 is equal to:
V 1−5 −2.1212−5 −7.1212
I ( R 3) = = = =¿ -3.5606A
2 2 2

3) LTSPICE SIMULATION
The circuit is constructed in LTSPICE as shown in the figure below:

The simulation results are s shown in the diagram below:

Section 1 – Investigation of Analogue Circuits 5

RESULTS COMPARISON
The current flowing through the resistor determined by the three techniques are summarized in
the table below:
Current Mesh analysis Nodal Analysis LTSPICE SIMULTION
I(R1) 3.5758A 3.5758A 3.57576A
I(R2) 0.0152A 0.0152A 0.0151515A
I(R3) 3.5606A 3.5606A 3.56061A

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LAB EXPERIMENT 2: Verification of the Thevenin’s Theorem

The Thevenin equivalent of the circuit shown in the figure below is to be determined:

Thevenin resistance is determine by shorting all the voltage sources and opening all the current
sources:
Section 1 – Investigation of Analogue Circuits 6

Thevenin equivalent resistance is calculated as:

10∗4 40
10∨¿ 4= = =2.8571
10+4 14
5∗2.8571
RTH =20+5∨¿ 2.8571=20+
5+2.8571
RTH =20+1.8182=21.8182 Ω

Thevenin Equivalent voltage is calculated as:

V TH =−3.6363 V

Assuming the resistance Rs to be equal to 5Ω, the current flowing through it is:

−3.6363 −3.6363
I s= = =−0.13556 A
21.8182+5 26.8182
LTSPICE SIMULATION RESULTS
The original circuit is constructed in LTSPICE as shown in the figure below:

The simulation results of the original circuit are shown in the figure below:
Section 1 – Investigation of Analogue Circuits 7

Thevenin’s Equivalent circuit is constructed as shown in the figure below:

Simulation results of Thevenin equivalent circuit:

Section 1 – Investigation of Analogue Circuits 8

RESULTS COMPARISON
The table below is a summary of the simulation and the calculated value for the current:
Parameter Current (Is)
Calculated value (Is) 0.13556A
Original circuit (Is) 0.135593A
Thevenin equivalent circuit (Is) 0.135591A

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LAB EXPERIMENT 3: Common-collector Amplifier (Emitter Follower)
Part 1

The circuit is constructed in LTspice as shown in the figure below:

Section 1 – Investigation of Analogue Circuits 9

The input and the output voltages from the simulator are as shown in the figure below:
Section 1 – Investigation of Analogue Circuits 10

The input peak to peak voltage is:

VP−P=1.5−−1.5=3 V
The output peak to peak voltage is:
Vp-p=8.12V-5.03V
=3.09V

V out p− p 3.09 V
Gain= = =1.03
V ¿ p− p 3V

The input and the output current waveforms are shown in the figure below:
Section 1 – Investigation of Analogue Circuits 11

The peak to peak output current is:

I L p− p=100 uA−−100 uA=200 uA

The input peak to peak current is:

I ¿ p− p=20 uA−−20 uA=40 uA

The current gain of the common collector amplifier is:

I L p− p
Current gain=
I ¿ p− p
200uA
¿ =5
40 uA
Section 1 – Investigation of Analogue Circuits 12

Summary of the results

The measured and simulated current and voltage gains of the common collector amplifier are
summarized in the table below:

Parameter Measure value Simulated value

Voltage gain 0.9861 1.03
Current gain 4.975 5

The measured values were found to be closely equal to the calculated values.

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LAB EXPERIMENT 4: Common-Emitter Amplifier

The common emitter amplifier is as shown in the figure below:

Part 1: Calculation of the DC values

Section 1 – Investigation of Analogue Circuits 13

The base resistance is equal to:

R B=R 1∨¿ R 2

82∗8.2 672.4
¿ = =7.4545 k Ω
82+8.2 90.2
The voltage at the base VB is calculated as:
R2
V B= ∗VCC
R 1+ R 2
8.2
¿ ∗15=1.3636 V
8.2+82
The voltage VE is calculated as:
V E=V B−V BE

¿ 1.3636 V −0.7 V
¿ 0.6636 V
The current flowing through the emitter terminal is:
V E 0.6636 V
I E= = =0.9759 mA
R E 0.68 k Ω
Section 1 – Investigation of Analogue Circuits 14

The current flowing through the base is:

V B 1.3636V −0.7 V
IB= = =0. 08902 mA
RB 7.4545 k Ω

The current flowing through the collector Ic is calculated as:

I C =I E −I B

¿ 0.9759 mA −0.08902 mA
¿ 0.8866 mA
The voltage at the collector termina VC is calculated as:
V C =V CC−I C R C

¿ 15−0.8866∗6.8
¿ 8.97112V
The voltage between the collector and the emitter terminal VCE is:
V CE =V C −V E

¿ 8.97112V −0.6636 V
¿ 8.30752 V
The DC operating point of the transistor is (ICQ,VCEQ)=(0.8866mA,8.30752V)

Part 2 and 3
I choose the load resistor to be equal to 15kΩ. The AC gain of the transistor is calculated as:
V out Δ V L
Voltage gain= =
V¿ ΔVB
−RL −15 k
¿ =
RE 7.4545∗0.08902
0.68 k +
0.9759
¿ 11.0554
Section 1 – Investigation of Analogue Circuits 15

Part 4 to part 7
The circuit was built in LTSPICE as shown in the figure below:

The measured CDC operating point of the transistor is as shown in the figure below:
Section 1 – Investigation of Analogue Circuits 16

The input and the output volage in the common collector amplifier are as shown in the figure
below:

Gain= Vout pk-pk/Vinpk-pk

=(2.055- -1.814)/(_0.3—0.3)
=3.869/0.6
=6.4483
Section 1 – Investigation of Analogue Circuits 17

Summary of the results

i) DC operating point
The table below is a summary of the DC calculated and simulated values:
Parameter Calculated value Simulated value
VB 1.3636V 1.34017V
VE 0.6636V 0.686375V
IE 0.9759mA 1.00938mA
IC 0.8866mA 1.00623mA
VC 8.97112V 8.15765V

The voltage gains the different frequencies are summarized in the table below:
Source frequency Measured gain
10Hz 8.9761
100Hz 7.683
1kHz 7.5677
10kHz 6.9001
100kHz 3.1076
1MHz 2.7896
10MHz 1.8976
100MHz 1.2372

The gain bandwidth product for any amplifier is constant. Increasing the frequency reduced the
gain of the amplifier.
Section 1 – Investigation of Analogue Circuits 18