R 1 egister Transfer & -operations Organization

REGISTER TRANSFER AND MICROOPERATIONS

Register Transfer Language Register Transfer Bus and Memory Transfers Arithmetic Microoperations Logic Microoperations Shift Microoperations Arithmetic Logic Shift Unit

R 2 egister Transfer & -operations Organization

SIMPLE DIGITAL SYSTEMS

Combinational and sequential circuits (learned in Chapters 1 and 2) can be used to create simple digital systems.
These are the low-level building blocks of a digital computer. Simple digital systems are frequently characterized in terms of
the registers they contain, and the operations that they perform.

Typically,
What operations are performed on the data in the registers What information is passed between registers

R 3 egister Transfer & -operations Organization

Register Transfer Language

MICROOPERATIONS (1)
The operations on the data in registers are called microoperations. The functions built into registers are examples of microoperations
Shift Load Clear Increment

R 4 egister Transfer & -operations Organization

Register Transfer Language

MICROOPERATION (2)
An elementary operation performed (during one clock pulse), on the information stored in one or more registers

Registers (R)

ALU (f)

1 clock cycle

R f(R, R) f: shift, load, clear, increment, add, subtract, complement, and, or, xor,

R 5 egister Transfer & -operations Organization

Register Transfer Language

ORGANIZATION OF A DIGITAL SYSTEM

Definition of the (internal) organization of a computer

- Set of registers and their functions

- Microoperations set Set of allowable microoperations provided by the organization of the computer - Control signals that initiate the sequence of microoperations (to perform the functions)

R 6 egister Transfer & -operations Organization

Register Transfer Language

REGISTER TRANSFER LEVEL

Viewing a computer, or any digital system, in this way is called the register transfer level This is because were focusing on
The systems registers The data transformations in them, and The data transfers between them.

R 7 egister Transfer & -operations Organization

Register Transfer Language

REGISTER TRANSFER LANGUAGE

Rather than specifying a digital system in words, a specific notation is used, register transfer language
For any function of the computer, the register transfer language can be used to describe the (sequence of) microoperations Register transfer language
A symbolic language A convenient tool for describing the internal organization of digital computers Can also be used to facilitate the design process of digital systems.

R 8 egister Transfer & -operations Organization

Register Transfer Language

DESIGNATION OF REGISTERS
Registers are designated by capital letters, sometimes followed by numbers (e.g., A, R13, IR) Often the names indicate function:
MAR PC IR - memory address register - program counter - instruction register

Registers and their contents can be viewed and represented in various ways
A register can be viewed as a single entity: MAR Registers may also be represented showing the bits of data they contain

R 9 egister Transfer & -operations Organization

Register Transfer Language

DESIGNATION OF REGISTERS
Designation of a register - a register - portion of a register - a bit of a register

Common ways of drawing the block diagram of a register

Register Showing individual bits

R1
15 0 15

4
8 7

0
0

R2
Numbering of bits

PC(H)
Subfields

PC(L)

Register Transfer & -operations 10 Organization

Register Transfer

REGISTER TRANSFER
Copying the contents of one register to another is a register transfer
A register transfer is indicated as
R2 R1
In this case the contents of register R2 are copied (loaded) into register R1 A simultaneous transfer of all bits from the source R1 to the destination register R2, during one clock pulse Note that this is a non-destructive; i.e. the contents of R1 are not altered by copying (loading) them to R2

Register Transfer & -operations 11 Organization

Register Transfer

REGISTER TRANSFER
A register transfer such as
R3 R5 Implies that the digital system has the data lines from the source register (R5) to the destination register (R3) Parallel load in the destination register (R3) Control lines to perform the action

Register Transfer & -operations 12 Organization

Register Transfer

CONTROL FUNCTIONS
Often actions need to only occur if a certain condition is true This is similar to an if statement in a programming language In digital systems, this is often done via a control signal, called a control function
If the signal is 1, the action takes place

This is represented as:

P: R2 R1 Which means if P = 1, then load the contents of register R1 into register R2, i.e., if (P = 1) then (R2 R1)

Register Transfer & -operations 13 Organization

Register Transfer

HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS

Implementation of controlled transfer P: R2 R1

Block diagram

Control Circuit

Load

R2
n

Clock

R1

Timing diagram
Clock Load

t+1

Transfer occurs here

The same clock controls the circuits that generate the control function and the destination register Registers are assumed to use positive-edge-triggered flip-flops

Register Transfer & -operations 14 Organization

Register Transfer

SIMULTANEOUS OPERATIONS
If two or more operations are to occur simultaneously, they are separated with commas P: R3 R5, MAR IR Here, if the control function P = 1, load the contents of R5 into R3, and at the same time (clock), load the contents of register IR into register MAR

Register Transfer & -operations 15 Organization

Register Transfer

BASIC SYMBOLS FOR REGISTER TRANSFERS

Symbols

Description

Examples

Capital letters Denotes a register MAR, R2 & numerals Parentheses () Denotes a part of a register R2(0-7), R2(L) Arrow Denotes transfer of information R2 R1 Colon : Denotes termination of control function P: Comma , Separates two micro-operations A B, B A

Register Transfer & -operations 16 Organization

Register Transfer

CONNECTING REGISTERS
In a digital system with many registers, it is impractical to have data and control lines to directly allow each register to be loaded with the contents of every possible other registers To completely connect n registers n(n-1) lines O(n2) cost
This is not a realistic approach to use in a large digital system

Instead, take a different approach Have one centralized set of circuits for data transfer the bus Have control circuits to select which register is the source, and which is the destination

Register Transfer & -operations 17 Organization

Bus and Memory Transfers

BUS AND BUS TRANSFER

Bus is a path(of a group of wires) over which information is transferred, from any of several sources to any of several destinations.

From a register to bus: BUS R

Register A Register B Register C Register D

Bus lines

Register A 1 2 3 4

Register B 1 2 3 4

Register C 1 2 3 4

Register D 1 2 3 4

B1 C1 D 1 0 4 x1 MUX 0

B2 C2 D 2 4 x1 MUX 0

B3 C3 D 3 4 x1 MUX 0

B4 C4 D 4 4 x1 MUX

x select y

4-line bus

Register Transfer & -operations 18 Organization

Bus and Memory Transfers

TRANSFER FROM BUS TO A DESTINATION REGISTER

Bus lines Load

Reg. R0

Reg. R1

Reg. R2

Reg. R3

z Select w

D 0 D1 D2 D 3 2x4 Decoder

E (enable)

Three-State Bus Buffers

Normal input A Control input C Output Y=A if C=1 High-impedence if C=0

Bus line with three-state buffers

A0 B0 C0 D0 Select Enable S0 S1 0 1 2 3

Bus line for bit 0

Register Transfer & -operations 19 Organization

Bus and Memory Transfers

BUS TRANSFER IN RTL

Depending on whether the bus is to be mentioned explicitly or not, register transfer can be indicated as either R2 R1 or BUS R1, R2 BUS

In the former case the bus is implicit, but in the latter, it is explicitly indicated

Register Transfer & -operations 20 Organization

Bus and Memory Transfers

MEMORY (RAM)
Memory (RAM) can be thought as a sequential circuits containing some number of registers These registers hold the words of memory Each of the r registers is indicated by an address These addresses range from 0 to r-1 Each register (word) can hold n bits of data Assume the RAM contains r = 2k words. It needs the following
n data input lines n data output lines k address lines A Read control line A Write control line
data input lines n address lines k Read Write n data output lines

RAM unit

Register Transfer & -operations 21 Organization

Bus and Memory Transfers

MEMORY TRANSFER
Collectively, the memory is viewed at the register level as a device, M. Since it contains multiple locations, we must specify which address in memory we will be using This is done by indexing memory references Memory is usually accessed in computer systems by putting the desired address in a special register, the Memory Address Register (MAR, or AR) When memory is accessed, the contents of the MAR get sent to the memory units address lines
M
AR Memory unit Read Write Data in

Data out

Register Transfer & -operations 22 Organization

Bus and Memory Transfers

MEMORY READ

To read a value from a location in memory and load it into a register, the register transfer language notation looks like this: R1 M[MAR] This causes the following to occur
The contents of the MAR get sent to the memory address lines A Read (= 1) gets sent to the memory unit The contents of the specified address are put on the memorys output data lines These get sent over the bus to be loaded into register R1

Register Transfer & -operations 23 Organization

Bus and Memory Transfers

MEMORY WRITE

To write a value from a register to a location in memory looks like this in register transfer language: M[MAR] R1 This causes the following to occur
The contents of the MAR get sent to the memory address lines A Write (= 1) gets sent to the memory unit The values in register R1 get sent over the bus to the data input lines of the memory The values get loaded into the specified address in the memory

Register Transfer & -operations 24 Organization

Bus and Memory Transfers

SUMMARY OF R. TRANSFER MICROOPERATIONS

A B Transfer content of reg. B into reg. A Transfer content of AD portion of reg. DR into reg. AR Transfer a binary constant into reg. A Transfer content of R1 into bus A and, at the same time, transfer content of bus A into R2 Address register Data register Memory word specified by reg. R Equivalent to M[AR] Memory read operation: transfers content of memory word specified by AR into DR

DR(AD) A constant ABUS R1, R2 ABUS

AR AR DR M[R] M DR M

M DR

Memory write operation: transfers content of DR into memory word specified by AR

Register Transfer & -operations 25 Organization

Arithmetic Microoperations

MICROOPERATIONS

Computer system microoperations are of four types: - Register transfer microoperations - Arithmetic microoperations - Logic microoperations - Shift microoperations

Register Transfer & -operations 26 Organization

Arithmetic Microoperations

ARITHMETIC MICROOPERATIONS
The basic arithmetic microoperations are
Addition Subtraction Increment Decrement

The additional arithmetic microoperations are

Add with carry Subtract with borrow Transfer/Load etc.

Summary of Typical Arithmetic Micro-Operations

R3 R1 + R2 R3 R1 - R2 R2 R2 R2 R2+ 1 R3 R1 + R2+ 1 R1 R1 + 1 R1 R1 - 1 Contents of R1 plus R2 transferred to R3 Contents of R1 minus R2 transferred to R3 Complement the contents of R2 2's complement the contents of R2 (negate) subtraction Increment Decrement

Register Transfer & -operations 27 Organization

Arithmetic Microoperations

BINARY ADDER / SUBTRACTOR / INCREMENTER

B3 A3 FA C3 B2 FA A2 C2 B1 FA A1 C1 B0 FA A0 C0

Binary Adder

C4

S3
B3 A 3 B2

S2
A 2 B1

S1
A 1 B0

S0
A 0

Binary Adder-Subtractor
M

FA

C3

FA

C2

FA

C1

FA

C0

C4

S3
A 3

S2
A 2

S1
A 1

S0
A 0 1

Binary Incrementer

y S

y S

y S

y S

HA
C

HA
C

HA
C

HA
C

C4

S3

S2

S1

S0

Register Transfer & -operations 28 Organization

Arithmetic Microoperations

ARITHMETIC CIRCUIT
Cin S1 S0 A0 B0 S1 S0 0 4x1 1 MUX 2 3 S1 S0 0 4x1 1 MUX 2 3 S1 S0 0 4x1 1 MUX 2 3 S1 S0 0 4x1 1 MUX 2 3 X0 C0 D0 C1

FA
Y0

A1
B1

X1

C1

FA
Y1 C2

D1

A2 B2

X2

C2

FA
Y2 C3

D2

A3 B3

X3

C3

FA
Y3 C4

D3

Cout

S1 0 0 0 0 1 1 1 1

S0 0 0 1 1 0 0 1 1

Cin 0 1 0 1 0 1 0 1

Y B B B B 0 0 1 1

Output D=A+B D=A+B+1 D = A + B D = A + B+ 1 D=A D=A+1 D=A-1 D=A

Microoperation Add Add with carry Subtract with borrow Subtract Transfer A Increment A Decrement A Transfer A

Register Transfer & -operations 29 Organization

Logic Microoperations

LOGIC MICROOPERATIONS
Specify binary operations on the strings of bits in registers
Logic microoperations are bit-wise operations, i.e., they work on the individual bits of data useful for bit manipulations on binary data useful for making logical decisions based on the bit value

There are, in principle, 16 different logic functions that can be defined over two binary input variables
A 0 0 1 1 B F0 0 0 1 0 0 0 1 0 F1 0 0 0 1 F2 F13 0 1 0 1 1 0 0 1 F14 1 1 1 0 F15 1 1 1 1

However, most systems only implement four of these

AND (), OR (), XOR (), Complement/NOT

The others can be created from combination of these

Register Transfer & -operations 30 Organization

Logic Microoperations

LIST OF LOGIC MICROOPERATIONS

List of Logic Microoperations
- 16 different logic operations with 2 binary vars. n - n binary vars 2 2 functions

Truth tables for 16 functions of 2 variables and the corresponding 16 logic micro-operations
x 0011 y 0101 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Boolean Function F0 = 0 F1 = xy F2 = xy' F3 = x F4 = x'y F5 = y F6 = x y F7 = x + y F8 = (x + y)' F9 = (x y)' F10 = y' F11 = x + y' F12 = x' F13 = x' + y F14 = (xy)' F15 = 1 MicroName Operations F0 Clear FAB AND F A B FA Transfer A F A B FB Transfer B FAB Exclusive-OR FAB OR F A B) NOR F (A B) Exclusive-NOR F B Complement B F A B F A Complement A F A B F (A B) NAND F all 1's Set to all 1's

Register Transfer & -operations 31 Organization

Logic Microoperations

HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS

Ai Bi 0 1 2 3 Select S1 S0

4X1 MUX

Fi

Function table
S1 0 0 1 1 S0 0 1 0 1 Output F=AB F = AB F=AB F = A

-operation AND OR XOR Complement

Register Transfer & -operations 32 Organization

Logic Microoperations

APPLICATIONS OF LOGIC MICROOPERATIONS

Logic microoperations can be used to manipulate individual bits or a portions of a word in a register
Consider the data in a register A. In another register, B, is bit data that will be used to modify the contents of A
Selective-set Selective-complement Selective-clear Mask (Delete) Clear Insert Compare ... AA+B AAB A A B AAB AAB A (A B) + C AAB

Register Transfer & -operations 33 Organization

Logic Microoperations

SELECTIVE SET

In a selective set operation, the bit pattern in B is used to set certain bits in A 1100 1010 1110 At B At+1

(A A + B)

If a bit in B is set to 1, that same position in A gets set to 1, otherwise that bit in A keeps its previous value

Register Transfer & -operations 34 Organization

Logic Microoperations

SELECTIVE COMPLEMENT

In a selective complement operation, the bit pattern in B is used to complement certain bits in A 1100 1010 0110 At B At+1 (A A B)

If a bit in B is set to 1, that same position in A gets complemented from its original value, otherwise it is unchanged

Register Transfer & -operations 35 Organization

Logic Microoperations

SELECTIVE CLEAR

In a selective clear operation, the bit pattern in B is used to clear certain bits in A 1100 1010 0100 At B At+1 (A A B)

If a bit in B is set to 1, that same position in A gets set to 0, otherwise it is unchanged

Register Transfer & -operations 36 Organization

Logic Microoperations

MASK OPERATION

In a mask operation, the bit pattern in B is used to clear certain bits in A 1100 1010 1000 At B At+1 (A A B)

If a bit in B is set to 0, that same position in A gets set to 0, otherwise it is unchanged

Register Transfer & -operations 37 Organization

Logic Microoperations

CLEAR OPERATION

In a clear operation, if the bits in the same position in A and B are the same, they are cleared in A, otherwise they are set in A

1100 1010
0110

At B
At+1 (A A B)

Register Transfer & -operations 38 Organization

Logic Microoperations

INSERT OPERATION
An insert operation is used to introduce a specific bit pattern into A register, leaving the other bit positions unchanged This is done as
A mask operation to clear the desired bit positions, followed by An OR operation to introduce the new bits into the desired positions Example Suppose you wanted to introduce 1010 into the low order four bits of A: 1101 1000 1011 0001 A (Original) 1101 1000 1011 1010 A (Desired) 1101 1111 1101 0000 1101 1000 1111 1000 0000 1000 1011 1111 1011 0000 1011 0001 0000 0000 1010 1010 A (Original) Mask A (Intermediate) Added bits A (Desired)

Register Transfer & -operations 39 Organization

Shift Microoperations

SHIFT MICROOPERATIONS
There are three types of shifts
Logical shift Circular shift Arithmetic shift

What differentiates them is the information that goes into the serial input
A right shift operation
Serial input

A left shift operation

Serial input

Register Transfer & -operations 40 Organization

Shift Microoperations

LOGICAL SHIFT
In a logical shift the serial input to the shift is a 0. A right logical shift operation:
0

A left logical shift operation:

0

In a Register Transfer Language, the following notation is used

shl for a logical shift left shr for a logical shift right Examples: R2 shr R2 R3 shl R3

Register Transfer & -operations 41 Organization

Shift Microoperations

CIRCULAR SHIFT
In a circular shift the serial input is the bit that is shifted out of the other end of the register. A right circular shift operation:

A left circular shift operation:

In a RTL, the following notation is used

cil for a circular shift left cir for a circular shift right Examples: R2 cir R2 R3 cil R3

Register Transfer & -operations 42 Organization

Shift Microoperations

ARITHMETIC SHIFT
An arithmetic shift is meant for signed binary numbers (integer) An arithmetic left shift multiplies a signed number by two An arithmetic right shift divides a signed number by two The main distinction of an arithmetic shift is that it must keep the sign of the number the same as it performs the multiplication or division A right arithmetic shift operation:
sign bit

A left arithmetic shift operation:

0
sign bit

Register Transfer & -operations 43 Organization

Shift Microoperations

ARITHMETIC SHIFT
An left arithmetic shift operation must be checked for the overflow
0
sign bit

Before the shift, if the leftmost two bits differ, the shift will result in an overflow

In a RTL, the following notation is used

ashl for an arithmetic shift left ashr for an arithmetic shift right Examples: R2 ashr R2 R3 ashl R3

Register Transfer & -operations 44 Organization

Shift Microoperations

HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS

Serial input (IR)

0 for shift right (down) Select 1 for shift left (up)

S 0 1 A0 A1 A2 S 0 1 MUX

H0

MUX

H1

A3

0 1

MUX

H2

S 0 1 Serial input (IL) MUX

H3

Register Transfer & -operations 45 Organization

Shift Microoperations

ARITHMETIC LOGIC SHIFT UNIT

S3 S2 S1 S0 Ci

Arithmetic D i Circuit
Select Ci+1 0 1 2 3 Ei shr shl

4x1 MUX

Fi

Bi Ai Ai-1 Ai+1

Logic Circuit

S3 0 0 0 0 0 0 0 0 0 0 0 0 1 1

S2 0 0 0 0 0 0 0 0 1 1 1 1 0 1

S1 S0 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 1 1 0 1 1 X X X X

Cin 0 1 0 1 0 1 0 1 X X X X X X

Operation F = A+B F = A +B+1 F = A + B F=A+B+1 F=A F=A+1 F=A-1 F=A F=AB F = A B F=AB F = A F = shr A F = shl A

Function Addition Add with carry Subtract with borrow Subtraction Transfer A Increment A Decrement A TransferA AND OR XOR Complement A Shift right A into F Shift left A into F