DEPT.
OF ELECTRICAL & ELECTRONICS ENGINEERING
SRM INSTITUTE OF SCIENCE AND TECHNOLOGY, Kattankulathur – 603203.
Title of Experiment : Reduction of Boolean expression using
K-map
Name of the candidate :K.SANTHOSH KUMAR
Register Number RA2011050010097
Date of Experiment : 29/01/2021
Sl. Marks Split up Maximum marks Marks obtained
No. (50)
1 Pre Lab questions 5
2 Preparation of observation 15
3 Execution of experiment 15
4 Calculation / Evaluation of Result 10
5 Post Lab questions 5
Total 50
Staff Signature
Experiment No. Reduction of Logic Expression using
Date :
Karnaugh map (K- Map)
Aim: To simply and verify the Boolean expression using K-map.
Apparatus: Logic trainer kit, logic gates / ICs, wires.
Theory:
Karnaugh maps: Karnaugh maps or K-maps for short, provide another means of simplifying
and optimizing logical expressions. This is a graphical technique that utilizes a sum of product
(SOP) form. SOP forms combine terms that have been ANDed together that then get ORed
together. This format lends itself to the use of De Morgan's law which allows the final result to
be built with only NAND gates. The K-map is best used with logical functions with four or less
input variables. One of the advantages of using K-maps for reduction is that it is easier to see
when a circuit has been fully simplified. Another advantage is that using K-maps leads to a
more structured process for minimization. In order to use a K-map, the truth table for a logical
expression is transferred to a K-map grid. The grid for two, three, and four input expressions are
provided in the tables below. Each cell corresponds to one row in a truth table or one given state
in the logical expression. The order of the items in the grid is not random at all; they are set so
that any adjacent cell differs in value by the change in only one variable. Because of this, items
can be grouped together easily in rectangular blocks of two, four, and eight to find the minimal
number of groupings that can cover the entire expression. Note that diagonal cells require that the
value of more than two inputs change, and that they also do not form rectangles.
A'B’ A’B AB AB’ A’ A
00 01 11 10 0 1
C’ B’
0 0
B
C 1
1
Figure 1. Three variables K Map Figure 2. Two variables K- Map
Given expression
F(C, A, B) = CAB + C'AB + CA'B + C'A'B
Simplification Using Boolean Properties
CAB + C'AB + CA'B + C'A'B = AB(C + C') + A'B(C + C') Distributive Property
= AB + A'B C + C' is always true
= (A + A') B Distributive Property
=B A + A' is always true
Simplification using K- Map
Procedure:
1. Connect the trainer kit to ac power supply.
2. Connect the circuit based on the given logic functions to be simplified.
3. Connect the inputs of first stage to logic sources and output of the last gate to logic
indicator.
4. Apply various input combinations and observe output for each one.
5. Verify the output before and after reducing the expression.
6. Switch off the ac power supply.
Simulation Diagram:
Simulation Output:
A B C Y
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1
Simulation diagram:
Result: The Boolean values of K-Map were verified via logic gates
