Global Journal of Computer Science and Technology: C

Software & Data Engineering

Volume 14 Issue 8 Version 1.0 Year 2014
Type: Double Blind Peer Reviewed International Research Journal
Publisher: Global Journals Inc. (USA)
Online ISSN: 0975-4172 & Print ISSN: 0975-4350

Data Link Layer Designing Issues: Error Control—A Roadmap

By Monika Singh & Ruhi Saxena
Mody University, India
Abstract- Different networks are used to transfer data from one device to another with acceptable
accuracy. For most applications, a system must guarantee that the data received are identical to the
data transmitted. Transmission media are most error-prone link. In a network, the capacity of nodes
is different and the rate at which the sender is sending data might not be the same rate at which the
receiver accepts it. In this paper, we discuss on designing issues of data link layer. The primary focus
ison various error detecting and controlling mechanisms.
Keywords: error detection, LRC, VRC, CRC, checksum.
GJCST-C Classification : C.2.5 C.2.6

DataLinkLayerDesigningIssuesErrorControlARoadmap

Strictly as per the compliance and regulations of:

© 2014. Monika Singh & Ruhi Saxena. This is a research/review paper, distributed under the terms of the Creative Commons
Attribution-Noncommercial 3.0 Unported License [Link] permitting all non-commercial use,
distribution, and reproduction inany medium, provided the original work is properly cited.
 Data Link Layer Designing Issues: Error
Control—A Roadmap
Monika Singh α & Ruhi Saxena σ

Abstract- Different networks are used to transfer data from d) Error Control
one device to another with acceptable accuracy. For most Sometimes signals may have encountered

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applications, a system must guarantee that the data received problem in transition and bits are flipped. These errors
are identical to the data transmitted. Transmission media are are detected and attempted to recover actual data bits.
most error-prone link. In a network, the capacity of nodes is
It also provides error reporting mechanism to the
different and the rate at which the sender is sending data
might not be the same rate at which the receiver accepts it. In sender.
1
this paper, we discuss on designing issues of data link layer. e) Flow Control
The primary focus ison various error detecting and controlling Stations on same link may have different speed

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mechanisms.
or capacity. Data-link layer ensures flow control that
Keywords: error detection, LRC, VRC, CRC, checksum.
enables both machines to exchange data on same
I. Introduction speed.

D
ata Link Layer is the second layer of OSI Layered f) Multi-Access
Model. Data link layer is responsible for Hosts on shared link when tries to transfer data,
converting data stream to signals bit by bit and has great probability of collision. Data-link layer provides
to send that over the underlying hardware. At the mechanism like CSMA/CD to equip capability of
receiving end, Data link layer picks up data from accessing a shared media among multiple Systems.
hardware which are in the form of electrical signals
II. Designing Issues In data Link Layer
assembles them in a recognizable frame format, and
hands over to upper layer [2][6].
Data link layer has two sub-layers:

Global Journal of Computer Science and Technology ( D

• Logical Link Control : Deals with protocols, flow-
control and error control.
• Media Access Control : Deals with actual control of
media.
Data link layer does many tasks on behalf of
upper layer. The main functionalities are:
a) Framing
Data-link layer takes packets from Network Figure 1 : Designing issues in data link layer
Layer and encapsulates them into Frames. Then, sends The designing issues of data link layer are following:
each Frame bit-by-bit on the hardware. At receiver’s end
Data link layer picks up signals from hardware and a) Error Control
assembles them into frames. • Error control includes both error detection and error
correction.
b) Addressing
• It allows the receiver to inform the sender if a frame
Data-link layer provides layer-2 hardware
is lost or damaged during transmission and
addressing mechanism. Hardware address is assumed
coordinates the retransmission of those frames by
to be unique on the link. It is encoded into hardware at
the sender.
the time of manufacturing.
• Error control in the data link layer is based on
c) Synchronization automatic repeat request (ARQ). Whenever an error
When data frames are sent on the link, both is detected, specified frames are retransmitted
machines must be synchronized in order to transfer to [4][7].
take place.
b) Framing
• Break down a stream of bits into smaller, digestible
Author α σ : FET, Mody University of Science and Technology, India. chunks called frames
e-mails: [Link]@[Link], ruhi.saxena2011@[Link] • Allows the physical media to be shared

© 2014 Global Journals Inc. (US)

 Data Link Layer Designing Issues: Error Control—A Roadmap

- Multiple senders and/or receivers can time • Receiver must inform the sender before the limits
multiplex the link are reached and request that the transmitter to send
- Each frame can be separately addressed fewer frames or stop temporarily.
• Provides manageable unit for error handling • Since the rate of processing is often slower than the
- Easy to determine whether something went rate of transmission, receiver has a block of memory
wrong (buffer) for storing incoming data until they are
- And perhaps even to fix it if desire processed
c) Flow Control III. Error Control
• Flow control coordinates the amount of data that
Error controls are the techniques that enable
can be sent before receiving acknowledgement
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reliable delivery of digital data over unreliable

• It is one of the most important functions of data link
communication channels. Many communication
layer.
channels are subject to channel noise, and thus errors
• Flow control is a set of procedures that tells the
may be introduced during transmission from the source
sender how much data it can transmit before it must
2 to a receiver.
wait for an acknowledgement from the receiver.
• Receiver has a limited speed at which it can
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process incoming data and a limited amount of

memory in which to store incoming data.
Global Journal of Computer Science and Technology ( D

Figure 2 : Error Control Methodologies

Generally, there are two types of Error: bit changed cannot be ignored since one bit change
Single bit error: Single-bit error means that only can change the whole meaning of the data that is
one bit of data been change through transportation of transmitted. Figure-3 shows an example of this type of
data [7]. It changes either from 0 to 1 or 1 to 0. This one error.

Figure 3 : Single-bit error

Burst error: Burst error means that two or more likely to occur rather that the single-bit error. The
bits are changed when the transmitting data from the duration of the error was longer that duration of 1 bit,
sender to the receiver the data units have change from 0 which means the data is affected by the noise usually
to 1 or 1 to 0 because of the channel interference [8]. affect a set of bits. The number of bits that corrupted
Figure-4 shows the burst error of [Link] errors are always depends on the data rate and duration of noise.

Figure 4 : Burst error of length 8

© 2014 Global Journals Inc. (US)

 Data Link Layer Designing Issues: Error Control—A Roadmap

a) Error Correction To correct the error in data frame, the receiver

In digital world, error correction can be done in must know which bit (location of the bit in the frame) is
two ways: corrupted. To locate the bit in error, redundant bits are
• Backward Error Correction: When the receiver used as parity bits for error detection. If for example, we
detects an error in the data received, it requests take ASCII words (7 bits data), then there could be 8
back the sender to retransmit the data unit. kind of information we need. Up to seven information to
• Forward Error Correction: When the receiver detects tell us which bit is in error and one more to tell that there
some error in the data received, it uses an error- is no error.
correcting code, which helps it to auto-recover and b) Error Detection
corrects some kinds of errors. Error detection means to decide whether the

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The first one, Backward Error Correction, is received data is correct or not without having a copy of
simple and can only be efficiently used where the original [Link] detection uses the concept
retransmitting is not expensive, for example fiber optics. of redundancy, which means adding extra bits for
But in case of wireless transmission retransmitting may detecting errors at the destination.
cost too much. In the latter case, Forward Error 3
Correction is used [5].

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Figure 5 : Error Detection Mechanism

Global Journal of Computer Science and Technology ( D

Where D = Data, EDC = Error Detection Code sender simply includes one additional bit and choose its
(redundancy) value such that the total number of 1’s in the d+1 bits
There are four types of redundancy checks: (the original information plus a parity bit) is even. For
odd parity check scheme, the parity bit value is chosen
• VRC (Vertical Redundancy Check). such that there is odd number of 1’s. Table-1 shows a
• LRC (Longitudinal Redundancy Check). table contains 3 bits string. The transmitter will add 0 or
• CRC (Cyclical Redundancy Check). 1 to the bits string according to the parity check
• Checksum mechanism (even or odd). When the receiver receives
i. Vertical Redundancy Check (VRC) the bits string, the receiver will use the same mechanism
It is also known as parity check. There are two to count the 1’s in the bit string to determine whether it
types of parity check schemes: even and odd matches the counted parity from the transmitter or not
parityChecks [8]. In an even parity check scheme, the [1].

Table 1 : Parity bits that are compute for bits string

3 bits string Odd parity Even parity

000 1 0
001 0 1
010 0 1
100 0 1
110 1 0
111 1 0

This scheme can detect only single bits. So if ii. Longitudinal Redundancy Checksum (LRC)
two or more bits are changed then that cannot be Longitudinal Redundancy Checksum is an error
detected. detecting scheme which overcomes the problem of two
erroneous bits. In this concept of parity bit is used but
with slightly more intelligence. With each byte we send

© 2014 Global Journals Inc. (US)

 Data Link Layer Designing Issues: Error Control—A Roadmap

one parity bit then send one additional byte which has In this method, a sequence of redundant bits,
the parity corresponding to the each bit position of the called the CRC or the CRC remainder, is appended to
sent bytes. So the parity bit is set in both horizontal and the end of the data unit so that the resulting data unit
vertical direction. If one bit gets flipped we can tell which becomes exactly divisible by a second, predetermined
row and column have error then we find the intersection binary number. At its destination, the incoming data unit
of the two and determine the erroneous bit. If 2 bits are is divided by the same number. If at this step there is no
in error and they are in the different column and row remainder, the data unit assumes to be correct and is
then they can be detected. If the errors are in the same accepted, otherwise it indicates that data unit has been
column then the row will differentiate and vice versa. damaged in transmission and therefore must be
Parity can detect the only odd number of errors. If they rejected. The redundancy bits are used by CRC are
are even and distributed in a fashion that in all direction derived by dividing the data unit by a predetermined
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then LRC may not be able to find the error [2][5]. divisor. The remainder is the CRC.
iii. Cyclic Redundancy Checksum (CRC)

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Figure 6 : Mechanism of CRC at sender and Receiver side

For example, the CRC generator at the sender side:

Global Journal of Computer Science and Technology ( D

Figure 7 : CRC in sender side

The CRC checker at receiver side:

Figure 8 : CRC in receiver side

© 2014 Global Journals Inc. (US)

 Data Link Layer Designing Issues: Error Control—A Roadmap

iv. Checksum The extended data unit is transmitted across the

The checksum is based on the concept of network. So if the sum of the data segments is T, the
redundancy. As shown in Figure-9, in the sender, the checksum will be -T. The receiver performs the same
checksum generator subdivides the data unit into equal calculation on the received data and compares the
segments of n bits (usually 16). These segments are result with the received checksum. If the result is 0, the
added using ones complement arithmetic in such a way receiver keeps the transmitted data; otherwise, the
that the total is also n bits long. That total (sum) is then receiver knows that an error occurred discards the
complemented and appended to the end of the original transmitted data [9].
data unit as redundancy bits, called the checksum field.

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Figure 9 : Working of Checksum at sender and Receiver side
For example, the following block of 16 bits is to bit errors, double errors, an odd number of errors, and
be sent using a checksum of 8 bits burst errors while checksum is not asefficient as the
10101001 00111001 CRC.

Global Journal of Computer Science and Technology ( D

The numbers are added using one’s complement References Références Referencias
10101001
00111001 1. Dimitri Bertsekas and Robert Gallager, “Data
Sum 11100010 Networks”.
Checksum00011101 2. Larry Peterson and Bruce Davie, “Computer
Networks: A Systems Approach”.
The pattern sent is
3. [Link]
10101001 00111001 00011101 [Link]/
At the receiver end, same calculation has been 4. [Link]
done on the received data and compares the result with gnotes/communication-networks/what-is-error-
the received checksum in the following way: correction-and-detection.
10101001 5. Forouzan, “Data Communications and
00111001 Networking”.
00011101 6. J. Chellis, C. Perkins and M. Strebe, “MCSE:
Sum 11111111 Networking Essentials Study Guide with
Checksum 00000000 CDROM” , 2nd Ed. 1999.
When the receiver adds the three sections, it will 7. F. Behrouz and M. Firouz, “Computer Networks:
get all 1s, which, after complementing, is all 0s and A Top Down Approach”, 1st International Ed.
shows that there is no error. McGraw-Hill., 2012.
8. J. Fletcher, “An arithmetic checksum for serial
IV. Conclusion transmissions, Communications”. IEEE Trans-
There are various methods of detecting error in actions on. 30: 247-252, 1982.
the data link layer. Every method of error detectioncan 9. L. L. Peterson and B. S. Davie, “Computer
detect error accurately and effectively. Every method networks: a systems approach”, 2007, 3rd Ed.
has its own advantage and its own mechanism to detect Elsevier.
error. VRC is simple and can detect all single-bit error.
CRC has a very good performance in detecting single-

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