EE276 – Digital Electronic

Circuits

Sequential Logic
Design with Flip-flops
Sequential Logic Design with Flip-flops

▪ Analysis of clocked sequential circuit

Analysis Of Clocked Sequential Circuits
Contd..

A(t+1)

B(t+1)

Y(t)
Example 1:
Contd..
Contd..
Example 2:

Example
Example 3

Example
Example 4

Example
 State Reduction

Goal: reduce the number of states while keeping the external

input-output requirements unchanged.

State reduction example:

a: input 0 → output 0, circuit stays in same state a
a: input 1 → output 0, circuit goes to state b

b: input 0 → output 0, circuit goes to state c

c: input 1 → output 0, circuit goes to state d

11
Contd..

Present State Next State Output

x=0 x=1 x=0 x=1
a a b 0 0
b c d 0 0
c a d 0 0
d e f 0 1
e a f 0 1
f g f 0 1
g a f 0 1

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 State Reduction Algorithm
State Reduction Algorithm: Two states are equivalent if, for each member of the set inputs,
they give the same output and send the circuit to the same state or equivalent state.

Present State Next State Output

x=0 x=1 x=0 x=1
a a b 0 0
b c d 0 0
c a d 0 0
d e f 0 1
e a f 0 1
e
f g f 0 1 equivalent states
g a f 0 1

row with present state g is removed, and state g is replaced by state e each time it
occurs.

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Contd..

Present State Next State Output

x=0 x=1 x=0 x=1
a a b 0 0
b c d 0 0
c a d d 0 0
d e f 0 1
equivalent e a f d 0 1
states f e f 0 1

row with present state f is removed, and state f is replaced by state d each time it
occurs.

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Contd..

Present State Next State Output

x=0 x=1 x=0 x=1
a a b 0 0
b c d 0 0
c a d 0 0
d e d 0 1
e a d 0 1

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 State Coded Binary Assignment

Present State Next State Output

x=0 x=1 x=0 x=1
a 000 a 000 b 001 0 0
b 001 c 010 d 011 0 0
c 010 a 000 d 011 0 0
d 011 e 100 d 011 0 1
e 100 a 000 d 011 0 1

Reduced State Table with Binary Assignment

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 Sequential Circuits: Design Procedure
Recommended Design Steps

• Derive the state diagram from the word description and the
specifications of the desired operation.

• Reduce the number of states if necessary.

• Assign binary values to the states.

• Obtain the binary coded-state table.

• Chose the type of flip-flops to be used.

• Derive the simplified flip-flop input and output equations.

• Draw the logic diagram. 17

Design: Example 1
▪ Given the following state diagram, design the sequential circuit using JK flip-flops.

00
1 1
1
01 11
0
0
1
10

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Contd..
▪ Circuit state/excitation table, using JK flip-flops.
0
Present Next State
00 State x=0 x=1
AB A+B+ A+B+
1 1 00 00 01
1
11 01 10 01
01 10 10 11
0 11 11 00
0 1
10 Present Next
state Input state Flip-flop inputs
0
A B x A+ B+ JA KA JB KB
Q Q+ J K
0 0 0 0 0 0 X 0 X
0 0 0 X 0 0 1 0 1 1 X
0 1 0 1 0
0 X
0 1 1 X 1 X X 1
1 0 X 1 0 1 1 0 1 0 X X 0
1 0 0 1 0 X 0 0 X
1 1 X 0 1 0 1 1 1 X 0 1 X
JK Flip-flop’s 1 1 0 1 1 X 0 X 0
excitation table. 1 1 1 0 0 X 1 X 1

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Contd..

A’ A B’ B
Q Q Q Q
'K J 'K J
CP
KA JA KB JB

A' Combinational
A External
B circuit output(s)
B' (none)
x
External
input(s)

Block diagram. 20
Contd..
▪ From state table, get flip-flop input functions.

Present Next
state Input state Flip-flop inputs Bx B
A B x A+ B+ JA KA JB KB A 00 01 11 10
0 0 0 0 0 0 X 0 X 0 1
0 0 1 0 1 0 X 1 X A 1 X X X X
0 1 0 1 0 1 X X 1
0 1 1 0 1 0 X X 0 x
1 0 0 1 0 X 0 0 X JA = B.x'
1 0 1 1 1 X 0 1 X
1 1 0 1 1 X 0 X 0
Bx B
1 1 1 0 0 X 1 X 1
A 00 01 11 10
0 X X X X
Bx B Bx B
A 00 01 11 10 A 00 01 11 10 A 1 1
0 1 X X 0 X X 1 x
A 1 1 X X A 1 X X 1 KA = B.x
x x
JB = x KB = (A  x)'
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Contd..

▪ Flip-flop input functions.

JA = B.x' JB = x
KA = B.x KB = (A  x)'
▪ Logic diagram:
A
B

Q Q Q Q
'K J 'K J
CP

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Example 2
▪ Design, using D flip-flops, the circuit based on the state table below.

Present Next
state Input state Output
A B x A+ B+ y
0 0 0 0 0 0
0 0 1 0 1 1
0 1 0 1 0 0
0 1 1 0 1 0
1 0 0 1 0 0
1 0 1 1 1 1
1 1 0 1 1 0
1 1 1 0 0 0

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Contd..
▪ Determine expressions for flip-flop inputs and the circuit output y.

Present Next
Bx B
state Input state Output A 00 01 11 10
A B x A+ B+ y 0 1
0 0 0 0 0 0 DA = A.B' + B.x'
0 0 1 0 1 1 A 1 1 1 1
0 1 0 1 0 0
x
0 1 1 0 1 0
Bx B
1 0 0 1 0 0 A
1 0 1 1 1 1 00 01 11 10
1 1 0 1 1 0 0 1 1
DB = A'.x + B'.x
1 1 1 0 0 0 A 1 1 1 + A.B.x'
x
Bx B
DA(A, B, x) = S m(2,4,5,6) A 00 01 11 10
DB(A, B, x) = S m(1,3,5,6) 0 1
y = B'.x
y(A, B, x) = S m(1,5) A 1 1

x
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Contd..

▪ From derived expressions, draw logic diagram:

DA = A.B' + B.x'
DB = A'.x + B'.x + A.B.x'
y = B'.x

D Q A
x
Q A'
'

D Q B

Q B'
CP
'
y

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Example 3

▪ Design with unused states.

Present Next
state Input state Flip-flop inputs Output
A B C x A+ B+ C+ SA RA SB RB SC RC y
0 0 1 0 0 0 1 0 X 0 X X 0 0
0 0 1 1 0 1 0 0 X 1 0 0 1 0
0 1 0 0 0 1 1 0 X X 0 1 0 0
0 1 0 1 1 0 0 1 0 0 1 0 X 0
0 1 1 0 0 0 1 0 X 0 1 X 0 0
0 1 1 1 1 0 0 1 0 0 1 0 1 0
1 0 0 0 1 0 1 X 0 0 X 1 0 0
1 0 0 1 1 0 0 X 0 0 X 0 X 1
1 0 1 0 0 0 1 0 1 0 X X 0 0
1 0 1 1 1 0 0 X 0 0 X 0 1 1

Given these Derive these

Unused state 000:
0 0 0 0 X X X X X X X X X X
0 0 0 1 X X X X X X X X X X

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Contd..
▪ From state table, obtain expressions for flip-flop
inputs.

Cx C Cx C
AB 00 01 11 10 AB 00 01 11 10
00 X X 00 X X X X
01 1 1 01 X X
B B
11 X X X X 11 X X X X
A A
SA = B.x 10 X X X 10 1 RA = C.x'
x x

Cx C Cx C
AB 00 01 11 10 AB 00 01 11 10
00 X X 1 00 X X X
01 X 01 1 1 1
B B
11 X X X X 11 X X X X
A A RB = B.C + B.x'
SB = A'.B'.x 10 10 X X X X

x x
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Contd..

▪ From state table, obtain expressions for flip-flop

inputs (cont’d).
Cx C Cx C
AB 00 01 11 10 AB 00 01 11 10
00 X X X 00 X X 1
01 1 X 01 X 1
B B
11 X X X X 11 X X X X
A A
SC = x' 10 1 X 10 X 1 RC = x
x x

Cx C
AB 00 01 11 10
00 X X
01
B
11 X X X X
A
10 1 1 y = A.x
x

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Contd..
▪ From derived expressions, draw logic diagram:
SA = B.x SB = A'.B'.x SC = x'
RA = C.x’ RB = B.C + B.x' RC = x
y = A.x

y
x S Q A

R Q' A'

S Q B

R Q' B'

S Q C

R Q'
CP

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