CSE331: MICROPROCESSOR
INTERFACING & EMBEDDED
SYSTEMS
Lecture 3A: ARM ISA (Assembly
Language)
Lecture 3A:
ARM processor variants, memory
mapping, registers, and
instruction formats, among
others.
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Quiz 1: CISC vs. RISC Architecture (10 Marks)
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Quiz 1 contd
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Computer Architecture
Von-Neumann Harvard
Instructions and data Data and instructions are
are stored in the same stored into separate
memory. memories.
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Computer Architecture
Von-Neumann Harvard
Instructions and data Data and instructions
are stored in the same are stored into
memory. separate memories.
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ARM Cortex-M Series
Family
Von-Neumann Harvard
Instructions and data Data and instructions
are stored in the same are stored into
memory. separate memories.
ARM ARM ARM ARM
Cortex- Cortex- Cortex- Cortex-
M0 M0+ M3 M4
ARMv ARMv ARMv ARMv7
6-M 6-M 7-M E-M
ARM ARM ARM ARM
Cortex- Cortex- Cortex- Cortex-
M1 M23 M7 M33
ARMv ARMv ARMv7 ARMv
6-M 8-M E-M 8-M
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Levels of Program Code
Machine Program
C Program
Assembly ProgramAssemble 0010000100000000
int main(void){
0010000000000000
int i;
int total = 0;
1110000000000001
Compile 0100010000000001
for (i = 0; i < 10;
i++) { 0001110001000000
total += i; 0010100000001010
} 1101110011111011
while(1); // Dead loop 1011111100000000
} 1110011111111110
𑠀 High-level 𑠀 Hardware
language 𑠀 Assembly representati
𑠀 Level of language on
abstraction 𑠀 Textual 𑠀 Binary
closer to representatio digits (bits)
problem n of
domain 𑠀 Encoded
instructions
instructions
𑠀 Provides for and data
productivity
and portability
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Memory
• linear addressing
• 2 descending stacks
– main stack
– process stack – used by OS
• all operations based on registers
• must move data between registers &
memory
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Registers
• 16 * 32 bit registers
• working registers
– R0-R7 – low registers
– R8-R12 – high registers
• R13 – stack pointer (SP)
• R14 - link register (LR)
• R15 – program counter (PC)
• PSR – program status register
– bits for negative (N), zero (Z), carry (C),
overflow (V)
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Registers–continued
𑠀 Fastest way to read and write
𑠀 Registers are within the processor
chip
𑠀 A register stores 32-bit value
𑠀 STM32L has
𑠀 R0-R12: 13 general-purpose
registers
𑠀 R13: Stack pointer (Shadow of
MSP or PSP)
𑠀 R14: Link register (LR)
𑠀 R15: Program counter (PC)
𑠀 Special registers (xPSR,
BASEPRI, PRIMASK, etc)
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Program Status Registers
❖Condition code flags ❖ Interrupt Disable bits.
❖ N = Negative result from ALU ❖ I = 1: Disables the IRQ.
❖ Z = Zero result from ALU
❖ F = 1: Disables the FIQ.
❖ C = ALU operation Carried out
❖ V = ALU operation oVerflowed
❖ T Bit
❖Sticky Overflow flag - Q flag ❖ Architecture xT only
❖ Architecture 5TE/J only ❖ T = 0: Processor in ARM state
❖ Indicates if saturation has ❖ T = 1: Processor in Thumb state
occurred
❖ Mode bits
❖J bit
❖ Specify the processor mode
❖ Architecture 5TEJ only original 18
Data
formats
• word
– 32 bits
– long
• half
word
– 16 bits
– int
• byte
– 8 bits
– char
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Programming
approach
• in high level programming:
– identify variables & types
– compiler maps these to memory & data
representation
– use of memory v registers invisible
• in low level programming
– must make explicit use of memory & registers
– must choose data representation
• registers much faster than memory
• try to map variables to registers
• what if more variablesoriginal
than registers...? 20
Instruction
format
instruction Rd, Rn, operand2
== Rd = Rn operation operand2
• instruction is a mnemonic
– meaningful short form
– reminds us what instruction does
• Rd == destination register - R0..R15
• Rn == operand register - may be
optional
• operand2 == register or constant
• constant == #number
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MOV:
MOV
move
Rd, operand2 🡺🡺
Rd = operand2
•don’t update condition code flags
MOVS Rd, operand2
•as MOV but update condition code
flags
MOV Rd, #number 🡺🡺
Rd = number
NB number <= 255 - more later
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MVN: move with logical
NOT
MVN Rd, operand2 🡺🡺
Rd = operand2
•don’t update condition code flags
•performs a bitwise logical NOT
operation on the operand2, and places
the result into Rd.
MVN Rd, #number 🡺🡺
Rd = !number
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Label
○ Any instruction can be associated with a label
○ Example:
○ start: ADD r0,r1,r2 ; a = b+c
next: SUB r1,r1,#1 ; b--
○ In fact, every instruction has a label regardless if
the programmer explicitly names it
■ The label is the address of the instruction
■ A label is a pointer to the instruction in memory
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Lab
el
● Therefore, the text label doesn‟t exist in
binary code
● relative to program counter (PC)
● turned into PC + offset in machine code
● may start with _ such as _global
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System
calls
• SWI 0 == software interrupt to call
function
• parameters in R0-R2
• system function number in R7
• e.g. exit is 1
• NB shell variable $? is R0 so:
echo $? == display R0
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Layou
t
• usual to precede instruction with a tab
• comment is: @ text // text
• large comment: /*............*/
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Program
.global
skeleton
_start
_start:
@ program code here
_exit:
MOV R0, #65 @ arbitrary value
MOV R7, #1
SWI 0
• .global _start
– assembler directive
– entry point is visible
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_start externally
Running assembler
•
programs
file.s == assembly language
source
$ as -o file.o file.s
• assemble file.s to file.o
$ ld -o file file.o
• create executable file from file.o
$ ./file
• run executable in file from
_start
$ echo $?
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Example:
exit
• suppose exit.s is basic start
$ program
$ as -o exit.o exit.s ld -o
exit exit.o
$ ./exit
65
$ echo $?
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ADD:
ADD
addition
Rd, Rn, operand 🡺🡺
2
Rd = Rn+operand2
ADD Rd, operand2 🡺🡺 Rd =Rd+operand2
ADDC
•add with carry
•like ADD + carry flag
ADDS/ADDCS
•like ADD/ADDC but set condition code
flags
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SUB:
SUB
subtraction
Rd, Rn, operand 🡺🡺
2
Rd = Rn-operand2
SUB Rd, operand2 🡺🡺 Rd =Rd-operand2
SBC
•subtract with carry
•like SUB -1 if carry flag not set
SUBS/SBCS
•like SUB/SUBC but set condition code
flags
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RSB: reverse subtraction
RSB Rd, Rn, operand2 🡺🡺
Rd = operand2-Rn
RSB Rd, operand2 🡺🡺
Rd =operand2 -Rd
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Multiplication
● In ARM, we multiply registers, so:
○ 32-bit value x 32-bit value = 64-bit value
● Syntax of Multiplication (signed):
● MUL register1, register2, register3
● Built in multiplication MUL
○ {Rd, } Rn,operand2 🡺🡺 Rd =
Rn*operand2
○ NB Rd cannot be an operand
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Multiplication
❖Example:
❖in C: a = b * c;
❖in
MIPS:
❖ let b be r2; let c be r3; and let a be r0 and r1 (since it may be up to 64
bits)
MUL r0, r2, r3 ; b*c only 32 bits
stored
Note: Often, we only care about the lower half of the product.
SMULL r0,r1,r2,r3 ; 64 bits in r0:r1
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Multiply and Divide
❖ There are 2 classes of multiply - producing 32-bit and 64-bit results
❖ 32-bit versions on an ARM7TDMI will execute in 2 - 5 cycles
❖ MUL r0, r1, r2 ; r0 = r1 * r2
❖ MLA r0, r1, r2, r3 ; r0 = (r1 * r2) + r3
❖ 64-bit multiply instructions offer both signed and unsigned versions
❖ For these instruction there are 2 destination registers
❖ [U|S]MULL r4, r5, r2, r3 ; r5:r4 = r2 * r3
❖ [U|S]MLAL r4, r5, r2, r3 ; r5:r4 = (r2 * r3) + r5:r4
❖ Most ARM cores do not offer integer divide instructions
❖ Division operations will be performed by C library routines or inline shifts
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Instruction Summary So far
❖In ARM Assembly Language:
❖Registers replace C variables
❖One Instruction (simple operation) per line
❖Simpler is Better
❖Smaller is Faster
❖Instructions so far:
ADD, SUB, RSB, MUL, MULA, [U|S]MULL,
[U|S]MLAL
❖Registers:
Places for general variables: r0-r12
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Expressions
• for: • e.g.
var1 = var2 op x = y*z;
var3 🡺🡺
• with: var1 in @ x == R1
R1 var2 in R2 @ y == R2
var3 in R3 @ z == R3
🡺🡺 op R1,R2,R3 MUL R1,R2,R3
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Expressio
ns
• for: e.g.
var1 = var2 op1 var3 op2 x = y*z-a;
var4 🡺🡺
• if op1 and op2 have ...
same precedence @ a == R4
• or op1 has higher MUL R1,R2,R3
precedence than op2 SUB R1,R4
🡺🡺
op1 R1,R2,R3 op2 R1,,R4
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Expressions
• for: e.g.
var1 = var2 op1 var3 op2 x = y+z*a; 🡺🡺
var4 MUL R5,R3,R4
• if op2 has higher
ADD R1,R2,R5
precedence than op1
• must evaluate op2 e.g.
expression in new x = y*(z+a)
register🡺🡺 🡺🡺
op2 Ri,R3,R4 op1 R1,,R2,Ri ADD R5,R3,R4
MUL R1,R2,R5
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CMP:
CMP Rd,
compare
operand 2
• subtract operand2 from Rd BUT
...
• ... do not modify Rd
– otherwise same as SUBS
• update Z, N, C, V flags
CMN Rd, operand2
• add operand2 to Rd BUT ...
• ... do not modify Rd
• otherwise same as ADDS
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Flag
s
• N – 1 if result <0; 0 otherwise
• Z – 1 if result =0; 0 otherwise
• C – 1 if result led to carry; 0
otherwise
– i.e. X+Y > 232
– i.e. X-Y >= 0
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Flag
s
• V – 1 if result led to overflow; 0
otherwise
• (-) == negative
• (+) == positive
– i.e. (-)X+(-)Y > 0
– i.e. (+)X+(+)Y < 0
– i.e. (-)X-(+)Y > 0
– i.e. (+X)-(-Y) < 0
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B:
B label
branch
• branch to label
• i.e. reset PC to address for
label
Bcond label
• branch on condition to label
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C Decisions: if Statements
❖if statements in C
❖if (condition) clause
❖if (condition) clause1 else clause2
❖Rearrange 2nd if into following:
if (condition) goto L1;
clause2;
goto L2; L1: clause1;
L2:
❖Notas elegant as if-else, but same
meaning
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ARM goto Instruction Conversion
❖ The simplest control instruction is equivalent to a
C goto statement
❖ goto label (in C) is the same as:
❖ B label (in ARM)
❖ B is shorthand for “branch”. This is called an
unconditional branch meaning that the branch is
done regardless of any conditions.
❖ There are also conditional branches
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Conditio
suffix
n flags
EQ == equal Z=1
NE == not equal Z=0
CS/HS == carry set/ higher or same - C=1
unsigned
CC/LO == carry clear/lower - unsigned C=0
MI == negative N=1
PL == positive or 0 N=0
VS == overflow V=1
VC == no overflow V=0
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Conditio
suffix
n flags
HI == higher - unsigned C=1 & Z=0
LS == lower or same - unsigned C=0 or Z=1
GE == greater than or equal - signed N=V
LT == less than - signed N!=V
GT == greater than - signed Z=0 & N=V
LE == less than or equal, signed Z=1 or N!=V
AL == any value default if not
cond
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Overflow Detection
One way to detect overflow is to check whether the sign bit is
consistent with the sign of the inputs when the two inputs are of the
same sign – if you added two positive numbers and got a negative
number, something is wrong, and vice versa.
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ARM BRANCH Instructions
❖ ARM also has variants of the branch instruction that only
goto the label if a certain condition is TRUE
❖ Examples:
❖ BEQ label ; BRANCH EQUAL
❖ BNE label ; BRANCH NOT EQUAL
❖ BLE label ; BRANCH LESS THAN EQUAL
❖ BLT label ; BRANCH LESS THAN
❖ BGE label ; BRANCH GREATER THAN EQUAL
❖ BGT label ; BRANCH GREATER THAN
❖ Plus more …
❖ The condition is T/F based upon the fields in
the Program Status Register
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Example: multiply by
adding .global _start
int x; _start:
int y; MOV R1, #0x03
int m;
MOV R2, #0x0a
x = 3;
MOV R3, #0x00
y = 10;
_loop:
m = 0;
CMP R2,#0x00
while(y!=0)
BEQ _exit
{ m =
ADD R3, R1
m+x;
SUB R2, #0x01
y = y-1;
Boriginal
_loop 51
}
Example: multiply by
adding _exit:
#m=x*y
int x; MOV R0, R3
int y; MOV R7, #1
int m; SWI 0
x = 8; ...
y = 10; $ echo $?
m = 0; 12
while(y!
{ =0)
m = m+x;
y = y-1;
}
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Data directives &
constants
.data
• start of sequence of data
directives
• usually after instuctions program
.equ label, value
• define constant
• associate label with value
• use #label as operand2 to get
value original 53
Example: multiply by
•m
adding .global _start
== x*y
int x; int _start:
y; int m; MOV R1, #X
x = 8; MOV R2, #Y
y = 10; MOV R3, #0x00
m = 0; _loop:
while(y!=0) CMP R2,#0x00
{ m BEQ _exit
= m+x; y = ADD R3, R1
y-1; SUB R2, #0x01
} B _loop
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Example: multiply by
m=x*y
adding _exit:
int x; MOV R0, R3
int y; int MOV R7, #1
m; SWI 0
x = 8; .data
y = 10; .equ X, 3
m = 0; .equ Y, 4
while(y!=0) ...
{ m = m+x; $ echo $?
y = y-1; 12
}
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