1982 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 37, NO.
2, FEBRUARY 2022
Efficiency Improved Multi-Source Inverter for
Hybrid Energy Storage Systems in Electric Vehicle
Application
Javad Ebrahimi , Member, IEEE, Omid Salari , Student Member, IEEE, Suzan Eren , Member, IEEE,
Keyvan Hashtrudi-Zaad , Senior Member, IEEE, Alireza Bakhshai , Fellow, IEEE,
and Praveen Jain , Fellow, IEEE
Abstract—Multisource inverters (MSIs) as a new approach for power features, low charge/discharge lifespan, poor operation
the integration of the energy and the power sources in electric in cold temperatures, and inefficient performance when being
vehicle applications have gained considerable attraction. Such discharged by high C-rates [8], [9]. To overcome these short-
structures offer the active control of the dc sources without using
any dc/dc converters or magnetic elements, which reduces the comings, hybrid energy storage systems (HESS) for combining
weight, and the volume of the power electronics interface between Li-ion batteries with supercapacitor (SC) banks as the power
the sources and the load. Moreover, high power density and im- source have been highly recommended [10]–[13]. Unlike battery
proved efficiency due to the elimination of the magnetics are the packs, SC banks offer high specific power features, low internal
other significant features of an MSI. This article proposes a novel
resistance, a long lifespan, and good thermal operation [14].
three-phase MSI for integration and active control of a high-voltage
dc source and a low-voltage dc source. The proposed MSI structure Thus, they can be great candidates to complement battery packs.
employs a smaller number of semiconductor devices at the current The conventional HESS uses passive and active configura-
path in various operating modes in comparison to the previously tions to control the energy of the storage components. In such
published counterparts, which results in an improved efficiency configurations, the storage systems can be interfaced to the dc-
operation. Performance of the proposed MSI using a modified link through the power electronics dc/dc converters. However,
space vector modulation technique for all possible operating modes
is verified through simulations and experiments on a laboratory the existence of high-power dc/dc converters makes the overall
prototype system heavier, bulkier, more complicated to control, and more
expensive to realize [15]. In addition, the efficiency of the system
Index Terms—DC/AC converters, electric vehicles (EVs), hybrid
storage systems, multisource inverters (MSI), space vector
is compromised due to the associated losses to the magnetic
modulation (SVM). components of the dc/dc converters, especially at light load
operations where dc/dc converters show significant efficiency
drop [16], [17].
I. INTRODUCTION Recently, multisource inverters (MSI) as a new generation
LECTRIC vehicles (EVs), as the best existing solution for of traction inverters for addressing hybridization of the storage
E facing the environmental and healthcare issues regarding
internal combustion engine cars, enjoy the clean electrochem-
devices in EVs have been proposed [18]. In this regard, a various
number of dc storage devices can feed the same ac load through
ical energy stored in their storage systems. This facilitates a single-stage magneticless dc/ac power conversion [19], [20].
zero-emission poisonous chemicals and other pollutants [1]–[5]. These structures improve the system’s overall volume, weight,
Li-ion batteries as a mature technology have been widely used as and efficiency due to the elimination of the magnetics from the
the main energy storage system in EVs [6], [7]. However, Li-ion circuit [20]. Moreover, MSI circuits introduce a high degree of
batteries suffer from issues, such as low to moderate specific freedom for the selection and integration of storage devices with
complementary characteristics to satisfy the load requirements
Manuscript received January 27, 2021; revised May 9, 2021 and June 22,
based on the load features [21].
2021; accepted August 9, 2021. Date of publication August 13, 2021; date From the voltage source inverter (VSI) point of view, the
of current version October 15, 2021. This work was supported in part by the dc-link voltage of an MSI is not fixed. In other words, a combi-
Natural Science and Engineering Research Council of Canada (NSERC) and
in part by the Canadian Urban Transit Research & Innovation Consortium
nation of input voltage sources can be applied to the load as the
(CUTRIC). Recommended for publication by Associate Editor M. Saeedifard. load reference voltage or current changes. This way, improved
(Corresponding author: Javad Ebrahimi.) efficiency performance can be achieved for the HESS [19].
The authors are with the Department of Electrical and Computer En-
gineering, Queen’s University, Kingston, ON K7L 3N6, Canada (e-mail:
Moreover, in EV applications, the efficiency of the electric motor
[email protected]; [email protected]; suzan.eren@queensu. is compromised at low speeds where the value of the modulation
ca; zaad, [email protected]; [email protected]; praveen.jain@ index is very small [19]. However, in an MSI topology, this
queensu.ca).
Color versions of one or more figures in this article are available at
voltage is not fixed anymore. Thus, a combination of different
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EBRAHIMI et al.: EFFICIENCY IMPROVED MULTISOURCE INVERTER FOR HESS IN ELECTRIC VEHICLE APPLICATION 1983
on the value of the reference speed, which improves the perfor-
mance of the electric motor in comparison with the traditional
systems with a fixed dc-link voltage [19]. The variable dc-link
voltage also gives the degree of freedom to custom design the
voltage ratings of each source. In other words, unlike the passive
HESS structures where the voltage ratings of the dc sources had
to be similar due to the parallel connection of the sources, in
MSI structures the dc sources can be custom designed based
on the load requirements. Consequently, input dc sources with Fig. 1. Proposed improved MSI topology.
lower voltage ratings can be used in HESSs. As a result, not only
the cell-balancing requirements and the final price of the energy
output using a single conversion stage. However, the proposed
sources drops down but also the overall system will be simpler
MSI offers an extra operating mode in comparison with [18] and
and easier to maintain [22].
lowers power losses in comparison with [24]. Thus, reduced
In [18], an MSI for combining a high voltage and a low voltage
production cost, as well as improved efficiency, is the main
battery pack is introduced. This topology essentially is a variant
advantages of the proposed topology. Along with the proposed
of the T-type three-level inverter. This structure has been utilized
improved MSI, a space vector modulation (SVM) technique
in the powertrain of the Toyota Prius to reduce the power rating
and a closed-loop controller are also introduced for control of
of the dc/dc converter between the storage systems and the high
the switching actions at various operating modes. To further
voltage dc-link. The same topology is used in [21] for active
verify the performance of the proposed topology, a supervisory
control of the battery/SC combination. This topology is based
mode controller is developed for controlling the state of charge
on the neutral point clamped three-level inverter structure. A
(SOC) of the auxiliary dc source in the proposed MSI for EV
study of the functionality of the same topology as an ac/dc
drive applications. Moreover, the proposed MSI topology is
rectifier in the regenerative braking mode for EV applications
used as a traction inverter for the ECE-15 driving cycle as a
has been reported in [20]. Despite the good operational benefits
European Union-approved driving schedule for testing vehicle
of this topology, the voltage rating of the battery pack should be
performance.
high enough to match the high voltage dc-link and the electric
The rest of this article is organized as follows. Section II
motor voltage ratings, which translates into a bigger and more
presents the basic converter topology. The modulation technique
expensive battery pack.
and control scheme are explained in Section III. Section IV
Similarly, the MSI presented in [18] offers three operating
provides a comparison among the proposed converter and other
modes, i.e., the main battery pack is the only source to supply the
MSI topologies from different standpoints including the number
load, the main battery pack charges the auxiliary battery pack and
of semiconductor devices, the total number of operating modes,
supplies the load concurrently, and finally the auxiliary battery
losses, and efficiency in all operating modes. Simulation results
pack as the only source to supply the load. Since this topology
are illustrated in Section V to verify the performance of the pro-
is not capable of adding up the sources, the voltage of the main
posed MSI topology. The experimental verification is presented
battery pack should be high enough to facilitate the high voltage
in Section VI using a scaled-down laboratory setup. Finally,
requirements of the electric motor at higher speed levels. This
Section VII concludes this article.
needs a high number of series cells in the main battery pack
and increases the size, weight, and price of the battery pack. To
overcome this, with some modifications, the topology of [23] II. PROPOSED TOPOLOGY
was introduced, which has an extra mode for adding up the The proposed MSI topology is shown in Fig. 1. It consists
voltages of the two battery packs. of a low frequency (LF) part and a high frequency (HF) part.
In [24], a reconfigurable MSI topology with a modular struc- The LF part consists of two dc sources, one diode, and five
ture is introduced for the joint control of the battery pack and the switching devices operating at the lower switching frequency.
SC bank without using the bulk high-power dc/dc converters. The switching pairs (S1 S2 ), (S1 S5 ), (S2 S5 ), and (S3 S4 ) are
This reconfigurable topology offers all the possible combina- operating in a complementary manner to prevent short circuit of
tions of the dc-link sources. Indeed, this MSI topology provides the dc sources dc 1 and dc 2. Table I gives the switching states
an extra mode that steps up the input dc source voltages. By of the proposed MSI topology. The switching functions 0 and 1
exploiting such structure, the voltage rating of the sources can be indicate that the switch is turned OFF and turned ON, respectively.
custom designed, which lowers the cell balancing requirements All possible combinations of the input dc sources are accessible
for both sources. As shown in [10], the voltage step-up mode at the discrete adjustable dc-link of the HF part by selection of the
also decreases the peak of the extracted current from the battery proper switching states of the LF part. The dc voltage amplitude
pack up to 25%, which improves the life span of the battery pack. at the output side of the LF section is considered as VMSI .
Nevertheless, the number of conducting active switches in the As it can be seen, the LF section is able to connect two
MSI presented in [24] is high, which increases the conduction dc sources, namely, a high-voltage dc source with the voltage
losses and decreases its efficiency. rating of VDC1 and a second dc source having the voltage rating
In this article, an improved MSI topology is proposed. As of VDC2 . It should be noted that VDC2 can be a low-voltage
topologies presented in [18]–[24], the main purpose of the battery pack like in [18] or an SC bank such as [24] to han-
proposed MSI is to connect distinct dc sources to the same ac dle the high number of charge/discharge modes in a driving
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1984 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 37, NO. 2, FEBRUARY 2022
TABLE I 1) Mode 1: The load is supplied by the source VDC2 , and
SWITCHING STATES OF THE PROPOSED MSI TOPOLOGY IN VARIOUS
OPERATING MODES
the source VDC1 is not used. The power transfer path in
the LF section is provided by switches S3 and S5 and the
value of VMSI in Fig. 1 is equal to VMSI = VDC2 where
VDC2 < VDC1 . Due to the smaller amplitude of the source
VDC2 , this mode is appropriate for the light loads with
small power/voltage requirements.
2) Mode 2: Two dc sources are connected in differential series
connection and the value of VMSI in Fig. 1 is equal to
VMSI = VDC1 − VDC2 . With the positive current iDC1 , the
source VDC1 supplies the load and simultaneously charges
the source VDC2 . In the LF section, the switches S1 and S4
are turned ON in this mode. This mode can be used for the
cases where the SOC of the second dc source is less than
a certain level or the load requires more power/voltage in
comparison to the first mode.
3) Mode 3: The load is supplied by the source VDC1 and the
source VDC2 is not used. Thus, the value of VMSI is equal
to VMSI = VDC1 . The power transfer path is provided
by switches S2 and S4 . Since the voltage of the first dc-
link is essentially selected to be higher than VDC2 and
VDC1 − VDC2 , this mode is a proper choice for loads that
require higher power/voltage values than modes 1 and 2.
4) Mode 4: Two dc sources are connected in series and the
positive pole of VDC1 is connected to the negative pole
of VDC2 . The sources VDC1 and VDC2 simultaneously
supply the load and provide a high voltage amplitude of
VDC1 +VDC2 at the dc-link of the HF section. In the LF
section, the switches S2 and S3 are turned ON in this mode.
It is intelligible that the value of the dc-link voltage VMSI is
increased from modes 1 to 4. Therefore, the dc source voltage
VDC1 must be greater than twice VDC2 , i.e., VDC1 >2×VDC2 .
If VDC1 is selected as 3×VDC2 = 3E, the dc-link voltage
amplitudes of VSI are equally spaced and has values of E, 2E,
3E, and 4E.
In general, selection of the operating mode is a function
of the load reference power or voltage, and the SOC of the
auxiliary dc source, i.e., VDC2 [24]. For instance, if the requested
reference power or voltage by the load is a small value and the
cycle of an EV. The HF section is essentially a conventional SOC of the auxiliary dc source lies in the specified limits of
three-phase VSI. This converter generates a voltage waveform SOCmin ≤ SOC2 ≤ SOCmax , then this mode could be used.
with a peak-to-peak amplitude of dc-link voltage VMSI and a This way, the voltage stress on the VSI part of the MSI is reduced
desired fundamental frequency. Unlike a conventional VSI with during the switching actions, and the efficiency of the system is
a fixed dc-link voltage, the value of VMSI in this topology can increased during light loads in comparison to the fixed dc-link
be adjusted by the LF section of the proposed MSI topology. VSI. Likewise, as the load demand power increases/decreases,
The dc-link voltage can have discrete values between the lower the dc-link voltage can be increased/decreased accordingly to
amplitude dc source, VDC2 , and the sum of two dc sources, address the required load power.
VDC1 +VDC2 . In other words, there are four different values for The flow of power between the two sources could be control
discrete adjustable dc-link voltages, namely VDC1 , VDC2 , the by changing the mode. As explained earlier, the change in the op-
summation of the two input dc sources, i.e., VDC1 +VDC2 and, erating mode of the inverter essentially leads to adjusting the VSI
and finally subtraction of the two sources, which is VDC1 -VDC2 . input voltage, i.e., VMSI . This way, the drawn current from the
The switches employed in HF section have voltage ratings main battery pack during peak load requirements or the injected
corresponding to the maximum amplitude of the dc-link voltage, current into the main battery during regenerative operation can
that is VDC1 +VDC2 . be reduced. The reduction in the battery pack current reduces the
Based on the previous discussion on the associated values to C-rate of the battery pack and enhances its life span by reducing
the discrete adjustable dc-link, the proposed MSI can operate in heat losses and battery duty [1], [2]. To elaborate more, let us
four dc/ac conversion modes where different combinations of assume the example of the induction machines as they have
the input dc sources can be connected to the load, as follows. been widely utilized in the electric vehicles drive train. Fig. 2
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EBRAHIMI et al.: EFFICIENCY IMPROVED MULTISOURCE INVERTER FOR HESS IN ELECTRIC VEHICLE APPLICATION 1985
Fig. 2. Torque-speed characteristics of induction machines considering the
operating modes of the proposed MSI for motoring and regenerative braking
operation.
Fig. 3. Power flow control strategy by changing the operating mode.
indicates the torque-speed curves of induction machines during
motoring and regenerative operation. Assuming the proposed 1) Mode 1: The braking energy is stored in the auxiliary dc
MSI, the induction machine can experience four modes in source and the main c source is not in the energy flow path.
motoring operation, and three regenerative braking modes. In Thus, the value of VMSI is equal to VMSI = VDC2 . This
other words, during the motoring modes, for low-speed values, mode is utilized if the braking happens during light speed
where the demanded power by the vehicle is not very high, levels where the braking energy is not high and the SOC of
mode 1 could be used. As the requested power by the driver the second dc source is not exceeding its maximum limit.
increases, to meet higher desired speed values, the operating 2) Mode 3: The braking energy is stored in the main dc source
modes are changed to increase the value of VMSI to meet the and the auxiliary dc source is not in the energy flow path.
higher speed levels. In case of the regenerative braking, which Thus, the value of VMSI is equal to VMSI = VDC1 . This
is normally activated by the brake pedal and applying negative mode is utilized if the braking happens during mild speed
torque to the electric machine, the generated braking energy can levels.
be stored in the storage systems as an attractive feature of EVs. 3) Mode 4: The braking energy is stored in both dc sources,
In the regenerative braking mode, if the brake energy is not very and the value of VMSI is equal to VMSI = VDC1 +VDC2 .
high, which is the case for braking during low-speed values, the This mode is utilized if the braking happens during high-
energy can be stored in the source with smaller voltage level, speed levels, where there is an inrush of high charging
i.e. mode 1. If the brake energy is higher, as is the case for current from the electric motor to the dc side of the inverter.
braking events during higher speed values, then the operating Since the auxiliary dc source is ultimately a power source with
mode can be changed to select proper voltage level to meet the a lower voltage rating, its SOC must be kept within an acceptable
speed-torque curve demand. For instance, if the brake happens limit to make sure this source is not undergoing overcharge
during higher speed levels, then mode 4 of the regenerative or undercharge regimes. To do so, a deterministic supervisory
braking could be activated, which stores the retrieved energy controller is also proposed that ensures the safe operation of
in the main and the auxiliary battery pack. Since both sources the auxiliary dc source. Fig. 3 indicates the flowchart of the
are placed in series connection, the net injected (charging) dc proposed deterministic controller, which controls the power flow
current in the main battery pack is reduced due to the increase between the sources based on the SOC of the auxiliary dc source,
in the voltage level and consequently, increases the battery pack operating mode, and the sign of the torque command. This way,
life span by reducing the battery C-rate. It should be noted that during motoring mode of operation or the regenerative mode
the operating mode 2 in the regenerative braking mode is not of operation, the controller ensures that the auxiliary source is
available as there is no point to charge of the main DC source and always operating within its SOC limits by changing the operating
discharge the auxiliary source at the same time. The summary mode among modes 1–4 in motoring mode and modes 1, 3, and
of the regenerative braking operating modes is as follows. 4 during regenerative braking. For further explanations, let us
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1986 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 37, NO. 2, FEBRUARY 2022
assume that the electric machine is performing in the motoring
mode. Thus, the torque command has a positive sign.
If the operating mode is mode 1, then the controller checks
for the SOC limit of the auxiliary source. If the auxiliary source
has its SOC between the specified lower and upper limits, then
the controller keeps the current mode. Otherwise, the mode is
changed to mode 2, where the main dc source not only starts
to charge the auxiliary dc source but also supplies the required
power to the electric machine. It should be noted that mode 3
could also be selected for this situation, but since the goal is to
keep the inverter switch voltage stresses at the minimum possible
value; thus mode 2 is selected.
If the operating mode is mode 2, the controller will check for
the auxiliary dc source SOC again, and if the SOC reaches the
maximum limit, then the mode is changed to mode 3, which is the
next available mode to keep the voltage stress on the switches at
their minimum value. In case the operating mode is mode 3, the
controller does not change the operating mode. Thus, the main Fig. 4. Space vector diagram of the proposed MSI topology.
dc source will be the sole supplier of energy to the electric motor.
If the MSI is operating in mode 4, and the auxiliary dc source
operates within its SOC limits, the mode will not be changed. and control strategies have been developed for power electronics
Otherwise, to stop the auxiliary dc source from experiencing converters. The carrier-based PWMs determine the desired volt-
undercharge, the operating mode will be changed to mode 3 age level at any instance by comparing the control signals with
where the main dc source will be the only supplier of energy to carrier waveforms [25], [26]. The SVM is an alternative method
the electric machine. Likewise, during the regenerative braking, for the switching process of PWM. In comparison to the other
the torque command is negative, and the flow of power is from PWM methods, SVM offers increased dc-link utilization fea-
the electric machine to the dc sources. ture as well as improved total harmonic distortion performance
If the operating mode is mode 1 and the auxiliary dc source achieved by the arbitrary selection of the switching vectors in
operates within its limits, then mode 1 will be kept where the the αβ frame [27], [28]. Thus, the SVM is the selected PWM
auxiliary dc source is storing the regenerated brake energy. If method for control of the switching actions of the proposed MSI
the controller realizes that the auxiliary dc source is exceeding in this article.
its maximum SOC limit, then the operating mode is changed to Fig. 4 shows the space vector plane of the proposed MSI
mode 3, and the main dc source will be storing the remaining topology. It consists of voltage vectors at four operating modes.
energy from the brake. Each operating mode is corresponding to a unique dc voltage at
If the operating mode is mode 4, the controller checks for dc terminals of the VSI.
the SOC of the second dc source. If its SOC is within the The resulted three-phase voltages of the VSI in the abc frame
specified limits, then the controller keeps the operating mode are transformed into a two-dimensional complex frame using
at mode 4 where both sources store the electric energy from the Clarke’s transformation in [29]
brake, concurrently. This mode has two benefits for the generated
⎡ ⎤
energy at mild to high-speed levels. Normally, the rating of the vAn
vα 2 1 √− 1/2 − √ 1/2 ⎣ vBn ⎦
injected current to the dc bus at such speed levels is high, which is = × (1)
corruptive to the dc sources. This way it can be made sure that by vβ 3 0 3/2 − 3/2
vCn
increasing the voltage at the dc bus, i.e., VMSI , a lower amount of
current is directed to the dc sources, which essentially prevents where van , vbn , and vcn are the line to neutral voltages in the
early aging of the sources. Additionally, the second benefit is abc frame while vα and vβ are the corresponding components
that since the auxiliary dc source is getting charged, its SOC of the resulted voltage vectors in the αβ plane. Applying the
stays within its limits for future acceleration purposes to reduce transformation to the output phase voltages corresponding to the
the duty on the main dc source. In case, the auxiliary dc source eight switching states of the VSI for each operating mode results
SOC exceeds its maximum limit, the mode is changed to mode in a set of switching voltage vectors [30]. By doing this, each
3. Thus, the remaining regenerated energy will be stored in the operating mode provides six non-zero space voltage vectors and
main dc source. two zero vectors. Totally, there are 24 nonzero voltage vectors in
the space vector plane and eight zero vectors located at the origin.
III. MODULATION SCHEME AND CONTROL TECHNIQUE Thus, the αβ plane representation consists of a set of switching
voltage vectors that form four-layer hexagons centered at the
A. Modulation Scheme
origin of the αβ plane. Each hexagon is the representation of
The modulation technique is an important part of controlling one operating mode. The hexagon is divided into six 60o sectors
a converter. Many pulsewidth modulation (PWM) techniques specified by 1 to 6 in Fig. 4.
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EBRAHIMI et al.: EFFICIENCY IMPROVED MULTISOURCE INVERTER FOR HESS IN ELECTRIC VEHICLE APPLICATION 1987
TABLE II
SELECTION OF VECTORS FOR EACH REDEFINED REGION
time of each vector is calculated using the basic volt-second
balance of the reference vector Vref and the selected vectors.
Fig. 5. Voltage space vectors of the proposed MSI topology in sector I. The corresponding dwell time of selected voltage space vectors
during a sampling period Ts are as follows:
π
The first sector of the space vector diagram of the proposed T1 = M × sin − θ 1 × T s × Nr
MSI topology is shown in Fig. 5. In the space vector diagram, 3
the number at each vertex represents the generated voltage level T2 = M × sin (θ1 ) × Ts × Nr
of the phases a, b, and c of the MSI. The voltage levels 0 and 1
represent output voltages 0 and Vdc relative to the lower rail of T0 = Ts − T1 − T2 (4)
the VSI, respectively. where the parameter Nr is the normalization factor and is ob-
Projection of three-phase reference voltages into the αβ plane tained in different operating modes as follows:
is a vector called the reference voltage vector Vref with the ⎧
constant magnitude of |V ref | that rotates counterclockwise at an ⎪
⎪ 1 + VVDC1 M ode 1
⎪
⎨
DC2
angular frequency of ω as shown in Fig. 5. Based on the location VDC1 + VDC2 /VDC1 − VDC2 M ode 2
Nr = (5)
of the tip of the reference voltage vector Vref , two active vectors ⎪
⎪
⎪ 1 + VVDC2 M ode 3
and one zero vector will be used to generate the reference voltage ⎩ DC1
1 M ode 4.
vector at the output side of the MSI.
The modulation index of the MSI with two dc sources with The parameter θ1 is the angle between the transferred refer-
voltage amplitudes of VDC1 and VDC2 is defined as ence vector into the sector 1 and the α-axis and is calculated as
2 |V ref | follows:
M=√ . (2)
3 DC1 + VDC2
V
θ = Arctg
vβ
vα
Based on Fig. 5, a reference voltage corresponds to the maxi-
mum fundamental component of the ac-side voltage obtained in π
θ1 = f mod θ + π, (6)
each mode is equal to the radius of the biggest inscribed circle of 3
the corresponding hexagon. This way, the appropriate operating where fmod(a, b) is a function that computes the remainder of
mode is determined based on the modulation index as follows: the division operation a/b.
Once the duty ratios associated which each switching voltage
M ode 1 M < VDC2 /VDC1 + VDC2 vector are determined, they must be properly arranged in one
VDC2 VDC1 − VDC2 sampling period to satisfy any performance criteria such as
M ode 2 <M ≤
VDC1 + VDC2 VDC1 + VDC2 minimization of the switching frequency as suggested in [31].
In this article, a symmetric seven-segment switching scheme is
VDC1 − VDC2 VDC1
M ode 3 <M ≤ utilized [32].
VDC1 + VDC2 VDC1 + VDC2
VDC1 B. Control Technique
M ode 4 < M ≤ 1. (3)
VDC1 + VDC2 A general block diagram of the controller is shown in Fig. 6.
Table II gives the selected space voltage vectors for each The controller is responsible for generating a set of three phase
operating mode in sector I of the space vector diagram. The sinusoidal modulating waveforms through adjustment of the
same logic applies when the tip of the reference voltage is in modulation index and the frequency to match the reference cur-
the other sectors of the αβ plane. The corresponding dwell rents, which is in fact a three-phase DQ frame current controller
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1988 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 37, NO. 2, FEBRUARY 2022
TABLE III
COMPARISON OF COMPONENT CHARACTERISTICS AMONG DIFFERENT MSI
TOPOLOGIES AND THE PROPOSED MSI TOPOLOGY
Fig. 6. Flowchart of the current controller.
TABLE IV
CONDUCTION DEVICES OF LF SECTION OF THE PROPOSED MSI TOPOLOGY
AND THE PRESENTED TOPOLOGY IN [24]
[33] Estimation of the current vector angles for performing
Park’s transformation and inverse park’s transformation in the
controlling logic as well as synchronization of the inverter with
load has been done through a phase-locked loop as depicted in
Fig. 6.
As shown in Fig. 6, the transferred reference load currents
in the DQ frame are subtracted from the three-phase ac load
currents in the DQ frame. The error signals are passed through
the proportional-integral (PI) controllers [33], [34] to generate
the reference voltages in the DQ frame, which are transferred
to the abc frame. Then, the reference modulation index Mref is
calculated using (1) and (2). After that, the operating mode of
the converter is determined as indicated in (3). Consequently, topologies provide four operating modes. Indeed, these topolo-
the switching state of the LF section is determined based on gies have an additional mode corresponding to the sum of two
Table I. To generate the switching states of the HF section, dc sources. This results in a higher modulation interval as shown
the proposed SVM described in the previous sub-section is in the fourth row of Table III. The modulation index is obtained
utilized. The modulation index Mref is calculated using (2) from (2) and the amplitude of VDC1 is considered a triple of
and the reference angle θ is obtained by (6). The symmetric VDC2 , VDC1 = 3×VDC2 .
seven-segment switching scheme is applied to the HF section. The number of required switching devices in the compared
topologies are shown in the three button-rows of Table III.
IV. COMPARISON The proposed topology provides multisource operation utilizing
five LF switches and six HF switches. In comparison with the
For a fair comparison, the recently introduced MSI topologies, reconfigurable MSI topology presented in [24], an important
i.e., the NPC-based MSI [18], the T-type-based MSI [21], and advantage of the proposed MSI topology is the significant re-
the reconfigurable MSI [24] topologies are considered. For a duction of the conducting switches in different operating modes
meaningful comparison, apart from the number of operating as explained in the following section.
modes, only topologies with two dc sources are considered. For
the comparison, different parameters that have a direct influence
on the size, cost, and performance of the converters are taken B. Losses and Efficiency
into consideration. The power losses associated with a static converter mainly
consist of the filter losses the switching losses and the conduc-
tion losses of the switching devices. The filter losses for two
A. Component Count and Rating
converters are expected to be similar if the harmonic spectra of
Table III gives a comparison of the number of main compo- their output voltage are similar and, thus, are not considered.
nents among different topologies. It can be seen from Table III An important feature of the proposed MSI topology is the
that the number of dc sources is the same in different topologies. lower number of conducting switches in the LF section. Table IV
However, the proposed MSI and the reconfigurable MSI [24] gives the conducting devices of the LF section in the proposed
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EBRAHIMI et al.: EFFICIENCY IMPROVED MULTISOURCE INVERTER FOR HESS IN ELECTRIC VEHICLE APPLICATION 1989
TABLE V
SYSTEM PARAMETERS FOR THE TOPOLOGIES UNDER COMPARISON
Fig. 8. Efficiency of the proposed topology and the topology presented in [24].
(a) Mode 1. (b) Mode 2. (c) Mode 3. (d) Mode 4.
As it can be seen in Fig. 7 the proposed converter shows
reduced loss performance in comparison to the converter of [24].
In fact, for the modulation indexes in the intervals [0 0.25],
(0.5 0.75], and (0.75 1], where operating modes 1, 3, and 4,
happens, respectively, the proposed MSI depicts superior loss
performance in comparison to the MSI of [24]. This can be seen
in Fig. 7(a), (c), and (d). In the case of mode 2, i.e., for the
Fig. 7. Conduction losses of the switches in LF section of the proposed
modulation indexes in the interval of (0.25 0.5] both topologies
topology and topology presented in [24]. (a) Mode 1. (b) Mode 2. (c) Mode 3. show similar performances. The reason is that in this mode, the
(d) Mode 4. same number of switching devices has been used to synthesize
the reference voltage waveform in both topologies. Fig. 7(b)
depicts the results for mode 2. The calculated efficiency from
simulations is shown in Fig. 8 for both topologies. As expected,
MSI topology and topology presented in [24]. As can be seen, the proposed topology has enhanced efficiency in modes 1, 3,
the number of conducting devices is lower in the proposed and 4, which are shown in Fig. 8(a), (c), and (d). In case of mode
topology. Therefore, it is expected that the proposed topology (2), both converters show similar calculated efficiencies, which
has lower conduction losses. The switching loss of the LF section agrees with the theory.
is negligible. The conduction and switching losses of the HF
section are the same for the two topologies.
The power losses calculation of the switching devices has V. SIMULATION RESULTS
been carried out using the PSIM simulation package. The se- In this section, the proposed MSI topology along with the
lected switch used in this article is IKW25N120H3 with cur- proposed SVM technique and control method has been exploited
rent and voltage rating of 25 A and 1200 V, respectively. The in two case studies. For the first case study, the simulations have
datasheet characteristics of this device consist of the transistor been done for a constant resistive-inductive load under various
forward conduction (collector–emitter voltage vs collector cur- operating conditions. In the second study, to further verify the
rent), the transistor switching energy losses, the diode forward performance of the proposed MSI for EV applications, it is
conduction (diode forward voltage vs diode forward current), used as a traction inverter for the ECE-15 driving cycle as a
and the diode switching energy losses are added to the device European Union-approved driving schedule for testing vehicle
database editor of the PSIM. performance.
The parameters associated with power loss simulations are The simulation results were obtained by the PSIM simulation
given in Table V. The voltage amplitude of dc source 1, VDC1 , is package. Table V gives the simulated system parameters. All
considered to be three times the voltage amplitude of sx source 2, switches are assumed to be ideal in this stage as the scope of
VDC2 . Therefore, considering (2), the MSIs can have modulation simulation is to evaluate the modulation scheme, control tech-
indexes in the intervals [0 0.25], (0.25 0.5], (0.5 0.75], and (0.75 nique, and operation of the proposed MSI at various operating
1] when operating at modes 1, 2, 3, and 4, respectively. modes.
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1990 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 37, NO. 2, FEBRUARY 2022
Fig. 9. Simulation results in mode 1. (a) DC-source currents. (b) Line voltage.
(c) Load currents. Fig. 10. Simulation results in mode 2. (a) DC-source currents. (b) Line voltage.
(c) Load currents.
A. Simulation Results for a Constant-Impedance Load
Fig. 9 illustrates the simulation results of the system when
the reference current of the load is set to 20 A. Under this
condition, the modulation index is established to be 0.25, which
is the maximum modulation index of mode 1. As can be seen in
Fig. 9(a), in mode 1, the current of the dc source 1 is zero and
the dc source 2 provides power to the load. The average of dc
current 1 is equal to 23.5 A. The root mean square (rms) value of
the current ripple is 6.4 A. The output line voltage resulted from
the SVM scheme is shown in Fig. 9(b). The peak value of the
line-to-line voltage waveform is equal to the voltage amplitude
of dc source 2. The load currents are shown in Fig. 9(c). The
rms values of the currents are the desired values of 20 A.
Fig. 10 shows the simulation results when the load reference
current is set to be 32 A. For such reference value, the closed-loop
current controller forces the converter to operate in mode 2. The
modulation index is 0.4 at this operating point. A positive current
and a negative current are drawn from the high voltage dc-link
and the low voltage dc-link, respectively. Indeed, the low voltage
dc-link is charged from the high voltage dc-link. The charging
current of the dc source 2 is equal to the input dc current of Fig. 11. Simulation results in mode 3. (a) DC-source currents. (b) Line voltage.
the VSI. Indeed, the load power is provided by the high voltage (c) Load currents.
dc-link. As can be seen in Fig. 10(a), the average current of the
dc source 1 is 30 A, and the average current of the dc source 2 is
−30 A. The rms value of the current ripples of the dc sources is index is set to 0.7. Fig. 11 shows the simulation results when the
17.7 A. The resulted output line voltage of mode 2 is shown in load reference current is set to be 55 A. The high dc-link voltage
Fig. 10(b). The peak value of the line-to-line voltage waveform is being used, which is shown in Fig. 11(a) by a positive current
is equal to the difference between the high dc-link voltage and while the low dc-link voltage remains null. The average current
the low dc-link voltage. The three-phase currents of the load are of the dc source 1 is 61.5 A.
shown in Fig. 10(c), which are controlled at the desired reference The rms value of the current ripple is 23.8 A. The output line
value of 32 A. voltage resulted from the SVM scheme is shown in Fig. 11(b).
To force the converter to operate in mode 3, the desired refer- The peak value of the line-to-line voltage waveform is equal to
ence current is increased to 55 A. Consequently, the modulation the high dc-link voltage. The load currents in mode 3 are shown
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EBRAHIMI et al.: EFFICIENCY IMPROVED MULTISOURCE INVERTER FOR HESS IN ELECTRIC VEHICLE APPLICATION 1991
Fig. 13. Simulation results when the operating mode is changed from the mode
Fig. 12. Simulation results in mode 4. (a) DC-source currents. (b) Line voltage. 1 to the mode 2. (a) DC-source currents. (b) Line voltage. (c) Load currents.
(c) Load currents.
in Fig. 11(c). The rms values of the currents are the desired
values of 55 A.
Fig. 12 illustrates the simulation results when the converter
operates at operating mode 4. The load reference current is
set to be 75 A. For such reference value, the controller forces
the converter to operate in modulation index 0.95, which is in
operating mode 4. The same positive current is drawn from the
high voltage dc-link and the low voltage dc-link. The load power
is provided by both dc sources. In this mode, the two input
sources are in series, and the negative pole of the dc source 2 is
connected to the positive pole of the dc source 1. Consequently,
the dc-link voltage of the VSI is equal to the sum of the dc
voltage source 1 and the dc voltage source 2. The currents of
the dc sources are shown in Fig. 12(a), which have an average
of 84.8 A. The rms value of current ripples of the dc sources
is 30.8 A. As can be seen in Fig. 12(b), the output line voltage
waveform of mode 4 has a peak value equal to the sum of the
high dc-link voltage and the low dc-link voltage. The three-phase
currents of the load are shown in Fig. 12(c), which are controlled
at the desired reference value of 75 A.
To show the transient performance of the proposed MSI
topology, a step change from modes 1 to 2 at t = 0.2 s is applied. Fig. 14. Simulation results when the operating mode is changed from the mode
The dc source currents, output line voltage, and load currents are 3 to the mode 4. (a) DC source currents. (b) Line voltage. (c) Load currents.
shown in Fig. 13. At the beginning of the simulation, the MSI is
running in operating mode 1. The dc source 1 supplies the load
with a current of 23.5 A. At t = 0.2 s, the converter is switched
to mode 2. As it can be seen, in mode 2, the high voltage source, operating mode 3, the dc source 2 supplies the load with a current
i.e., VDC1 charges the low voltage source VDC2 with a current of of 23.5 A. the modulation index is set to 0.65. At t = 0.2 s, the
around 35 A and supplies the load concurrently. Thus, the low reference current is changed to 75 A and the MSI is switched to
voltage source current is negative with the same amplitude as operating mode 4. Consequently, two dc sources are placed in
the first dc source. series to feed the load. In this mode, both sources have a similar
Another step-change from modes 3 to 4 is applied to the current of 35 A. The line voltage and the three-phase load current
converter at t = 0.2 s. the results are shown in Fig. 14. In are shown for both cases in Fig. 14(b) and (c), respectively.
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1992 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 37, NO. 2, FEBRUARY 2022
TABLE VI
SIMULATION PARAMETERS OF THE THREE-PHASE INDUCTION MACHINE
Fig. 15. Block diagram of the vector control of induction machine.
B. Simulation Results for the ECE-15 Driving Cycle
In this part, application of the proposed MSI along with the
proposed supervisory control strategy is tested on the ECE-15
driving cycle as a standard driving test for verifying the per-
formance of electric vehicles. An induction machine with the
parameters listed in Table VI is used in the simulations. In
addition, for controlling the speed of the induction machine
to follow the reference speed, a field-oriented control (FOC)
scheme showing in Fig. 15 is used [35]. The direct axis stator
Fig. 16. Simulation results for evaluation of the proposed MSI for ECE-15
current element, shown by isd in Fig. 15, is controlled to be driving cycle. (a) Motor speed curve. (b) Load torque. (c) Operating mode. (d)
kept constant. It is worth mentioning that the direct axis stator currents of the first and the second battery packs. (e) SOC of the first battery
current element isd essentially counts for the induced airgap flux. pack, and (f) SOC of the second battery pack.
This way, by controlling the stator quadrature axis current, i.e.
isq , the motor speed can be controlled to follow the reference
speed in a decoupled manner. To this end, the reference speed
and the sensed speed from the motor shaft are compared and frame and fed to the SVM block to control the switching actions
the result is passed through a PI controller to generate the of the proposed inverter such that the stator voltages with the
reference quadrature axis current share. The generated direct desired amplitude and frequency are fed to the electric machine.
and quadrature axis current elements, i.e., isd-ref and isq-ref The first dc source is chosen to be a battery pack with a voltage
are compared with the sensed stator currents in abc frame and rating of 450 V, and initial SOC of 70%, while the second dc
transformed to the DQ frame. The resultant error quantities are source is a battery pack with a voltage rating of 150 V and
passed through PI controllers to generate the reference stator an initial SOC of 80%. Fig. 16(a) and (b) indicates the speed
voltages in the synchronous DQ frame. The generated DQ frame curves and load torque of the ECE-15 driving cycle during the
Vd-ref and Vq-ref quantities are ultimately transformed to the αβ simulation time.
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EBRAHIMI et al.: EFFICIENCY IMPROVED MULTISOURCE INVERTER FOR HESS IN ELECTRIC VEHICLE APPLICATION 1993
As it can be seen in Figs. 16(a) and (b), the reference speed and TABLE VII
EXPERIMENTAL SYSTEM PARAMETERS
the load torque are tracked properly by the induction machine
controlled by the FOC and fed through the proposed MSI. To
further discuss the performance of the proposed MSI under the
test-driving cycle, Fig. 16(c)–(f) indicate the operating mode of
the MSI, currents and measured SOCs of the first and the second
battery packs over the course of simulation time, respectively.
During the first 10 s, the vehicle is in the idle mode, and
the extracted current from both sources are zero. Thus, their
SOCs remains unchanged at the initial values of 70% for the
main battery pack and 80% for the auxiliary battery pack. As
the vehicle starts to ramp up the speed at t = 10 s, the converter
starts to operate in mode 1 and changes operating mode to mode
2 and mode 3 until the electric motor reaches its final speed of
around 43 km/hr at t = 15s, where the applied torque starts to
decrease to zero to reduce the further acceleration of the vehicle
and keep the speed at its current value. speed value, the MSI operates in mode 2 where again the main
At t = 21s, a negative torque is applied to the electric motor, battery pack charges the auxiliary battery pack and supplies the
which causes the speed to decrease accordingly. The restored electric machine simultaneously. Thus, the current of the main
energy from the brake is stored in the second battery pack, which battery pack is 4.8 A while the current of the auxiliary battery
causes its SOC to increase slightly. The vehicle keeps reducing pack is -4.8A. Finally, at t = 187s, the vehicle reduces the speed
the speed, where at t = 27s it reaches the speed of zero and stays to zero and enters the standstill. As it can be seen in Fig. 16(e)
idle till t = 50 s. Right after that, due to the applied positive and (f), the final SOC of the main battery pack is 69.4% while
torque, the vehicle starts to accelerate, which causes the speed the SOC of the auxiliary battery pack is 67.8% at the end of the
to increase accordingly. driving schedule.
At low initial reference speed values, the MSI starts to operate
at mode 1 as expected and as the speed increases furthermore, VI. EXPERIMENTAL RESULTS
the requested stator voltage increases which causes the MSI to To demonstrate the practicality of the proposed MSI topology,
operate in mode 2. As it can be seen, the first battery pack is a scaled-down prototype was implemented in the lab. A DSP-
discharged due to the positive current amplitude being extracted based digital control platform was used to generate PWM signals
from it, while the second battery pack is charging with the and perform capacitor voltage control. The important parameters
negative current amplitude. As the vehicle increases speed, the of the experimental system are given in Table VII.
operating mode is changed between modes 2 and 3 to adjust the Fig. 17 shows the experimental line voltage and load currents
desired reference speed. associated with the proposed MSI topology under mode 1. The
It is worth mentioning that as reported in [21], the oscillation load reference current is set to 2 A. The battery pack 1 and the
between two consecutive modes during speed acceleration or battery pack 2 have been charged to 120 and 30 V, respectively.
deceleration can also be interpreted as the parallel power share The line voltage waveform has negative and positive peak values
between the two sources, which mimics the parallel operation associated with the dc voltage of battery pack 2, which is 30 V.
of hybrid storage systems using the conventional parallelly con- The output voltage using the proposed SVM scheme results
nected dc/dc converters in EV applications with hybrid storage in three-phase sinusoidal currents at the load. Fig. 18 shows
systems. This feature is also very beneficial in reducing the main the experimental results of mode 1, containing the dc source
battery pack duty to increase its life span. currents. As can be seen, the battery pack 2 provides the load
As the reference speed increases, the MSI operates in modes power and the current of dc source 1 is zero. The current of dc
3 and 4 to fulfill the further speed increase. This scenario goes source 1 has a positive average value and ripples associate with
on until t = 60 s where the vehicle reaches its speed at around 95 the three-phase load currents.
km/hr, and the main battery SOC is 69.5% while the secondary To show the performance of the proposed topology in oper-
battery SOC is around 81.5%. At this time, the load torque starts ating mode 2, the reference current is increased to 3.5 A. The
to decrease to prevent further speed increase and the vehicle modulation index is set to a different value of 0.45. The mea-
keeps its current speed till t = 85 S where the SOC of the main sured line-to-line voltage and three-phase currents are shown
battery pack is 69.2% and the SOC of the auxiliary battery pack in Fig. 19. The peak-to-peak value of Vab is analogous to the
is 79.5%. Similar discussions can be applied to the rest of the theoretical values resulted from the utilized SVM scheme. In
simulated driving schedule. For instance, at t = 143s the vehicle mode 2, the dc source 1 and battery pack of dc source 2 are in
reference speed is 148 km/hr, which is the highest required speed the energy flow loop. But, the dc source 1 charges the battery
during the ECE-15 driving schedule. As expected, the controller pack and supplies the load. The positive dc current of source 1
has forced the MSI to operate in mode 4 where both sources are and the negative dc current of source 2 are shown in Fig. 20.
placed in series to supply the electric machine such that the Performance of the proposed MSI under mode 3 with the
reference speed is met. At t = 184s, due to the low required current reference amplitude of 5 A is shown in Fig. 21. The dc
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1994 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 37, NO. 2, FEBRUARY 2022
Fig. 19. Experimental results for mode 2. Line voltage (50 V/div), and the
load currents (2 A/div); time scale (10 ms/div).
Fig. 17. Experimental results for mode 1. Line voltage (20 V/div), and the
load currents (2 A/div); time scale (10 ms/div).
Fig. 20. Experimental results for mode 2, from top to bottom, dc source 1
current (2 A/div), dc source 2 current (2 A/div), load current (5 A/div), Line
voltage (50 V/div); and time scale (10 ms/div).
To extract experimental results in mode 4, the reference cur-
rent is increased to 6.5 A. Fig. 23 shows the line-to-line voltage
and three-phase load currents of the proposed MSI in mode 4.
Fig. 18. Experimental results for mode 1, from top to bottom, line voltage
(20 V/div), load current (1 A/div), dc source 2 current (1 A/div), dc source 1 As can be seen in Fig. 24, both dc sources are feeding the load
current (0.5 A/div); time scale (5 ms/div). together with the same current amplitude, which agree with the
theory and simulations.
To further investigate the efficiency performance, the effi-
source 1 provides the required power of the load with a positive ciency of the proposed MSI is measured using experiments as
average value of around 2.2 A. The dc-link voltage of the VSI shown in Fig. 25. For each modulation index, one efficiency
has voltage amplitude equal to the dc voltage source 1. Con- point is calculated, which counts for each operating mode. The
sequently, the line voltage waveform has maximum amplitude efficiency is calculated as the ratio between the converter total
equal to the dc voltage source 1, which is around 90 V. The dc output power and the sum of the powers extracted from both dc
source currents for this mode are also shown in Fig. 22. As can sources, as follows:
be seen, the higher dc voltage source is in the load current path Pout
with a positive average value. The current of dc voltage source η(%) = × 100. (7)
Psources
2 is zero.
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EBRAHIMI et al.: EFFICIENCY IMPROVED MULTISOURCE INVERTER FOR HESS IN ELECTRIC VEHICLE APPLICATION 1995
Fig. 23. Experimental results for mode 4. Line voltage (100 V/div), and the
Fig. 21. Experimental results for mode 3. Line voltage (50 V/div), and the load currents (2 A/div); and time scale (10 ms/div).
load currents (2 A/div); and time scale (10 ms/div).
Fig. 24. Experimental results for mode 4, from top to bottom, dc source 1
Fig. 22. Experimental results for mode 3, from top to bottom, dc source 1 current (2 A/div), dc source 2 current (2 A/div), load current (5 A/div), line
current (2 A/div), dc source 2 current (2 A/div), load current (5 A/div), line voltage (50 V/div); and time scale (10 ms/div).
voltage (50 V/div); and time scale (10 ms/div).
simulation and experiments. Moreover, there are some power
losses in the PCB layout and passive elements, such as dc-link
The sources’ power Psources is equal to PDC2 , PDC1 -PDC2 , capacitors, that cause efficiency drop in the experiments.
PDC1 , and PDC1 +PDC2 in modes 1–4, respectively.
For modulation index M = 0.25, where the MSI operates in
mode 1, the measured efficiency is around 94.5%. At modulation VII. CONCLUSION
index M = 0.45 where the converter works in mode 2, the effi- In this article, a new MSI topology has been proposed as a hy-
ciency is around 95.75%. In mode 3, at M = 0.65 the efficiency brid structure of conventional inverter topologies. The proposed
is 96%, and at M = 0.85 where mode 4 happens, the efficiency MSI is introduced for the single-stage magnetic-less combina-
is around 97.2%. Comparing the simulation results with the tion of two dc sources such as a battery pack and an SC bank in
experimental measurements shows some efficiency mismatch, EV applications. The main advantage of the proposed converter
which is due to the different voltage and current ratings in the is that it reduces conduction losses compared with the recently
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1996 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 37, NO. 2, FEBRUARY 2022
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Fuel Cell Vehicles Fundamentals, Theory, and Design, 2nd ed. New York, received the Ph.D. degree in electrical and computer
NY, USA: CRC Press, 2010. engineering from the University of British Columbia,
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NJ, USA: Wiley, 2017. versity, Kingston, ON, Canada, where he is currently
[33] H. Karimi, M. Karimi-Ghartemani, and K. Sheshyekani, “Robust control a Professor and the Director of BioRobotics Research Laboratory. His research
of three-phase voltage source converters under unbalanced grid condi- interests include haptics, telerobotics, mechatronics, modeling and controls, and
tions,” IEEE Trans. Power Electron., vol. 34, no. 11, pp. 11278–11289, their applications in medicine and biomedical engineering.
Nov. 2019. Dr. Hashtrudi-Zaad was an Associate Editor for the IEEE TRANSACTIONS ON
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London, U.K.: Oxford Univ. Press, 1996.
Javad Ebrahimi (Member, IEEE) received the Ph.D.
degree in power electronics from the Isfahan Uni-
versity of Technology, Isfahan, Iran, in 2017, and Alireza Bakhshai (Fellow, IEEE) received the B.Sc.
the M.Sc. (hons.) in electrical engineering from the and M.Sc. degrees from the Isfahan University of
Amirkabir University of Technology, Tehran, Iran, Technology, Isfahan, Iran, in 1984 and 1986, respec-
in 2010, and the B.Sc. degrees (hons.) in electrical tively, and the Ph.D. degree from Concordia Univer-
engineering from the University of Tabriz, Tabriz, sity, Montreal, QC, Canada, in 1997, all in electrical
Iran, in 2008, respectively. engineering.
He is currently a Postdoctoral Fellow with the He is currently a Faculty Member with the De-
Department of Electrical and Computer Engineering, partment of Electrical and Computer Engineering,
Queen’s University, Kingston, ON, Canada. From Queen’s University and a Licensed Professional En-
2017 to 2019, he was an R&D Director with Behrad Consulting Engineers gineer (P. Eng.) in Ontario. From 1986 to 1993 and
Company, where he was working closely with utilities and industries, and from 1998 to 2004, he was a Faculty Member with
actively involved in research in the areas of power electronics and power systems. the Department of Electrical and Computer Engineering, Isfahan University of
Dr. Ebrahimi was a recipient of the Special Grants for Superior Talents in Technology. His research interests include high power electronics, distributed
Education, Research, and Innovation from the National Elite Foundation, Iran, energy generation and conversion, microgrid and smart grid systems, and
from 2012 to 2016. advanced control theories applied to power electronics converters.
Omid Salari (Student Member, IEEE) was born in
Noorabad Mamasani, Iran, in 1991. He received the
B.Sc. in electrical engineering from the Isfahan Uni-
versity of Technology, Isfahan, Iran, in 2013, and Praveen Jain (Fellow, IEEE) received the M.A.Sc.
the M.Sc. degree in power electronics from K. N. and Ph.D. degrees in electrical engineering from the
Toosi University of Technology, Tehran, Iran, in 2015, University of Toronto, Toronto, ON, USA, in 1984
and the Ph.D. degree in power electronics from the and 1987, respectively.
Queens Centre for Energy and Power Electronics He is currently a Professor of electrical and com-
Research, Kingston, ON, Canada, in 2020. puter engineering, a Tier 1 Canada Research Chair in
He is currently an Electrical Design Engineer with Power Electronics, and the Director of the Queen’s
the Sparq Systems Inc., Kingston, ON, Canada. His Centre for Energy and Power Electronics Research,
research interests include switching power converters, modulation and control Queen’s University, Kingston, ON, Canada. His 36-
techniques for dc/ac inverters, electric vehicles, and solar micro inverters. year career is marked by significant contributions
to the theory and practice of power electronics, and
through his considerable consulting work with the industry, including Astec,
Freescale, General Electric, Intel, and Nortel. In the late 1980s, he played a
Suzan Eren (Member, IEEE) received the B.Sc. (with key role in the design and development of high-frequency power conversion
first class hons.), M.Sc., and Ph.D. degrees from equipment for the International Space Station with Canadian Astronautics.
Queen’s University, Kingston, ON, Canada, in 2006, Subsequently, he made pioneering contributions in introducing resonant power
2008, and 2013, respectively, all in electrical engi- conversion technology in telecommunications during his work at Nortel in
neering. the 1990s. He is the Founder of two successful start-up companies, CHiL
She is currently an Assistant Professor with the semiconductor, specializing in digital power solutions (acquired by International
Department of Electrical and Computer Engineering, Rectifier), and SPARQ systems, developing innovative photovoltaic microinvert-
Queen’s University, and a member of ePOWER, the ers. He has supervised and guided almost 100 graduate students, postdoctoral
Queen’s Centre for Energy and Power Electronics fellows, and power electronics engineers who are well placed in the industry
Research Group. Her industrial experience includes and academia. He has authored or coauthored more than 500 papers and holds
collaboration with SPARQ Systems in developing 100 patents (granted and pending).
their highly efficient solar microinverter. She is the Kingston Section Chair Dr. Jain is an IEEE IAS Distinguished Lecturer and a fellow of the Royal
of the Institute of Electrical and Electronics Engineers, Co-Founder of the Society of Canada, the Engineering Institute of Canada, and the Canadian
IEEE Women in Engineering Affinity Group in Kingston, the author of 60 Academy of Engineering. He was the recipient of many awards and honors, such
peer-reviewed papers, and the holder of 11 issued and pending U.S. patents. Her as the Queen’s Prize for Excellence in Research, the IEEE William Newell Power
research interests include control and signal processing techniques for power Electronics Award, and the Engineering Medal of the Professional Engineers of
converters used in microgrid and renewable energy applications. Ontario.
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