Chapter 9: Main Memory

Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018
 Chapter 9: Memory Management
▪ Background
▪ Contiguous Memory Allocation
▪ Paging
▪ Structure of the Page Table
▪ Swapping
▪ Example: The Intel 32 and 64-bit Architectures
▪ Example: ARMv8 Architecture

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 Objectives

▪ To provide a detailed description of various ways of organizing memory

hardware
▪ To discuss various memory-management techniques,
▪ To provide a detailed description of the Intel Pentium, which supports
both pure segmentation and segmentation with paging

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 Background
▪ Program must be brought (from disk) into memory and placed within a
process for it to be run
▪ Main memory and registers are the only storage CPU can access
directly
▪ Memory unit only sees a stream of:
• addresses + read requests, or
• address + data and write requests
▪ Register access is done in one CPU clock (or less)
▪ Main memory can take many cycles, causing a stall
▪ Cache sits between main memory and CPU registers
▪ Protection of memory required to ensure correct operation

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 Protection
▪ Need to ensure that a process can access only those addresses in its
address space.
▪ We can provide this protection by using a pair of base and limit
registers to define the logical address space of a process

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 Example

▪ If a process is allocated memory from address 1000 to 2000:

• Base Register = 1000
• Limit Register = 1000 (indicating the process can access 1000 bytes
starting at address 1000)
▪ A request to access address 1500:
• Check: Success

• Access is allowed.
▪ A request to access address 2500:
• Check fails, generating an error or trap.

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 Hardware Address Protection
▪ CPU must check every memory access generated in user mode to
be sure it is between base and limit for that user

▪ the instructions to loading the base and limit registers are privileged

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 Address Binding
▪ Programs on disk, ready to be brought into memory to execute form an
input queue
• Without support, must be loaded into address 0000
▪ Inconvenient to have first user process physical address always at 0000
• How can it not be?
▪ Addresses represented in different ways at different stages of a
program’s life
• Source code addresses usually symbolic
• Compiled code addresses bind to relocatable addresses
4 i.e., “14 bytes from beginning of this module”
• Linker or loader will bind relocatable addresses to absolute
addresses
4 i.e., 74014
• Each binding maps one address space to another

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 Binding of Instructions and Data to Memory

▪ Address binding of instructions and data to memory addresses can

happen at three different stages
• Compile time: If memory location known a priori, absolute code
can be generated; must recompile code if starting location changes
• Load time: Must generate relocatable code if memory location is
not known at compile time
• Execution time: Binding delayed until run time if the process can be
moved during its execution from one memory segment to another
4 Need hardware support for address maps (e.g., base and limit
registers)

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 Multistep Processing of a User Program

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 Logical vs. Physical Address Space

▪ The concept of a logical address space that is bound to a separate

physical address space is central to proper memory management
• Logical address – generated by the CPU; also referred to as
virtual address
• Physical address – address seen by the memory unit
▪ Logical and physical addresses are the same in compile-time and load-
time address-binding schemes; logical (virtual) and physical addresses
differ in execution-time address-binding scheme
▪ Logical address space is the set of all logical addresses generated by
a program
▪ Physical address space is the set of all physical addresses generated
by a program

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 Memory-Management Unit (MMU)
▪ Hardware device that at run time maps virtual to physical address

▪ Many methods possible, covered in the rest of this chapter

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 Memory-Management Unit (Cont.)
▪ Consider a simple scheme. Which is a generalization of the base-
register scheme.
▪ The base register, now called the relocation register
▪ The value in the relocation register is added to every address generated
by a user process at the time it is sent to memory
▪ The user program deals with logical addresses; it never sees the real
physical addresses
• Execution-time binding occurs when reference is made to a location
in memory
• Logical address bound to physical addresses in Execution time

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 Memory-Management Unit (Cont.)
▪ Consider simple scheme. which is a generalization of the base-register
scheme.
▪ The base register now called relocation register
▪ The value in the relocation register is added to every address generated
by a user process at the time it is sent to memory

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 Dynamic Loading
▪ The entire program does need to be in memory to execute
▪ Routine is not loaded until it is called
▪ Better memory-space utilization; unused routine is never loaded
▪ All routines kept on disk in relocatable load format
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Relocatable Code: This code is not bound to a specific memory address.
When a program is compiled, the compiler generates object code with
addresses starting at some base location, often zero. This object code is
considered relocatable because it can be placed at any point in memory.
▪ Useful when large amounts of code are needed to handle infrequently
occurring cases
▪ No special support from the operating system is required
• Implemented through program design
• OS can help by providing libraries to implement dynamic loading

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 Dynamic Linking
▪ Static linking – system libraries and program code combined by the
loader into the binary program image
▪ Dynamic linking –linking postponed until execution time
▪ Small piece of code, stub, used to locate the appropriate memory-
resident library routine
▪ Stub replaces itself with the address of the routine and executes the
routine
▪ The operating system checks if the routine is in the processes’ memory
address
• If not in address space, add to address space
▪ Dynamic linking is particularly useful for libraries
▪ System also known as shared libraries
▪ Consider applicability to patching system libraries
• Versioning may be needed

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 Contiguous Allocation

▪ Main memory must support both OS and

user processes
▪ Limited resource, must allocate efficiently
▪ Contiguous allocation is one early method
▪ Main memory usually into two partitions:
• Resident operating system, usually held
in low memory with interrupt vector
• User processes then held in high
memory
• Each process contained in single
contiguous section of memory

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 Contiguous Allocation (Cont.)
▪ Relocation registers used to protect user processes from each other,
and from changing operating-system code and data
• Base register contains value of smallest physical address
• Limit register contains range of logical addresses – each logical
address must be less than the limit register
• MMU maps logical address dynamically
• Can then allow actions such as kernel code being transient and
kernel changing size

The concept of transient

kernel code allows an
operating system's kernel
to load and unload code
dynamically, enabling it to
change size and adapt to
the system’s needs without
requiring a full reboot.

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 Hardware Support for Relocation and Limit Registers

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 Variable Partition
▪ Multiple-partition allocation
• Degree of multiprogramming limited by number of partitions
• Variable-partition sizes for efficiency (sized to a given process’ needs)
• Hole – block of available memory; holes of various size are scattered
throughout memory
• When a process arrives, it is allocated memory from a hole large enough to
accommodate it
• Process exiting frees its partition, adjacent free partitions combined
• Operating system maintains information about:
a) allocated partitions b) free partitions (hole)

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 Dynamic Storage-Allocation Problem
How to satisfy a request of size n from a list of free holes?

▪ First-fit: Allocate the first hole that is big enough

▪ Best-fit: Allocate the smallest hole that is big enough; must
search entire list, unless ordered by size
• Produces the smallest leftover hole
▪ Worst-fit: Allocate the largest hole; must also search entire list
• Produces the largest leftover hole

First-fit and best-fit better than worst-fit in terms of speed and storage
utilization

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 Fragmentation
▪ What is Fragmentation?
Small non utilized fragmented memory spaces that are so small due
to which normal processes can not fit into them.

▪ External Fragmentation – total memory space exists to satisfy a

request, but it is not contiguous
When the memory space in the system can easily satisfy the
requirement of the processes, but this available memory space is non-
contiguous, So it can’t be utilized further. Then this problem is
referred to as External Fragmentation.
▪ Internal Fragmentation – allocated memory may be slightly larger than
requested memory; this size difference is memory internal to a partition,
but not being used
▪ First fit analysis reveals that given N blocks allocated, 0.5 N blocks lost
to fragmentation
• 1/3 may be unusable -> 50-percent rule

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 Fragmentation (Cont.)
▪ Reduce external fragmentation by compaction
• Shuffle memory contents to place all free memory together in one
large block
• Compaction is possible only if relocation is dynamic, and is done at
execution time
• I/O problem
4 Latch job in memory while it is involved in I/O
4 Do I/O only into OS buffers
▪ Now consider that backing store has same fragmentation problems

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 Paging
▪ Physical address space of a process can be noncontiguous; process
is allocated physical memory whenever the latter is available
• Avoids external fragmentation
• Avoids problem of varying sized memory chunks
▪ Divide physical memory into fixed-sized blocks called frames
• Size is power of 2, between 512 bytes and 16 Mbytes
▪ Divide logical memory into blocks of same size called pages
▪ Keep track of all free frames
▪ To run a program of size N pages, need to find N free frames and load
program
▪ Set up a page table to translate logical to physical addresses
▪ Backing store likewise split into pages
▪ Still have Internal fragmentation

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 Address Translation Scheme
▪ Address generated by CPU is divided into:
• Page number (p) – used as an index into a page table which
contains base address of each page in physical memory
• Page offset (d) – combined with base address to define the
physical memory address that is sent to the memory unit

• For given logical address space 2m and page size 2n

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 Paging Hardware

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 Paging Model of Logical and Physical Memory

Frame
Page Index Num

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 Paging Example
▪ Logical address: n = 2 and m = 4. Using a page size of 4 bytes and a
physical memory of 32 bytes (8 pages)

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 Paging -- Calculating internal fragmentation

▪ Page size = 2,048 bytes

▪ Process size = 72,766 bytes
▪ 35 pages + 1,086 bytes
▪ Internal fragmentation of 2,048 - 1,086 = 962 bytes
▪ Worst case fragmentation = 1 frame – 1 byte
▪ On average, fragmentation = 1 / 2 frame size
▪ So small frame sizes desirable? Decrease fragmentation
▪ But each page table entry takes memory to track
▪ Page sizes growing over time
• Solaris supports two-page sizes – 8 KB and 4 MB

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 Free Frames

Before allocation After allocation

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 Implementation of Page Table
▪ Page table is kept in main memory
• Page-table base register (PTBR) points to the page table
• Page-table length register (PTLR) indicates size of the page table
▪ In this scheme every data/instruction access requires two memory
accesses
• One for the page table and one for the data / instruction
▪ The two-memory access problem can be solved by the use of a special
fast-lookup hardware cache called translation look-aside buffers
(TLBs) (also called associative memory).

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 End of Chapter 9

Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018