S-1200 Series CMOS Voltage Regulator
S-1200 Series CMOS Voltage Regulator
The S-1200 Series, developed by using CMOS technology, is a positive voltage regulator with a low dropout
voltage, high accuracy output voltage.
A 0.1 μF small ceramic capacitor can be used. It operates with low current consumption of 18 μA typ.
The built-in output current protection circuit prevents the load current from exceeding the current capacity of the
output transistor.
Compared with the voltage regulators using the conventional CMOS technology, small ceramic capacitors are
also available.
Features
• Output voltage: 1.5 V to 5.5 V, selectable in 0.1 V step
• Input voltage: 2.0 V to 10.0 V
• Output voltage accuracy: ±1.0%
• Dropout voltage: 140 mV typ. (3.0 V output product, IOUT = 100 mA)
• Current consumption: During operation: 18 μA typ., 40 μA max.
During power-off: 0.01 μA typ., 1.0 μA max.
• Output current: Possible to output 150 mA (VIN ≥ VOUT(S) + 1.0 V)*1
• Input and output capacitors: A ceramic capacitor of 0.1 μF or more can be used.
• Ripple rejection: 70 dB typ. (f = 1.0 kHz, 1.5 V ≤ VOUT ≤ 3.0 V)
65 dB typ. (f = 1.0 kHz, 3.1 V ≤ VOUT ≤ 5.5 V)
• Built-in overcurrent protection circuit: Limits overcurrent of output transistor.
• Built-in ON/OFF circuit: Ensures long battery life.
• Operation temperature range: Ta = −40°C to + 85°C
• Lead-free, Sn 100%, halogen-free*2
*1. Attention should be paid to the power dissipation of the package when the output current is large.
*2. Refer to “ Product Name Structure” for details.
Applications
• Power supply for battery-powered device
• Power supply for personal communication device
• Power supply for home electric appliance
• Power supply for cellular phone
Packages
• SNT-6A(H)
• SOT-23-5
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series Rev.6.0_00
Block Diagram
*1
VIN VOUT
Overcurrent
protection circuit
ON/OFF
+
ON/OFF circuit −
Reference
voltage circuit
VSS
Figure 1
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.6.0_00 S-1200 Series
1. Product name
1. 1 SNT-6A(H)
S-1200 x xx - I6T2 U
Environmental code
U : Lead-free (Sn 100%), halogen-free
*1
Package abbreviation and packing specifications
I6T2 : SNT-6A(H), Tape
Output voltage
15 to 55
(e.g. When output voltage is 1.5 V, it is expressed as 15.)
*2
Product type
A : ON/OFF pin negative logic
B : ON/OFF pin positive logic
1. 2 SOT-23-5
S-1200 x xx - M5T1 x
Environmental code
U : Lead-free (Sn 100%), halogen-free
G : Lead-free (for details, please contact our sales
representatives)
Package abbreviation and packing specifications*1
M5T1 : SOT-23-5, Tape
Output voltage
15 to 55
(e.g. When output voltage is 1.5 V, it is expressed as 15.)
Product type*2
A : ON/OFF pin negative logic
B : ON/OFF pin positive logic
2. Packages
Drawing Code
Package Name
Package Tape Reel Land
SNT-6A(H) PI006-A-P-SD PI006-A-C-SD PI006-A-R-SD PI006-A-L-SD
SOT-23-5 MP005-A-P-SD MP005-A-C-SD MP005-A-R-SD ⎯
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series Rev.6.0_00
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.6.0_00 S-1200 Series
Pin Configurations
SNT-6A(H) Table 2
Top view Pin No. Symbol Pin Description
1 VOUT Output voltage pin
1 6
2 VSS GND pin
2 5 3 NC*1 No connection
3 4 4 ON/OFF ON/OFF pin
5 VSS GND pin
Figure 2 6 VIN Input voltage pin
*1. The NC pin is electrically open.
The NC pin can be connected to the VIN pin or the VSS
pin.
SOT-23-5 Table 3
Top view
Pin No. Symbol Description
5 4 1 VIN Input voltage pin
2 VSS GND pin
3 ON/OFF ON/OFF pin
4 NC*1 No connection
5 VOUT Output voltage pin
*1. The NC pin is electrically open.
The NC pin can be connected to the VIN pin or the VSS
pin.
1 2 3
Figure 3
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series Rev.6.0_00
Caution The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
1200
Power Dissipation (PD) [mW]
1000
800
600
SOT-23-5
400
200
SNT-6A(H)
0
0 50 100 150
Ambient Temperature (Ta) [°C]
Figure 4 Power Dissipation of The Package (When Mounted on Board)
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.6.0_00 S-1200 Series
Electrical Characteristics
Table 5
(Ta = +25°C unless otherwise specified)
Test
Item Symbol Conditions Min. Typ. Max. Unit
Circuit
VOUT(S) VOUT(S) VOUT(S)
Output voltage*1 VOUT(E) VIN = VOUT(S) + 1.0 V, IOUT = 30 mA V 1
× 0.99 × 1.01
Output current*2 IOUT VIN ≥ VOUT(S) + 1.0 V 150*5 ⎯ ⎯ mA 3
Dropout voltage*3 Vdrop IOUT = 30 mA 1.5 V ≤ VOUT(S) ≤ 1.9 V 0.50 0.50 0.51 V 1
2.0 V ≤ VOUT(S) ≤ 2.4 V ⎯ 0.08 0.12 V 1
2.5 V ≤ VOUT(S) ≤ 2.9 V ⎯ 0.06 0.08 V 1
3.0 V ≤ VOUT(S) ≤ 3.2 V ⎯ 0.05 0.07 V 1
3.3 V ≤ VOUT(S) ≤ 5.5 V ⎯ 0.04 0.06 V 1
IOUT = 100 mA 1.5 V ≤ VOUT(S) ≤ 1.9 V 0.50 0.55 0.60 V 1
2.0 V ≤ VOUT(S) ≤ 2.4 V ⎯ 0.24 0.31 V 1
2.5 V ≤ VOUT(S) ≤ 2.9 V ⎯ 0.16 0.23 V 1
3.0 V ≤ VOUT(S) ≤ 3.2 V ⎯ 0.14 0.21 V 1
3.3 V ≤ VOUT(S) ≤ 5.5 V ⎯ 0.13 0.19 V 1
ΔVOUT1 VOUT(S) + 0.5 V ≤ VIN ≤ 10 V,
Line regulation ⎯ 0.01 0.2 %/V 1
ΔVIN• VOUT IOUT = 30 mA
VIN = VOUT(S) + 1.0 V,
Load regulation ΔVOUT2 ⎯ 15 50 mV 1
1.0 mA ≤ IOUT ≤ 80 mA
Output voltage ΔVOUT VIN = VOUT(S) + 1.0 V, IOUT = 30 mA, ppm/
⎯ ±100 ⎯ 1
temperature coefficient*4 ΔTa • VOUT −40°C ≤ Ta ≤ 85°C °C
Current consumption VIN = VOUT(S) + 1.0 V, ON/OFF pin = ON,
ISS1 ⎯ 18 40 μA 2
during operation no load
Current consumption VIN = VOUT(S) + 1.0 V, ON/OFF pin = OFF,
ISS2 ⎯ 0.01 1.0 μA 2
during power-off no load
Input voltage VIN ⎯ 2.0 ⎯ 10 V ⎯
ON/OFF pin
VSH VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ 1.5 ⎯ ⎯ V 4
input voltage “H”
ON/OFF pin
VSL VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ ⎯ ⎯ 0.25 V 4
input voltage “L”
ON/OFF pin
ISH VIN = 6.5 V, VON/OFF = 6.5 V −0.1 ⎯ 0.1 μA 4
input current “H”
ON/OFF pin
ISL VIN = 6.5 V, VON/OFF = 0 V −0.1 ⎯ 0.1 μA 4
input current “L”
RR VIN = VOUT(S) + 1.0 V,
Ripple rejection 1.5 V ≤ VOUT(S) ≤ 3.0 V ⎯ 70 ⎯ dB 5
f = 1.0 kHz,
ΔVrip = 0.5 Vrms,
3.1 V ≤ VOUT(S) ≤ 5.5 V ⎯ 65 ⎯ dB 5
IOUT = 50 mA
VIN = VOUT(S) + 1.0 V, ON/OFF pin = ON,
Short-circuit current Ishort ⎯ 250 ⎯ mA 3
VOUT = 0 V
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series Rev.6.0_00
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.6.0_00 S-1200 Series
Test Circuits
1.
+
VIN VOUT A
+
ON/OFF V
VSS
Set to ON
Figure 5
2.
+
A VIN VOUT
ON/OFF
VSS
Set to
VIN or GND
Figure 6
3. +
VIN VOUT A
+
ON/OFF V
VSS
Set to ON
Figure 7
4.
VOUT
VIN
+
+ RL
A ON/OFF V
VSS
Figure 8
5.
VIN VOUT
+
ON/OFF V RL
VSS
Set to ON
Figure 9
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series Rev.6.0_00
Standard Circuit
Input Output
VIN VOUT
*2
CIN
*1 ON/OFF CL
VSS
Figure 10
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
Condition of Application
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.6.0_00 S-1200 Series
Explanation of Terms
1. Low dropout voltage regulator
This voltage regulator has the low dropout voltage due to its built-in low on-resistance transistor.
2. Low ESR
A capacitor whose ESR (Equivalent Series Resistance) is low. The S-1200 Series enables use of a low
ESR capacitor, such as a ceramic capacitor, for the output capacitor (CL). A capacitor whose ESR is 1.0
Ω or less can be used.
3. Output voltage (VOUT)
The accuracy of the output voltage is ensured at ±1.0% under the specified conditions of fixed input
voltage*1, fixed output current, and fixed temperature.
*1. Differs depending on the product.
Caution If the above conditions change, the output voltage value may vary and exceed the
accuracy range of the output voltage. Refer to “ Electrical Characteristics” and
“ Characteristics (Typical Data)” for details.
ΔVOUT1
4. Line regulation
ΔVIN • VOUT
Indicates the dependency of the output voltage on the input voltage. That is, the values show how much
the output voltage changes due to a change in the input voltage with the output current remaining
unchanged.
5. Load regulation (ΔVOUT2)
Indicates the dependency of the output voltage on the output current. That is, the values show how
much the output voltage changes due to a change in the output current with the input voltage remaining
unchanged.
6. Dropout voltage (Vdrop)
Indicates the difference between input voltage (VIN1) and the output voltage when; decreasing input
voltage (VIN) gradually until the output voltage has dropped out to the value of 98% of output voltage
(VOUT3), which is at VIN = VOUT(S) + 1.0 V.
Vdrop = VIN1 − (VOUT3 × 0.98)
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series Rev.6.0_00
ΔVOUT
7. Output voltage temperature coefficient
ΔTa • VOUT
The shaded area in Figure 11 is the range where VOUT varies in the operation temperature range when
the output voltage temperature coefficient is ±100 ppm/°C.
VOUT
[V]
+0.28 mV/°C
*1
VOUT(E)
−0.28 mV/°C
Figure 11
A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
ΔVOUT ΔVOUT
ΔTa
[mV/°C]*1 = VOUT(S) [V]*2 × ΔTa • VOUT [ppm/°C]*3 ÷ 1000
*1. Change in temperature of output voltage
*2. Set output voltage
*3. Output voltage temperature coefficient
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.6.0_00 S-1200 Series
Operation
1. Basic operation
Figure 12 shows the block diagram of the S-1200 Series.
The error amplifier compares the reference voltage (Vref) with feedback voltage (Vfb), which is the output
voltage resistance-divided by feedback resistors (Rs and Rf). It supplies the gate voltage necessary to
maintain the constant output voltage which is not influenced by the input voltage and temperature
change, to the output transistor.
VIN
*1
Current
supply Error
amplifier
VOUT
Vref −
Rf
+
Vfb
Reference voltage
circuit
Rs
VSS
Figure 12
2. Output transistor
In the S-1200 Series, a low on-resistance P-channel MOS FET is used as the output transistor.
Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due
to reverse current flowing from the VOUT pin through a parasitic diode to the VIN pin, when the potential
of VOUT became higher than VIN.
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series Rev.6.0_00
3. ON/OFF pin
This pin starts and stops the regulator.
When the ON/OFF pin is set to OFF level, the entire internal circuit stops operating, and the built-in
P-channel MOS FET output transistor between the VIN pin and the VOUT pin is turned off, reducing
current consumption significantly. The VOUT pin becomes the VSS level due to the internally divided
resistance of several hundreds kΩ between the VOUT pin and the VSS pin.
The structure of the ON/OFF pin is as shown in Figure 13. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating status. In addition, note that the current consumption
increases if a voltage of 0.3 V to VIN – 0.3 V is applied to the ON/OFF pin. When not using the ON/OFF
pin, connect it to the VSS pin in the product A type, and connect it to the VIN pin in B type.
Table 6
Product Type ON/OFF Pin Internal Circuit VOUT Pin Voltage Current Consumption
A “L”: ON Operate Set value ISS1
A “H”: OFF Stop VSS level ISS2
B “L”: OFF Stop VSS level ISS2
B “H”: ON Operate Set value ISS1
VIN
ON/OFF
VSS
Figure 13
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.6.0_00 S-1200 Series
Precautions
• Wiring patterns for the VIN pin, the VOUT pin and GND should be designed so that the impedance is
low. When mounting an output capacitor between the VOUT pin and the VSS pin (CL) and a capacitor
for stabilizing the input between the VIN pin and the VSS pin (CIN), the distance from the capacitors to
these pins should be as short as possible.
• Note that generally the output voltage may increase when a series regulator is used at low load current
(1.0 mA or less).
• Note that generally the output voltage may increase due to the leakage current from an output driver
when a series regulator is used at high temperature.
• Generally a series regulator may cause oscillation, depending on the selection of external parts. The
following conditions are recommended for the S-1200 Series. However, be sure to perform sufficient
evaluation under the actual usage conditions for selection, including evaluation of temperature
characteristics.
• The voltage regulator may oscillate when the impedance of the power supply is high and the input
capacitance is small or an input capacitor is not connected.
• If the output capacitance is small, power supply's fluctuation and the characteristics of load fluctuation
become worse. Sufficiently evaluate the output voltage's fluctuation with the actual device.
• Overshoot may occur in the output voltage momentarily if the voltage is rapidly raised at power-on or
when the power supply fluctuates. Sufficiently evaluate the output voltage at power-on with the actual
device.
• The application conditions for the input voltage, the output voltage, and the load current should not
exceed the package power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
• In determining the output current, attention should be paid to the output current value specified in
Table 5 in “ Electrical Characteristics” and footnote *5 of the table.
• ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement
by products including this IC of patents owned by a third party.
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series Rev.6.0_00
VOUT [V]
1.0 5.0 V
0.8 VIN = 10 V 1.5
4.0 V
0.6 3.0 V 1.0 3.5 V
0.4 2.5 V 3.3 V
2.0 V 0.5
0.2 1.8 V
0 0
0 100 200 300 400 500 0 100 200 300 400 500 600
3 6.0 V
2 10 V
should be paid to the following.
7.0 V 1. The minimum output current value and
1
footnote *5 in Table 5 in “ Electrical
0 Characteristics”
0 100 200 300 400 500 600 2. The package power dissipation
IOUT [mA]
2. Output voltage vs. Input voltage
S-1200B15 (Ta = +25°C) S-1200B30 (Ta = +25°C)
1.6 3.1
1.5 3.0
1.4 2.9
IOUT = 1.0 mA
VOUT [V]
VOUT [V]
4.0
30 mA
3.5
50 mA
3.0
2.5
2.0 3.0 4.0 5.0 6.0 7.0
VIN [V]
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.6.0_00 S-1200 Series
Vdrop [V]
0.25 0.20 85°C 25°C
0.20 0.15
0.15
–40°C 0.10
0.10 –40°C
0.05 0.05
0 0
0 50 100 150 200 0 50 100 150 200
S-1200B50
0.30
0.25
0.20
Vdrop [V]
0.10
0.05 –40°C
0
0 50 100 150 200
IOUT [mA]
0.40
0.35
150 mA
0.30
0.25
Vdrop [V]
100 mA
0.20
80 mA
0.15
0.10 50 mA
30 mA
0.05 10 mA
0
0 1 2 3 4 5 6
VOUT(S) [V]
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series Rev.6.0_00
0.4
0.3
ISS2 [μA]
0.2
0.1
0
–40 –25 0 25 50 75 85
Ta [°C]
1.60 3.20
3.15
1.55 3.10
3.05
VOUT [V]
VOUT [V]
1.50 3.00
2.95
1.45 2.90
2.85
1.40 2.80
–40 –25 0 25 50 75 85 –40 –25 0 25 50 75 85
Ta [°C] Ta [°C]
S-1200B50
5.3
5.2
5.1
VOUT [V]
5.0
4.9
4.8
4.7
–40 –25 0 25 50 75 85
Ta [°C]
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.6.0_00 S-1200 Series
25 25
–40°C 25°C
20 –40°C 25°C 20
15 15 85°C
ISS1 [μA]
ISS1 [μA]
85°C
10 10
5 5
0 0
0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10
S-1200B50
25
–40°C
20
15 25°C
ISS1 [μA]
85°C
10
0
0 1 2 3 4 5 6 7 8 9 10
VIN [V]
8. Ripple rejection
S-1200B15 (Ta = +25°C) S-1200B30 (Ta = +25°C)
VIN = 2.5 V, COUT = 0.1 μF VIN = 4.0 V, COUT = 0.1 μF
90 90
80 80
Ripple Rejection [dB]
70 70
60 IOUT = 1 mA 60 IOUT = 1 mA
50 50 mA 50 50 mA
40 40
30 30
20 20
10 10
0 0
10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M
90
80
Ripple Rejection [dB]
70
60
IOUT = 1 mA
50
40
50 mA
30
20
10
0
10 100 1k 10k 100k 1M
Frequency [Hz]
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series Rev.6.0_00
Reference Data
VOUT [V]
VIN [V]
VIN [V]
1.54 2.0 3.02 3
1.52 1.5
VOUT 3.00 VOUT 2
1.50 1.0
1.48 0.5 2.98 1
1.46 0 2.96 0
-40 -20 0 20 40 60 80 100 120 140 160 -40 -20 0 20 40 60 80 100 120 140 160
t [μs] t [μs]
S-1200B50 (Ta = +25°C)
IOUT = 30 mA, tr = tf = 5.0 μs, COUT = 0.1 μF, CIN = 0.1 μF
5.12 8
5.10 7
VIN
5.08 6
5.06 5
VOUT [V]
VIN [V]
5.04 4
5.02 3
VOUT
5.00 2
4.98 1
4.96 0
-40 -20 0 20 40 60 80 100 120 140 160
t [μs]
2. Load transient response characteristics
S-1200B15 (Ta = +25°C) S-1200B30 (Ta = +25°C)
VIN = 2.5 V, COUT = 0.1 μF, CIN = 0.1 μF, IOUT = 50 mA↔100 mA VIN = 4.0 V, COUT = 0.1 μF, CIN = 0.1 μF, IOUT = 50 mA↔100 mA
IOUT [mA]
VOUT [V]
VOUT [V]
1.55 0 3.05 0
VOUT
1.50 –50 3.00 VOUT –50
t [μs] t [μs]
S-1200B50 (Ta = +25°C)
VIN = 6.0 V, COUT = 0.1 μF, CIN = 0.1 μF, IOUT = 50 mA↔100 mA
5.20 150
5.15 100
IOUT
5.10 50
IOUT [mA]
VOUT [V]
5.05 0
VOUT
5.00 –50
4.95 –100
4.90 –150
-40 -20 0 20 40 60 80 100 120 140 160
t [μs]
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.6.0_00 S-1200 Series
5 3 10 6
4 2 8 4
VON/OFF
3 1 6 VON/OFF 2
VON/OFF [V]
VON/OFF [V]
VOUT [V]
VOUT [V]
2 0 4 0
1 –1 2 –2
VOUT VOUT
0 –2 0 –4
–1 –3 –2 –6
-0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
20 9
16 6
12 VON/OFF 3
VON/OFF [V]
VOUT [V]
8 0
4 –3
VOUT
0 –6
–4 –9
-0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
t [ms]
4. Input transient response characteristics ⎯ Capacity Value characteristics
S-1200B15 (Ta = +25°C)
VIN = 2.5 V → 4.5 V, tr = 5 μs, IOUT = 50 mA VIN = 4.5 V → 2.5 V, tr = 5 μs, IOUT = 50 mA
1.8 6 2.0 6
1.7 4 1.8 4
VIN VIN
1.6 2 1.6 2
COUT = 0.1 μF
VOUT [V]
VOUT [V]
VIN [V]
VIN [V]
1.5 0 1.4 VOUT 0
VOUT COUT = 1.0 μF C OUT = 1.0 μF
1.4 –2 1.2 –2
C OUT = 0.1 μF
1.3 –4 1.0 –4
1.2 –6 0.8 –6
-40 -20 0 20 40 60 80 100 120 140 160 -40 -20 0 20 40 60 80 100 120 140 160
t [μs] t [μs]
5. Load transient response characteristics ⎯ Capacity Value characteristics
S-1200B15 (Ta = +25°C)
VIN = 2.5 V, IOUT = 1 mA→50 mA VIN = 2.5 V, IOUT = 50 mA→1 mA
2.0 100 2.2 100
1.8 50 2.0 50
IOUT COUT = 1.0 μF IOUT
1.6 0 1.8 0
IOUT [mA]
IOUT [mA]
VOUT [V]
VOUT [V]
C OUT = 1.0 μF
1.4 VOUT 1.6 VOUT
1.2 1.4
COUT = 0.1 μF C OUT = 0.1 μF
1.0 1.2
0.8 1.0
-40 -20 0 20 40 60 80 100 120 140 160 -40 -20 0 20 40 60 80 100 120 140 160
t [μs] t [μs]
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series Rev.6.0_00
Marking Specifications
1. SNT-6A(H)
Top view
(1) to (3) : Product code (Refer to Product name vs. Product code)
6 5 4
(4) to (6) : Lot number
1 2 3
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HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.6.0_00 S-1200 Series
2. SOT-23-5
Top view
(1) to (3) : Product code (Refer to Product name vs. Product code)
5 4
(4) : Lot number
1 2 3
23
1.57±0.03
6 5 4
+0.05
1 2
0.08 -0.02
3
0.5
0.48±0.02
0.2±0.05
No. PI006-A-P-SD-2.1
No. PI006-A-P-SD-2.1
ANGLE
UNIT mm
ABLIC Inc.
+0.1
ø1.5 -0 2.0±0.05 4.0±0.1 0.25±0.05
+0.1
ø0.5 -0
4.0±0.1 0.65±0.05
1.85±0.05
3 2 1
4 5 6
Feed direction
No. PI006-A-C-SD-2.0
No. PI006-A-C-SD-2.0
ANGLE
UNIT mm
ABLIC Inc.
+1.0
9.0 - 0.0
11.4±1.0
ø13±0.2
(60°) (60°)
No. PI006-A-R-SD-2.0
TITLE SNT-6A(H)-A-Reel
No. PI006-A-R-SD-2.0
ANGLE QTY. 5,000
UNIT mm
ABLIC Inc.
0.52
2
1.36
0.52
0.2 0.3 1
3.
4. SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package (1.30 mm to 1.40 mm).
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
SNT-6A(H)-A
TITLE -Land Recommendation
No. PI006-A-L-SD-4.1 No. PI006-A-L-SD-4.1
ANGLE
UNIT mm
ABLIC Inc.
2.9±0.2
1.9±0.2
5 4
+0.1
1 2 3 0.16 -0.06
0.95±0.1
0.4±0.1
No. MP005-A-P-SD-1.3
ABLIC Inc.
4.0±0.1(10 pitches:40.0±0.2)
+0.1 2.0±0.05
ø1.5 -0
0.25±0.1
+0.2
ø1.0 -0 4.0±0.1 1.4±0.2
3.2±0.2
3 2 1
4 5
Feed direction
No. MP005-A-C-SD-2.1
ABLIC Inc.
+1.0
9.0 - 0.0
11.4±1.0
ø13±0.2
(60°) (60°)
No. MP005-A-R-SD-2.0
TITLE SOT235-A-Reel
No. MP005-A-R-SD-2.0
ANGLE QTY. 3,000
UNIT mm
ABLIC Inc.
Disclaimers (Handling Precautions)
1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,
biological or chemical weapons or missiles, or use any other military purposes.
8. The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.
9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07
www.ablic.com