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Co Assignment Unit-4

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0% found this document useful (0 votes)
25 views2 pages

Co Assignment Unit-4

Uploaded by

vinaysingh65592
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Computer Organization of Architecture (KCS-302)

Assignment on UNIT-4

S. Assignment CO’s /
No. Bloom’s Level
1 Write the difference between RAM & ROM. (CO4 / K2 Understanding)
(2017-18)
2 What is the difference between RAM and DRAM?
(CO4 / K2 Understanding)
(2018-19) (2019-20)(2021-22)
3 What is associative memory (CAM)? Explain with
the help of a block diagram. Also discuss it
(CO4 / K2 Understanding)
advantages and disadvantages.
(2018-19)(2021-22)
4 What do you mean by locality of reference? Explain
(CO4 / K2 Understanding)
with suitable example. (2017-18, 2018-19)
5 Write the difference between Write Through &
(CO4 / K2 Understanding)
Write Back Cache write. Why dirty bit is used?
6 Discuss the various types of address mapping used (CO4 / K2 Understanding)
in cache memory. (2017-18) (2019-20)
7 What do you mean by Virtual memory? How
paging help in implementing virtual memory? (CO4 / K2 Understanding)
(2017-18)(2019-20)
8 A 2 way set associative cache uses blocks of 4
words. The cache can accommodate a total of 2048
words of main memory. The main memory size is
128K x 32. (CO4 / K3 Applying)
a. Formulate all persistent information required to
construct cache memory.
b. What is the size of cache?
(2018-19)
9 A computer with cache access time of 30 ns, main
memory access time of 150ns and hit ratioof 0.8 (CO4 / K3 Applying)
produces an average access time of CPU is………
10 A moving arm disc storage device has the following
specifications: Number of Tracks per recording
surface 200 Disc rotation speed 2400 (CO4 / K4 Applying)
revolution/minute Track-storage capacity 62500 bits
Estimate the average latency and data transfer rate

COA, Assignment on UNIT-4, Sanjay Goswami, Department of CSE, UCER-Prayagraj Page 1


of this device. (2017-18)
11 Define hit ratio. What do you mean by page fault? (CO4 / K2 Understanding)
(2020-21)
12 A RAM chip 4096 x 8 bits has two enable lines.
How many pins are needed for the integreted circuit
package? Draw a block diagram and labeled all (CO4 / K3 Applying)
inputs and outputs of RAM. What are the main
features of RAM? (2019-20)
13 Discuss 2 D RAM and 2.5D RAM with suitable (CO4 / K3 Applying)
diagram. (2019-20)(2020-21)
14 A computer uses RAM chips of 1024*1 capacity.
i) How many chips are needed & how should
their address lines be connected to provide a (CO4 / K3 Applying)
memory capacity of 1024*8?
ii) How many chips are needed to provide a
memory capacity of 16 KB?
15 Calculate the page fault for a given string with
the help of LRU & FIFO page replacement (CO4 / K3 Applying)
algorithm, Size of frames = 4 and reference string
12342156212376321236
16 A set-associative cache consists of 64 lines, or slots,
divided into four-line sets. Main memory contains (CO4 / K3 Applying)
4K blocks of 128 words each. Show the format of
mainmemory addresses.

COA, Assignment on UNIT-4, Sanjay Goswami, Department of CSE, UCER-Prayagraj Page 2

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