To our customers,

Old Company Name in Catalogs and Other Documents

On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology
Corporation, and Renesas Electronics Corporation took over all the business of both
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April 1st, 2010

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To all our customers

Regarding the change of names mentioned in the document, such as Mitsubishi

Electric and Mitsubishi XX, to Renesas Technology Corp.

The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
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Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices
and power devices.

Renesas Technology Corp.

Customer Support Dept.
April 1, 2003
 MITSUBISHI MICROCOMPUTERS

M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

DESCRIPTION
PIN CONFIGURATION (TOP VIEW)
The M35080FP is a bitmap pattern display control IC can display
on the screen. Display frequency can operate in 3.3MHz to
20MHz, and is equipped with the analog RGB output (512 colors / LP 1 24 NC
260k colors) and the digital RGB output (512 colors) function. VSS2 2 23 VDD2
Moreover, 2 pages (horizontal 128 dot ✕ vertical 96 dots/page) AC 3 22 ROUT/G2
display can be simultaneously performed on 1 screen.It uses a CS 4 21 GOUT/G1

M35080FP
silicon gate CMOS process and it housed in a 24-pin shrink SOP SCK 5 20 BOUT/G0
package. SIN 6 19 IREF/B2
TCK 7 18 VG2/B1
VDD1 8 17 VG1/B0
FEATURES
P0/BLNK 9 16 BIN
• Pixel composition ............ Eight kinds (Can be chosen from the following) P1/R2 10 15 VSS1
........................ horizontal 128 dots ✕ verical 96 dots ✕ 2 pages
P2/R1 11 14 VERT
........................ horizontal 192 dots ✕ verical 64 dots ✕ 2 pages P3/R0 12 13 HOR
........................ horizontal 256 dots ✕ verical 48 dots ✕ 2 pages
........................ horizontal 384 dots ✕ verical 32 dots ✕ 2 pages
........................ horizontal 32 dots ✕ verical 384 dots ✕ 2 pages Outline 24P2Q-A
........................ horizontal 48 dots ✕ verical 256 dots ✕ 2 pages
........................ horizontal 64 dots ✕ verical 192 dots ✕ 2 pages
........................ horizontal 96 dots ✕ verical 128 dots ✕ 2 pages
• RGB output ....................................................................................
Analog RGB output ...................................... ROUT, GOUT,BOUT
Number of colors displayed ........................................................
double-screen display (3 bits each of RGB) : 512 colors
one-screen display (6 bits each of RGB) : 260 K colors
Digital RGB output .......................... R0 to R2, G0 to G2, B0 to B2,
Number of colors displayed ........................................................
one and double-screen display (3 bits each of RGB) : 512 colors
• Bit map RAM ....................................................... 1000h to 3AFFh
.............................. 128 ✕ 96 ✕ 9 plans (R, G, B every 3 bit) ✕ 2
.................................................................. 221184 bit (27 Kbyte)
• Display input frequency range .......................................................
................................... external input FOSC = 3.3 MHz to 20 MHz
• Horizontal synchronous input frequency
.......................................................... H.sync = 10 kHz to 20 kHz
• Output ports (Combination port output) ........................................
................. 4 ports (Switches with R0, R1, R2 and BLNK output)
• DAC ................................................................. 6 bits ✕ 3 (R, G, B)
• Operating voltage .................................................... 2.7 V to 3.3 V

APPLICATION
Liquid crystal display, Plasma display, Multi-scan monitor

Rev.1.0
 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

PIN DESCRIPTION
Input/
Symbol Pin name Function
Output
LP Test output Output Test pin. Open this pin.

VSS2 Earthing pin – Connect to GND.

__
AC Auto-clear input Input When “L”, this pin resets the internal IC circuit. Hysteresis input. Built-in pull-up resistor.
__
CS Chip select input Input This is the pin for chip select input. Set “L” level at serial data transmission. Hysteresis input.

__
SCK Serial clock input Input At CS pin is “L” level, SDA pin serial data is taken in when SCL rises. Hysteresis input. Built-in
pull-up resistor.

SIN Serial data input Input This is the pin for serial input of display control register and display RAM data. Also, this pin
output acknowledge signal. Hysteresis input. Nch open-drain output.

TCK External clock Input This is the pin for external clock input.

VDD1 Power pin – Digital power supply. Connect to +3V with the power pin.

P0/BLNK Port P0 output Output This is a general purpose port output at analog RGB output. Outputs port output or BLNK signal.
BLNK Outputs BLNK signal at digital RGB output.
P1/R2 Port P1 output Output This is the output port output at analog RGB output.
R2 Outputs R2 signal at digital RGB output.
P2/R1 Port P2 output Output This is the output port output at analog RGB output.
R1 Outputs R1 signal at digital RGB output.
P3/R0 Port P3 output Output This is the output port output at analog RGB output.
R0 Outputs R0 signal at digital RGB output.
HOR Horizontal synchro- Input Input horizontal synchronous signal. (Hysteresis input.)
nous signal input

VERT Vertical synchro- Input Input vertical synchronous signal. (Hysteresis input.)
nous signal input

VSS1 Earthing pin – Connect to GND.

BIN Test pin – Test pin. Connect to GND.

VG1/B0 Reference voltage Output Use reference voltage output 1 of DAC for analog RGB output at analog RGB output. Connect
output 1 to capacitor.
B0 Output B0 signal at digital RGB output.
VG2/B1 Reference voltage Output Use reference voltage output 2 of DAC for analog RGB output at analog RGB output. Connect
output 1 to capacitor.
B1 Output B1 signal at digital RGB output.
IREF/B2 Reference voltage Output The pin connects resistors which convert voltage current at analog RGB output.
output 2
B2 Output B2 signal at digital RGB output.
BOUT/G0 Analog B signal output Output Output analog B signal at analog RGB output(Current output). Connect to load resistance.
G0 Output G0 signal at digital RGB output.

GOUT/G1 Analog G signal output Output Output analog G signal at analog RGB output(Current output). Connect to load resistance.
G1 Output G1 signal at digital RGB output.

ROUT/G2 Analog R signal output Output Output analog R signal at analog RGB output(Current output). Connect to load resistance.
G2 Output G2 signal at digital RGB output.

VDD2 Power pin – Digital power supply. Connect to +3V with the power pin.

NC NC – NC pin. Open.

2
 BLOCK DIAGRAM

TCK LP HOR VERT

7 1 13 14

CS 4 Polality switching circuit

Input
SCK 5 control
circuit

SIN 6
Synchronous signal 9 P0/BLNK
switching circuit
Timing
generator
Data Address 10 P1/R2
control Port output
control
circuit control
VDD1 8 circuit H counter
circuit
11 P2/R1
VDD2 23

Display 12 P3/R0
Display position
VSS1 15 control
detection circuit
register

VSS2 2

AC 3

Read-out
BIN 16
control
Bit map RAM Bit map RAM
circuit
(page A) (page B)
22 ROUT/G2

Output control
circuit 21 GOUT/G1
Display
Shift register control (DAC)
circuit
20 BOUT/G0

19 18 17

IREF VG2 VG1

/B2 /B1 /B0
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
M35080FP
MITSUBISHI MICROCOMPUTERS

3
 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

of the memory for page A, and the memory for page B. Registers
MEMORY CONSTITUTION PAGEONA and PAGEONB perform page control at the time of
Address 0000 16 to 000716 are assigned to the display RAM, ad- writing in data. For detail, refer to "DATA INPUT EXAMPLE".
dress 100016 to 3AFF16 are assigned to bitmap RAM. The internal Memory constitution is shown in Figure 1 to 10.
circuit is reset and all display control registers (address 000016 to
000716 ) are set to "0" when the AC pin level is "L". And then, bit
map RAM is not erased and be undefinited. This memory has 2-
page composition (an address is Page A and page B community)

Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0

000016 – – – – – – – – – – – – – – PAGEONB PAGEONA

000116 – – – – – YM2 YM1 YM0 BLANK1 BLANK0 ALLON DSPON – WIDTH2 WIDTH1 WIDTH0

000216 – VSIZE1 VSIZE0 – – – VP9 VP8 VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0

000316 – – – – – – HP9 HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0

000416 – ANADIG2 ANADIG1 ANADIG0 SYNCCK TEST – – – – – POLV POLH MODE2 MODE1 MODE0

000516 – – – – – – – – – – – – – – – –

000616 – DACON – – – – – – – – – – – – – –

000716 – – – – – – – – SBLANK3 SBLANK2 SBLANK1 SBLANK0 PTD3 PTD2 PTD1 PTD0

Fig.1 Memory constitution (Display Control register)

Note : Address 0000 16 and 000416 to 000716 are Page A and B common registers. The writing of data is made regardless of registers PAGEONA and
PAGEONB. As for addresses 000116 to 000316, register of Page A and Page B exists for every page (common to an address.)
When write data in the memory for page A, and write data in the memory for page B, set it as register PAGEONA = “1” at register PAGEONB = “1.”
When both of PAGEONA and PAGEONB are set to “1”, data can be simultaneously written in both the memory for page A, and the memory for page B.
Address 0XXX16 other than addresses 000016 to 000716 are write-protected.

4
 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Dot composition (DAF to DA0)

Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
at 128 dots ✕ 96 dots

100016 Dot 1 to 16 of line 1

100116 Dot 17 to 32 of line 1

100216 Dot 33 to 48 of line 1

100316 Dot 49 to 64 of line 1

100416 Dot 65 to 80 of line 1

100516 Dot 81 to 96 of line 1

100616 Dot 97 to 112 of line 1

100716 Dot 113 to 128 of line 1

100816 Dot 1 to 16 of line 2

100916 Dot 17 to 32 of line 2

100A16 Dot 33 to 48 of line 2

Bit map RAM (R0) data

………

………
120616 Dot 81 to 96 of line 95

120716 Dot 97 to 112 of line 95

120816 Dot 113 to 128 of line 95

12F916 Dot 1 to 16 of line 96

12FA16 Dot 17 to 32 of line 96

12FB16 Dot 33 to 48 of line 96

12FC16 Dot 49 to 64 of line 96

12FD16 Dot 65 to 80 of line 96

12FE16 Dot 81 to 96 of line 96

12FF16 Dot 97 to 112 of line 96

130016
………

unused area

13FF16

Fig.2 Memory constitution (Bit map RAM (R0))

Notes : Bit map RAM (Addresses 100016 to 3AFF16) has 2-page composition of the memory for page A, and the memory for page B.
When write data in the memory for page A, and write data in the memory for page B, set it as register PAGEONA = “1” at register PAGEONB = “1.”
When both of PAGEONA and PAGEONB are set to “1”, data can be simultaneously written in both the memory for page A, and the memory for page B.

5
 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Dot composition (DAF to DA0)

Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
at 128 dots ✕ 96 dots

140016 Dot 1 to 16 of line 1

140116 Dot 17 to 32 of line 1

………

………
Bit map RAM (R1) data

16FE16 Dot 81 to 96 of line 96

16FF16 Dot 97 to 112 of line 96

170016
………

unused area

17FF16

Fig.3 Memory constitution (Bit map RAM (R1))

Dot composition (DAF to DA0)

Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
at 128 dots ✕ 96 dots

180016 Dot 1 to 16 of line 1

180116 Dot 17 to 32 of line 1

………

………
Bit map RAM (R2) data

1AFE16 Dot 81 to 96 of line 96

1AFF16 Dot 97 to 112 of line 96

1B0016
………

unused area

1FFF16

Fig.4 Memory constitution (Bit map RAM (R2))

6
 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Dot composition (DAF to DA0)

Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
at 128 dots ✕ 96 dots

200016 Dot 1 to 16 of line 1

200116 Dot 17 to 32 of line 1

………

………
Bit map RAM (G0) data

22FE16 Dot 81 to 96 of line 96

22FF16 Dot 97 to 112 of line 96

230016
………

unused area

23FF16

Fig.5 Memory constitution (Bit map RAM (G0))

Dot composition (DAF to DA0)

Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
at 128 dots ✕ 96 dots

240016 Dot 1 to 16 of line 1

240116 Dot 17 to 32 of line 1

………

………
Bit map RAM (G1) data

26FE16 Dot 81 to 96 of line 96

26FF16 Dot 97 to 112 of line 96

270016
………

unused area

27FF16

Fig.6 Memory constitution (Bit map RAM (G1))

Dot composition (DAF to DA0)

Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
at 128 dots ✕ 96 dots
280016 Dot 1 to 16 of line 1

280116 Dot 17 to 32 of line 1

………

………

Bit map RAM (G2) data

2AFE16 Dot 81 to 96 of line 96

2AFF16 Dot 97 to 112 of line 96

2B0016
………

unused area

2FFF16

Fig.7 Memory constitution (Bit map RAM (G2))

7
 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Dot composition (DAF to DA0)

Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
at 128 dots ✕ 96 dots

300016 Dot 1 to 16 of line 1

300116 Dot 17 to 32 of line 1

………

………
Bit map RAM (B0) data

32FE16 Dot 81 to 96 of line 96

32FF16 Dot 97 to 112 of line 96

330016
………

unused area

33FF16

Fig.8 Memory constitution (Bit map RAM (B0))

Dot composition (DAF to DA0)
Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
at 128 dots ✕ 96 dots

340016 Dot 1 to 16 of line 1

340116 Dot 17 to 32 of line 1

………

………
Bit map RAM (B1) data

36FE16 Dot 81 to 96 of line 96

36FF16 Dot 97 to 112 of line 96

370016
………

unused area

37FF16

Fig.9 Memory constitution (Bit map RAM (B1))

Dot composition (DAF to DA0)

Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
at 128 dots ✕ 96 dots

380016 Dot 1 to 16 of line 1

380116 Dot 17 to 32 of line 1

………

………

Bit map RAM (B2) data

3AFE16 Dot 81 to 96 of line 96

3AFF16 Dot 97 to 112 of line 96

3B0016
………

unused area

3FFF16

Fig.10 Memory constitution (Bit map RAM (B2))

8
 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Pixel composition in Fig. 11. And, the bit map RAM address corresponding to dot
Each bit of a bit map display consists of nine bit map RAM (R0 to composition in case pixel composition is 64 dot x192 dot is shown
R2, G0 to G2, and B0 to B2.) Color setup can be specified out of in Fig. 12. In other pixel composition, the bit map RAM is similarly
512 kinds per dot. The bit map RAM address corresponding to dot assigned in an order from the dots 1 to 16 of line 1.
composition in case pixel composition is 128 dot x 96 dot is shown

Dots
Lines 1 to 16 17 to 32 33 to 48 49 to 64 65 to 80 81 to 96 97 to 112113 to 128
1 00016 00116 00216 00316 00416 00516 00616 00716
2 00816 00916 00A16 00B16 00C16 00D16 00E16 00F16
3 01016 01116 01216 01316 01416 01516 01616 01716
4 01816 01916 01A16 01B16 01C16 01D16 01E16 01F16
5 02016 02116 02216 02316 02416 02516 02616 02716
6 02816 02916 02A16 02B16 02C16 02D16 02E16 02F16
……

……

……

……

……

……

……

……
……

91 2D016 2D116 2D216 2D316 2D416 2D516 2D616 2D716

92 2D816 2D916 2DA16 2DB16 2DC16 2DD16 2DE16 2DF16
93 2E016 2E2E6 2E216 2E316 2E416 2E516 2E616 2E716
94 2E816 2E916 2EA16 2EB16 2EC16 2ED16 2EE16 2EF16
95 2F016 2F116 2F216 2F316 2F416 2F516 2F616 2F716
96 2F816 2F916 2FA16 2FB16 2FC16 2FD16 2FE16 2FF16

* The numerical value in a thick frame corresponds to lower 10-bits of bit map RAM (R0 to R2, G0
to G2, B0 to B2) address. (n RAM character number : 0 to 7)
Dot composition in 1 address (16 bits) is MSB....................LSB

Fig.11 Pixel composition (at 128 dots ✕ 96 dots)

Dots
Lines 1 to 16 17 to 32 33 to 48 49 to 64
1 00016 00116 00216 00316
2 00416 00516 00616 00716
3 00816 00916 00A16 00B16
4 00C16 00D16 00E16 00F16
5 01016 01116 01216 01316
6 01416 01516 01616 01716
……

……

……

……
……

187 2E816 2E916 2EA16 2EB16

188 2EC16 2ED16 2EE16 2EF16
189 2F016 2F116 2F216 2F316
190 2F416 2F516 2F616 2F716
191 2F816 2F916 2FA16 2FB16
192 2FC16 2FD16 2FE16 2FF16

* The numerical value in a thick frame corresponds to lower 10-bits of bit map RAM (R0 to R2, G0
to G2, B0 to B2) address. (n RAM character number : 0 to 7)
Dot composition in 1 address (16 bits) is MSB....................LSB

Fig.12 Pixel composition (at 64 dots ✕ 192 dots)

9
 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Register
Address 000016
Contents
DA Register Remarks
Status Function
0 Writing to the memory(display control registers and Bit map RAM)
for page A is disapproval. Memory writing control for page A.
0 PAGEONA
1 Writing to the memory(display control registers and Bit map RAM)
for page A is permission.
0 Writing to the memory(display control registers and Bit map RAM)
for page B is disapproval. Memory writing control for page B.
1 PAGEONB
1 Writing to the memory(display control registers and Bit map RAM)
for page B is permission.

0 Set "0" to this bit.

2 –
1 Can not be used.

0 Set "0" to this bit.

3 –
1 Can not be used.

0 Set "0" to this bit.

4 –
1 Can not be used.

0 Set "0" to this bit.

5 –
1 Can not be used.

0 Set "0" to this bit.

6 –
1 Can not be used.

0 Set "0" to this bit.

7 –
1 Can not be used.

0 Set "0" to this bit.

8 –
1 Can not be used.

0 Set "0" to this bit.

9 –
1 Can not be used.

0 Set "0" to this bit.

A –
1 Can not be used.

0 Set "0" to this bit.

B –
1 Can not be used.

0 Set "0" to this bit.

C –
1 Can not be used.

0 Set "0" to this bit.

D –
1 Can not be used.

0 Set "0" to this bit.

E –
1 Can not be used.

0 Set "0" to this bit.

F –
1 Can not be used.

10
 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Address 000116
Contents
DA Register Remarks
Status Function
0 WIDTH2 WIDTH1 WIDTH0 Pixel (Horizontal ✕ Vertical) Set the pixel composition.
0 WIDTH0
0 0 0 128 ✕ 96 dots
1
0 0 1 192 ✕ 64 dots
The BLNK signal of the range set up by
0 0 1 0 256 ✕ 48 dots this register is outputted at the time of
1 WIDTH1 0 1 1 384 ✕ 32 dots BLANK1, 0 = 0, and 0 (normal) setup.
1 1 0 0 32 ✕ 384 dots
1 0 1 48 ✕ 256 dots
0 1 1 0 64 ✕ 192 dots
2 WIDTH2
1 1 1 96 ✕ 128 dots
1

0 Set "0" to this bit.

3 –
1 Can not be used.

0 Display OFF
4 DSPON
1 Display ON

0 Set "0" to this bit. The measure against a character bend

5 – (test bit)
1 Can not be used.

0 Control of blank signal.

6 BLANK0 BLANK1 BLANK0 Blank signal
(a blank setup in a bit unit is possible).
1 0 0 Normal(Control by register WIDTH 0 to 2) Note 2
0 1 Control by Bit map RAM(R0)
0 1 0 Control by Bit map RAM(G0)
7 BLANK1 1 1 Control by Bit map RAM(B0)
1

0 2 2 Control of R, G and B output luminosity

8 YM0 R = Σ 2nRn – Σ 2nYMn
n=0 n=0
1

0
9 YM1
1 when set to R < 0, R = 0.

0 Same as G output and B output.

A YM2
1

0 Set "0" to this bit.

B –
1 Can not be used.

0 Set "0" to this bit.

C –
1 Can not be used.

0 Set "0" to this bit.

D –
1 Can not be used.

0 Set "0" to this bit.

E –
1 Can not be used.

0 Set "0" to this bit.

F –
1 Can not be used.

Notes 1 : This register is consisted of 2 pages (address community) of the register for page A, and the register for page B.
Writing control to each page is performed by registers PAGEONA and PAGEONB (address 000016).
2 : The bit map RAM used for blank signal control is not applicable to color setup.

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M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Address 000216
Contents
DA Register Remarks
Status Function
0 If VS is the vertical display start location,
0 VP0 Setting vertical start location
9
1
VS = H ✕ Σ 2nVPn
n=0
0
1 VP1 H: Cycle with the horizonal synchronizing pulse
1

0
2 VP2
1

0 HOR
3 VP3
1

0
4 VP4 VS
1 Note 2
VERT

0
5 VP5 HS
Display area
1
Note 2 Note 2
0
6 VP6 Note 2
1
Monitor display
0
7 VP7
1

0
8 VP8
1

0
9 VP9
1

0 It should be fixed to "0". .

A –
1 Can not be used.

0 It should be fixed to "0".

B –
1 Can not be used.

0 VSIZE1 VSIZE0 Vertical direction size Setting vertical direction dot size
C VSIZE0 0 0 1H/dot
1 0 1 2H/dot
1 0 3H/dot
0 1 1 4H/dot
D VSIZE1
1 H : Synchronous of horizontal direction pulse

0 It should be fixed to "0".

E –
1 Can not be used.

0 It should be fixed to "0".

F –
1 Can not be used.
Notes 1 : This register is consisted of 2 pages (address community) of the register for page A, and the register for page B. Writing control to each page is performed
by registers PAGEONA and PAGEONB (address 000016).
2 : Set up the horizontal and vertical display start location so that display range may not exceed it.
Set the character code "1FF16" (blank without background) for the display RAM of the part which the display range exceeds.

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 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Address 000316
Contents
DA Register Remarks
Status Function
0
0 HP0
If HS is the horizontal display start location, Setting horizontal start location
1 9
HS = T ✕ Σ 2nHPn
0 n=0
1 HP1
T: Display clock
1

0
2 HP2
1
HOR

0
3 HP3
1

0 VS
4 HP4 Note 2
1
VERT

0 HS
Display area
5 HP5
Note 2 Note 2
1
Note 2
0
6 HP6
Monitor display
1

0
7 HP7
1

0
8 HP8
1

0
9 HP9
1

0 It should be fixed to "0".

A –
1 Can not be used.

0 It should be fixed to "0".

B –
1 Can not be used.

0 It should be fixed to "0".

C –
1 Can not be used.
0 It should be fixed to "0".
D –
1 Can not be used.

0 It should be fixed to "0".

E –
1 Can not be used.

0 It should be fixed to "0".

F –
1 Can not be used.
Notes 1 : This register is consisted of 2 pages (address community) of the register for page A, and the register for page B. Writing control to each page is performed
by registers PAGEONA and PAGEONB (address 000016).
2 : Set up the horizontal and vertical display start location so that display range may not exceed it.
Set the character code "1FF16" (blank without background) for the display RAM of the part which the display range exceeds.

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 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Address 000416
Contents
DA Register Remarks
Status Function
0
0 MODE0 MODE1 MODE0 Display mode
1 0 0 Priority is given to Page A
0 1 Priority is given to Page B
0 1 0 260 K colors display
1 MODE1 1 1 The average of Page A and Page B
1

0 Set "0" to this bit.

2 –
1 Can not be used.

0 HOR pin is negative polarity

Polarity of HOR pin
3 POLH
1 HOR pin is positive polarity

0 VERT pin is negative polarity

POLV Polarity of VERT pin
4
1 VERT pin is positive polarity

0 Set "0" to this bit.

5 –
1 Can not be used.

0 Set "0" to this bit.

6 –
1 Can not be used.

0 Set "0" to this bit.

7 –
1 Can not be used.

0 Set "0" to this bit.

8 –
1 Can not be used.

0 Set "0" to this bit.

9 –
1 Can not be used.

0 Set "0" to this bit. Test bit

A TEST
1 Can not be used.

It synchronizes with a display CK rising and is port output (at the BLNK signal output timing control (BLNK
0
B SBLANK0 time of digital output setup). signal). Effective at the time of SBLANK1,
1 It synchronizes with a display CK falling and is port output (at the 2 = 1, and 1 (BLNK output) setup.
time of analog output setup).
SBLANK1 SBLANK2 P0/BLNK pin output
0 P0/BLNK pin output control.
0 0 Port P0 output
C SBLANK1 0 1 Can not be used SBLANK2 : address 000716
1 0 Can not be used
1
1 1 BLNK output

Port P1 to P3 output (at the time of analog RGB output setup "L"
0 fixation)
D PTC13 P1 to P3 output control
1 R0 to R2 output (at the time of digital RGB output setup "H" fixation)

0 Set "0" to this bit.

E –
1 Can not be used.

0 Set "0" to this bit.

F –
1 Can not be used.

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 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Address 000516
Contents
DA Register Remarks
Status Function
0 Set "0" to this bit.
0 –
1 Can not be used.

0 Set "0" to this bit.

1 –
1 Can not be used.

0 Set "0" to this bit.

2 –
1 Can not be used.

0 Set "0" to this bit.

3 –
1 Can not be used.

0 Set "0" to this bit.

4 –
1 Can not be used.

0 Set "0" to this bit.

5 –
1 Can not be used.

0 Set "0" to this bit.

6 –
1 Can not be used.

0 Set "0" to this bit.

7 –
1 Can not be used.

0 Set "0" to this bit.

8 –
1 Can not be used.

0 Set "0" to this bit.

9 –
1 Can not be used.

0 Set "0" to this bit.

A –
1 Can not be used.

0 Set "0" to this bit.

B –
1 Can not be used.

0 Set "0" to this bit.

C –
1 Can not be used.

0 Set "0" to this bit.

D –
1 Can not be used.
0 Set "0" to this bit.
E –
1 Can not be used.

0 Set "0" to this bit.

F –
1 Can not be used.

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M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Address 000616
Contents
DA Register Remarks
Status Function
0 Set "0" to this bit.
0 –
1 Can not be used.

0 Set "0" to this bit.

1 –
1 Can not be used.

0 Set "0" to this bit.

2 –
1 Can not be used.

0 Set "0" to this bit.

3 –
1 Can not be used.

0 Set "0" to this bit.

4 –
1 Can not be used.

0 Set "0" to this bit.

5 –
1 Can not be used.

0 Set "0" to this bit.

6 –
1 Can not be used.

0 Set "0" to this bit.

7 –
1 Can not be used.

0 Set "0" to this bit.

8 –
1 Can not be used.

0 Set "0" to this bit.

9 –
1 Can not be used.

0 Set "0" to this bit.

A –
1 Can not be used.

0 Set "0" to this bit.

B –
1 Can not be used.

0 Set "0" to this bit.

C –
1 Can not be used.

0 Set "0" to this bit.

D –
1 Can not be used.
0 DAC OFF (at the time of digital RGB output setup "L" fixation) DAC ON/OFF,
E DACON Digital RGB output mode (G0 to G2, B0 to B2 signal output) and digital RGB/analog RGB output
DAC ON (at the time of analog RGB output setup "H" fixation). Analog RGB change
1 output mode (VG1, VG2, IREF, ROUT, GOUT, and BOUT signal output)

0 Set "0" to this bit.

F –
1 Can not be used.

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SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Address 000716
Contents
DA Register Remarks
Status Function
0 "L" fixation at port output, negative polarity at BLNK output. Data control of P0 pin
0 PTD0
1 "H" fixation at port output, positive polarity at BLNK output.

0 "L" fixation at port output. Data control of P1 pin

1 PTD1
1 "H" fixation at port output.

0 "L" fixation at port output. Data control of P2 pin

2 PTD2
1 "H" fixation at port output.

0 "L" fixation at port output. Data control of P3 pin

3 PTD3
1 "H" fixation at port output.

0 Output control of P0/BLNK pin

4 SBLANK2 Refer to SBLANK1(000416).
1

0 Set "0" to this bit.

5 –
1 Can not be used.

0 Set "0" to this bit.

6 –
1 Can not be used.

0 Set "0" to this bit.

7 –
1 Can not be used.

0 Set "0" to this bit.

8 –
1 Can not be used.

0 Set "0" to this bit.

9 –
1 Can not be used.

0 Set "0" to this bit.

A –
1 Can not be used.

0 Set "0" to this bit.

B –
1 Can not be used.

0 Set "0" to this bit.

C –
1 Can not be used.

0 Set "0" to this bit.

D –
1 Can not be used.

0 Set "0" to this bit.

E –
1 Can not be used.

Set "0" to this bit.

0
F –
1 Can not be used.

17
 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

DISPLAY FORM
M35080FP can display two pages, Page A and Page B, simulta-
neously, as shown in Figure 13.
And,1 page of 260K color display can be displayed by piling up
two pages completely.

 Page A: register PAGEONA (address 000016) Set up by = "1." 

 
 Page B: register PAGEONB (address 000016) Set up by = "1." 

Example 1 Example 2

Page A (128 dots ✕ 96 dots) Page A (128 dots ✕ 96 dots)

Page B (128 dots ✕ 96 dots) Page B (128 dots ✕ 96 dots)

Monitor display Monitor display

Fig. 13 The example of a display at the time of a 2-page display

Notes 1: Setup of display position, display size, etc. can be freely performed for every page. Two pages can be displayed side by side vertically and horizon
tally.
2: when the display area of two pages overlaps on the monitoring screen, registers MODE0 and MODE1 (address 000416) can perform four displays as
follows.
MODE1 MODE0 Display mode Display number of pages
0 0 Priority is given to Page A 2 pages
0 1 Priority is given to Page B 2 pages
1 0 260 K colors display(Note 1) 1 page
1 1 The average of Page A and Page B 2 pages

(1) Priority is given to Page A ................... The overlaped part gives priority to Page A, and Page B is not displayed.
(2) Priority is given to Page B .................. The overlaped part gives priority to Page B, and Page A is not displayed.
(3) 260 K colors display ............................ By overlaping two pages completely, 1 page of 260K color is displayed.
RGB output is 6-bit(Note 2)each setup.
(4) The average of Page A and Page B ... The overlaped part averages and outputs the RGB output of two pages.

Notes 1. It becomes 512 color displays at the time of digital RGB output setup.
2. Assignment of 6 bits each of RGB is as follows.

MSB LSB
R R2 R1 R0 R2 R1 R0

Page A Page B
G G2 G1 G0 G2 G1 G0

Page A Page B

B B2 B1 B0 B2 B1 B0

Page A Page B

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 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

DATA INPUT EXAMPLE

Data of Bit map RAM and display control registers can be set by
the 16-bit serial input function. Example of data setting is shown in
Figure 14.

Address/Data DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 Remarks

Address 000016 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Address setting

Page A and B writing setting
Data 000016 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 (Note 1)

Data 000116 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Page A and B display OFF

Address 000016 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Address setting

Data 000016 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 Page A writing setting

Vertical display
Data 000216 0 VSIZE1 VSIZE0 0 0 0 VP9 VP8 VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0

Page A
location setting
Horizontal display
Data 000316 0 0 0 0 0 0 HP9 HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0 location setting

Data 000416 0 0 0 0 0 0 0 0 0 0 0 POLV POLH MODE2 MODE1 MODE0 Display form setting

Data 000516 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 —

Data 000616 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAC setting

Data 000716 0 0 0 0 0 0 0 0 SBLANK 3 SBLANK 2 SBLANK 1 SBLANK 0 PTD3 Port output setting

Address 100016 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 Address setting

Data 100016 Bit map setting

Data 100116

Bit map RAM (Page A)

............

Page A
(R0,R1,R2,G0,G1,G2,B0,B1,B2)
Data 3AFE16
Data 3AFF16

Address 000016 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Address setting

Data 000016 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 Page B writing setting

Vertical display
Page B

Data 000216 0 VSIZE1 VSIZE0 0 0 0 VP9 VP8 VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0 location setting
Horizontal display
Data 000316 0 0 0 0 0 0 HP9 HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0 location setting

Address 100016 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 Address setting

Data 100016 Bit map setting

Data 100116
Page B
............

Bit map RAM (PageB)

(R0,R1,R2,G0,G1,G2,B0,B1,B2)
Data 3AFF16
Data 3AFF16
Address 000016 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Address setting

Data 000016 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 Page A and B writing setting

Data 000116 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 Display ON

Notes 1. Registers PAGEONA and PAGEONB perform writing control of data.

2. Input the clock with which the cycle was fixed and continued from the TCK pin. Moreover, input horizontal synchronized signal into HOR pin,
and input vertical synchronized signal into VERT pin.

Fig. 14 Example of data setting

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 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Horizontal synchronors signal (3V) +3V Output buffer

Synchronous signal
generator Vertical synchronors signal (3V)

1 24
LP NC R
2 23
1F VSS2 VDD2
3 22 300‰
— +
AC ROUT/G2
4 21
CS GOUT/G1
5 20
Microcomputer SCK BOUT/G0

M35080FP
6 19 1.2K‰
SIN IREF/B2
7 18 0.1 F
External clock TCK VG2/B1
8 17 0.1 F G Mixing
VDD1 VG1/B0 video pre-amp
9 16
P0/BLNK BIN
10 15
P1/R2 VSS1
11 14
P2/R1 VERT B
12 13
P3/R0 HOR

100 F 100 F
+3V + — — +

1F 1F BLANK

0.01 F 0.01 F

Fig.15 Example of the M35080FP peripheral circuit (at analog RGB output setting)

Horizontal synchronors signal (3V) +3V

Synchronous signal
Vertical synchronors signal (3V)
generator

1 24
LP NC
2 23
1µF VSS2 VDD2
– + 3 22
AC ROUT/G2 G2
4 21
CS GOUT/G1 G1
5 20
Microcomputer SCK BOUT/G0 G0
M35080FP

6 19
SIN IREF/B2 B2
7 18
External clock TCK VG2/B1 B1
8 17 Mixing
VDD1 VG1/B0 B0 video pre-amp
9 16
P0/BLNK BIN R0
10 15
P1/R2 VSS1 R1
11 14
P2/R1 VERT R2
12 13
P3/R0 HOR
BLANK
100µF 100µF
+3V + – – +

1µF 1µF

0.01µF 0.01µF

Fig.16 Example of the M35080FP peripheral circuit (at digital RGB output setting)

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 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

DATA INPUT
SERIAL DATA INPUT TIMING
(1) Serial data should be input with the LSB first.
(2) The address consists of 16 bits.
(3) The data consists of 16 bits. __
(4) The 16 bits in the SCK after the CS signal has fallen are the
address, and for succeeding input data, the address is
incremented every 16 bits. Therefore, it is not necessary to
input the address from the second data.

CS

SCK

SIN

LSB MSB LSB MSB LSB MSB

Address(16 bits) Data(16 bits) Data(16 bits)

N N+1
N = 1,2,3………

Fig.17 Serial input timing

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 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

TIMING REQUIREMENTS (VDD = 3 ± 0.30 V, Ta = –20 to +85°C, unless otherwise noted)

Serial data input

Limits
Symbol Parameter Unit Remarks
Max. Typ. Max.
tw(SCK) SCK width 200 – – ns
___ ____
tsu(CS) CS setup time 200 – – ns
___ ____
th(CS) CS hold time 2 – – µs
Refer to
tsu(SIN) SIN setup time 200 – – ns fig 18
th(SIN) SIN hold time 200 – – ns
tword 1 word write time 10 – – µs

tw(CS)
1µs (min.)

CS

tsu(CS) tw(SCK) tw(SCK) th(CS)

SCK

tsu(SIN) th(SIN)

SIN

CS
tword

more than 2 µs

SCK
1 2 … 12 13 14 15 16 1 … 12 13 14 15 16

Fig.18 Serial input timing

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 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

ABSOLUTE MAXIMUM RATINGS (VDD = 3.00V, Ta = –20 to +85°C, unless otherwise noted)

Symbol Parameter Conditions Ratings Unit

VDD Supply voltage With respect to VSS. –0.3 to +4.2 V
VI Input voltage VSS –0.3 ≤ VI ≤ VDD +0.3 V
VO Output voltage VSS ≤ VO ≤ VDD V
Pd Power dissipation Ta = +25 °C +70 mW
Topr Operating temperature –20 to +85 °C
Tstg Storage temperature –40 to +125
°C

RECOMMENDED OPERATING CONDITIONS (VDD = 3.00V, Ta = –20 to +85°C, unless otherwise noted)
Limits
Symbol Parameter Unit
Min. Typ. Max.
VDD Supply voltage 2.7 3.00 3.3 V
__ __
VIH "H" level input voltage SIN, SCK, CS, AC, HOR, VERT 0.8 ✕ VDD VDD VDD V
__ __
VIL "L" level input voltage SIN, SCK, CS, AC, HOR, VERT 0 0 0.2 ✕ VDD V
FOSC Oscillating frequency for display 10.0 – 20.0 MHz

H.sync Horizontal synchronous signal input frequeney 10.0 – 20.0 kHz

ELECTRICAL CHARACTERISTICS (VDD = 3.00V, Ta = 25°C, unless otherwise noted)

Limits
Symbol Parameter Test conditions Unit
Min. Typ. Max.
VDD Supply voltage Ta = –20 to +70°C 2.70 3.00 3.30 V
IDD Supply current (at analog output) VDD = 3.00V – 15 25 mA
P0 to P7,R0 to R2
VOH “H” level output voltage VDD = 2.70V, IOH = –1mA – – V
G0 to G2,B0 to B2 2.2

P0 to P7,R0 to R2
VOL “L” level output voltage VDD = 2.70V, IOL = 1mA – – 0.5 V
G0 to G2,B0 to B2
__
RI Pull-up resistance AC VDD = 3.00V 10 – 100 kΩ
VTCK External clock input width 0.7 ✕ VDD – VDD V
VDAO Full scale width ROUT,GOUT,BOUT RIREF=1.2KΩ, RL=300Ω – 1.0 – Vp-p
NL Nonlinear nature error ROUT,GOUT,BOUT RIREF=1.2KΩ, RL=300Ω – – ±2.0 LSB

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 MITSUBISHI MICROCOMPUTERS

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SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

NOTE FOR SUPPLYING__POWER (2) Timing of power supplying to VDD1 and VDD2.
(1) Timing of power supplying to AC pin Supply power to VDD1 and VDD2 at the same time.
The internal circuit __
of M35080FP is reset when the level of the
auto clear input pin AC is “L”. This pin in hysteresis input with the
pull-up resistor. __
The timing about power supplying of AC pin is shown in Figure be-
low.
After supplying the power (VDD and VSS) to M35080FP and the
supply voltage becomes
__
more than 0.8 ✕ VDD, it needs to keep
VIL time; tw of the AC pin for more than 1ms.__
Start inputting from microcomputer after AC pin supply voltage
becomes more than 0.8 ✕ VDD and keeping 200ms wait time.

Voltage [V]

Data input disable

VDD
Supply voltage
VAC
0.8 ✕ VDD (AC pin input voltage)

0.2 ✕ VDD

Time t [s]
tW tS

__
Fig.19 Timing of power supplying to AC pin

PRECAUTION FOR USE

Notes on noise and latch-up
In order to avoid noise and latch-up, connect a bypass capacitor
(≈0.1µF) directly between the V DD1 pin and VSS1 pin, and the
VDD2 pin and VSS2 pin using a heavy wire.

Notes on the time of external clock input to TCK pin

Input the continuous external clock which cycle is fixed and syn-
chronized with horizontal synchronized signal from TCK pin. And,
input continuous horizontal synchronized signal which cycle is
fixed from HOR pin. Do not stop clock input absolutely during dis-
play.

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 MITSUBISHI MICROCOMPUTERS

M35080FP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

PACKAGE OUTLINE

24P2Q-A MMP Plastic 24pin 300mil SSOP

EIAJ Package Code JEDEC Code Weight(g) Lead Material
SSOP24-P-300-0.80 – 0.2 Cu Alloy e b2

24 13

I2
e1
HE

F
Recommended Mount Pad

Dimension in Millimeters
Symbol
1 12 Min Nom Max
A A – – 2.1
A1 0 0.1 0.2
D A2 – 1.8 –
G
b 0.3 0.35 0.45
c 0.18 0.2 0.25
A2 A1 D 10.0 10.1 10.2
E 5.2 5.3 5.4
e e – 0.8 –
y b
HE 7.5 7.8 8.1
L 0.4 0.6 0.8
L1

L1 – 1.25 –
z
L

– 0.65 –
Z1 – – 0.8
c y – – 0.1
z 0° – 8°
Z1 Detail G Detail F b2 – 0.5 –
e1 – 7.62 –
I2 1.27 – –

25
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• Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to
personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable
material or (iii) prevention against any malfunction or mishap.

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rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party.
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contained in these materials.
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© 2002 MITSUBISHI ELECTRIC CORP.

New publication, effective MAR. 2002.
Specifications subject to change without notice.
 REVISION DESCRIPTION LIST M35080FP Data Sheet

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Revision Description
No. date
1.0 First Edition 0203

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