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BMX055 9-Axis Sensor Data Sheet

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0% found this document useful (0 votes)

43 views173 pages

BMX055 9-Axis Sensor Data Sheet

Uploaded by

Saurabh Malviya

We take content rights seriously. If you suspect this is your content, claim it here.

Available Formats

Download as PDF, TXT or read online on Scribd

Data sheet

BMX055
Small, versatile 9-axis sensor module
Bosch Sensortec

BMX055: Data sheet

Document revision 1.1

th
Document release date November 7 , 2014
Document number BST-BMX055-DS000-02
Technical reference code(s) 0 273 141 179
Notes Data and descriptions within this document are subject to
change without notice.
Product photos and pictures are for illustration purposes only and
may differ from the real product’s appearance.
BMX055
Data sheet Page 2

BMX055

Basic Description
Key features
 3 sensors in one device an advanced triaxial 16bit gyroscope, a
versatile, leading edge triaxial 12bit accelerometer
and a full performance geomagnetic sensor
 Small package LGA package 20 pins
footprint 3.0 x 4.5 mm², height 0.95mm
 Common voltage supplies VDD voltage range: 2.4V to 3.6V
 Digital interface SPI (4-wire, 3-wire), I²C, 4 interrupt pins
VDDIO voltage range: 1.2V to 3.6V
 Smart operation and integration All sensors can be operated individually
9-axis FusionLib software compatible
 Consumer electronics suite MSL1, RoHS and RoHS2 compliant, halogen-free
Operating temperature: -40°C ... +85°C

Accelerometer features
 Programmable functionality Acceleration ranges ±2g/±4g/±8g/±16g
Low-pass filter bandwidths 1kHz - <8Hz
 On-chip FIFO Integrated FIFO with a depth of 32 frames
 On-chip interrupt controller Motion-triggered interrupt-signal generation for
- new data
- any-motion (slope) detection
- tap sensing (single tap / double tap)
- orientation- & motion inactivity recognition
- flat/low-g/high-g detection
 On-chip temperature sensor factory trimmed, 8-bit, typical slope 0.5K/LSB.
 Ultra-low power IC 130µA current consumption, 1.3ms wake-up time,
advanced features for system power management

Gyroscope features
 Programmable functionality Ranges switchable from ±125°/s to ±2000°/s
Low-pass filter bandwidths 230Hz - 12Hz
Fast and slow offset controller (FOC and SOC)
 On-chip FIFO Integrated FIFO with a depth of 100 frames
 On-chip interrupt controller Motion-triggered interrupt-signal generation for
- new data
- any-motion (slope) detection
- high rate
 Low power IC < 5mA current consumption, 30ms start-up time
wake-up time in fast power-up mode only 10ms

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are preliminary and subject to change without notice.
BMX055
Data sheet Page 3

Magnetometer features
 Flexible functionality Magnetic field range typical 1300µT (x-, y-axis);
±2500µT (z-axis)
Magnetic field resolution of ~0.3µT
 On-chip interrupt controller Interrupt-signal generation for
- new data
- magnetic low-/high-threshold detection
 Ultra-low power Low current consumption (170µA @ 10Hz in low
power preset), short wake-up time, advanced
features for system power management

Typical applications
 Advanced gaming, HMI and augmented reality
 Advanced gesture recognition
 Indoor navigation
 Tilt measurement and compensation
 Free-fall detection and drop detection for warranty logging
 Display profile switching
 Advanced system power management for mobile applications
 Menu scrolling, tap / double tap sensing

General description
The BMX055 is an integrated 9-axis sensor for the detection of movements and rotations and
magnetic heading. It comprises the full functionality of a triaxial, low-g acceleration sensor, a
triaxial angular rate sensor and a triaxial geomagnetic sensor.

The BMX055 senses orientation, tilt, motion, acceleration, rotation, shock, vibration and heading
in cell phones, handhelds, computer peripherals, man-machine interfaces, virtual reality
features and game controllers.

Advanced evaluation circuitry (ASIC) converts the outputs of the micro-electromechanical and
geomagnetic sensing structures (MEMS), developed, produced and tested in BOSCH facilities.
The programmable on-chip interrupt engine enables motion-based applications without use of a
microcontroller by providing contextual status of accelerometer, gyroscope and geomagnetic
sensor. The integrated FIFO memories allow buffering the inertial sensor data.

The corresponding chip-sets are integrated into one single 20-pin LGA 3.0mm x 4.5mm x
0.95 mm housing. For optimum system integration the BMX055 is equipped with digital bi-
directional SPI and I2C interfaces. To provide maximum performance and reliability each device
is tested and ready-to-use calibrated.

Package and interfaces of the BMX055 have been defined to match a multitude of hardware
requirements. Since the sensor features a small footprint, a flat package and very low power
consumption it is ideally suited for mobile-phone and tablet PC applications.

The BMX055 offers a variable VDDIO voltage range from 1.2V to 3.6V and can be programmed
to optimize functionality, performance and power consumption in customer specific applications.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Index of Contents
BASIC DESCRIPTION ................................................................................................................... 2

1 SPECIFICATION ................................................................................................................... 10
1.1 ELECTRICAL SPECIFICATION .......................................................................................... 10
1.2 ELECTRICAL AND PHYSICAL CHARACTERISTICS, MEASUREMENT PERFORMANCE ............... 11

2 ABSOLUTE MAXIMUM RATINGS ....................................................................................... 20

3 BLOCK DIAGRAM ................................................................................................................ 21

4 BASIC POWER MANAGEMENT ......................................................................................... 22

5 FUNCTIONAL DESCRIPTION ACCELEROMETER ........................................................... 23

5.1 ACCELERATION DATA ................................................................................................... 23
5.2 IMU DATA ACCELEROMETER ......................................................................................... 27
5.2.1 ACCELERATION DATA .............................................................................................................27
5.2.2 TEMPERATURE SENSOR .........................................................................................................28
5.3 SELF-TEST ACCELEROMETER ........................................................................................ 29
5.4 OFFSET COMPENSATION ACCELEROMETER .................................................................... 30
5.4.1 FAST COMPENSATION ............................................................................................................31
5.4.2 FAST COMPENSATION ............................................................................................................31
5.4.3 MANUAL COMPENSATION ........................................................................................................32
5.4.4 INLINE CALIBRATION ...............................................................................................................32
5.5 NON-VOLATILE MEMORY ACCELEROMETER .................................................................... 33
5.6 INTERRUPT CONTROLLER ACCELEROMETER ................................................................... 33
5.6.1 GENERAL FEATURES ..............................................................................................................34
5.6.2 MAPPING TO PHYSICAL INTERRUPT PINS (INTTYPE TO INT PIN#) ..............................................35
5.6.3 ELECTRICAL BEHAVIOR (INT PIN# TO OPEN-DRIVE OR PUSH-PULL) ...........................................35
5.6.4 NEW DATA INTERRUPT .......................................................................................................... 36
5.6.5 SLOPE / ANY-MOTION DETECTION .......................................................................................... 36
5.6.6 TAP SENSING .........................................................................................................................37
5.6.7 ORIENTATION RECOGNITION .................................................................................................. 39
5.6.8 FLAT DETECTION....................................................................................................................43
5.6.9 LOW-G INTERRUPT .................................................................................................................44
5.6.10 HIGH-G INTERRUPT ................................................................................................................45
5.6.11 NO-MOTION / SLOW MOTION DETECTION..................................................................................45
5.7 SOFTRESET ACCELEROMETER ...................................................................................... 47

6 REGISTER DESCRIPTION ACCELEROMETER ................................................................ 48

6.1 GENERAL REMARKS ACCELEROMETER .......................................................................... 48
6.2 REGISTER MAP ACCELEROMETER .................................................................................. 49

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ACC REGISTER 0X00 (BGW_CHIPID) ................................................................................................. 50

ACC REGISTER 0X01 IS RESERVED....................................................................................................... 50
ACC REGISTER 0X02 (ACCD_X_LSB) ................................................................................................ 50
ACC REGISTER 0X03 (ACCD_X_MSB) ................................................................................................51
ACC REGISTER 0X04 (ACCD_Y_LSB) .................................................................................................51
ACC REGISTER 0X05 (ACCD_Y_MSB) ................................................................................................52
ACC REGISTER 0X06 (ACCD_Z_LSB)..................................................................................................52
ACC REGISTER 0X07 (ACCD_Z_MSB) .................................................................................................53
ACC REGISTER 0X08 (ACCD_TEMP)...................................................................................................53
ACC REGISTER 0X09 (INT_STATUS_0) ...............................................................................................54
ACC REGISTER 0X0A (INT_STATUS_1) ..............................................................................................54
ACC REGISTER 0X0B (INT_STATUS_2) ..............................................................................................55
ACC REGISTER 0X0C (INT_STATUS_3) ............................................................................................. 56
ACC REGISTER 0X0D IS RESERVED ...................................................................................................... 56
ACC REGISTER 0X0E (FIFO_STATUS) ............................................................................................... 56
ACC REGISTER 0X0F (PMU_RANGE) ..................................................................................................57
ACC REGISTER 0X10 (PMU_BW) .........................................................................................................57
ACC REGISTER 0X11 (PMU_LPW) .......................................................................................................58
ACC REGISTER 0X12 (PMU_LOW_POWER) .......................................................................................58
ACC REGISTER 0X13 (ACCD_HBW) ................................................................................................... 59
ACC REGISTER 0X14 (BGW_SOFTRESET)........................................................................................ 60
ACC REGISTER 0X15 IS RESERVED....................................................................................................... 60
ACC REGISTER 0X16 (INT_EN_0) ....................................................................................................... 60
ACC REGISTER 0X17 (INT_EN_1) ....................................................................................................... 61
ACC REGISTER 0X18 (INT_EN_2) ....................................................................................................... 61
ACC REGISTER 0X19 (INT_MAP_0) .................................................................................................... 62
ACC REGISTER 0X1A (INT_MAP_1) .................................................................................................... 62
ACC REGISTER 0X1B (INT_MAP_2) .................................................................................................... 63
ACC REGISTER 0X1C IS RESERVED ...................................................................................................... 63
ACC REGISTER 0X1D IS RESERVED ...................................................................................................... 63
ACC REGISTER 0X1E (INT_SRC) ........................................................................................................ 63
ACC REGISTER 0X1F IS RESERVED ...................................................................................................... 64
ACC REGISTER 0X20 (INT_OUT_CTRL) ............................................................................................. 64
ACC REGISTER 0X21 (INT_RST_LATCH) ........................................................................................... 65
ACC REGISTER 0X22 (INT_0) .............................................................................................................. 65
ACC REGISTER 0X23 (INT_1) .............................................................................................................. 66
ACC REGISTER 0X24 (INT_2) .............................................................................................................. 66
ACC REGISTER 0X25 (INT_3) .............................................................................................................. 66
ACC REGISTER 0X26 (INT_4) .............................................................................................................. 67
ACC REGISTER 0X27 (INT_5) .............................................................................................................. 67
ACC REGISTER 0X28 (INT_6) .............................................................................................................. 68
ACC REGISTER 0X29 (INT_7) .............................................................................................................. 69
ACC REGISTER 0X2A (INT_8) .............................................................................................................. 69
ACC REGISTER 0X2B (INT_9) .............................................................................................................. 70
ACC REGISTER 0X2C (INT_A) ............................................................................................................. 70
ACC REGISTER 0X2D (INT_B) ..............................................................................................................71
ACC REGISTER 0X2E (INT_C) ..............................................................................................................71
ACC REGISTER 0X2F (INT_D) ..............................................................................................................72
ACC REGISTER 0X30 (FIFO_CONFIG_0).............................................................................................72
ACC REGISTER 0X31 IS RESERVED........................................................................................................73
ACC REGISTER 0X32 (PMU_SELF_TEST)...........................................................................................73
ACC REGISTER 0X33 (TRIM_NVM_CTRL) ...........................................................................................73
ACC REGISTER 0X34 (BGW_SPI3_WDT) ............................................................................................74
ACC REGISTER 0X35 IS RESERVED........................................................................................................74
ACC REGISTER 0X36 (OFC_CTRL) ......................................................................................................74
ACC REGISTER 0X37 (OFC_SETTING)................................................................................................75

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ACC REGISTER 0X38 (OFC_OFFSET_X) ............................................................................................ 76

ACC REGISTER 0X39 (OFC_OFFSET_Y)............................................................................................ 76
ACC REGISTER 0X3A (OFC_OFFSET_Z) ............................................................................................77
ACC REGISTER 0X3B (TRIM_GP0) ......................................................................................................77
ACC REGISTER 0X3C (TRIM_GP1) ......................................................................................................78
ACC REGISTER 0X3D IS RESERVED .......................................................................................................78
ACC REGISTER 0X3E (FIFO_CONFIG_1) ............................................................................................78
ACC REGISTER 0X3F (FIFO_DATA) .................................................................................................... 79

7 FUNCTIONAL DESCRIPTION GYROSCOPE ..................................................................... 80

7.1 POWER MODES GYROSCOPE......................................................................................... 80
7.1.1 ADVANCED POWER-SAVING MODES ........................................................................................81
7.2 BMX055 DATA GYROSCOPE ........................................................................................ 83
7.2.1 RATE DATA ............................................................................................................................83
7.3 ANGULAR RATE READ-OUT........................................................................................... 84
7.4 SELF-TEST GYRO ......................................................................................................... 84
7.5 OFFSET COMPENSATION GYROSCOPE ........................................................................... 84
7.5.1 SLOW COMPENSATION ...........................................................................................................85
7.5.2 FAST COMPENSATION ............................................................................................................85
7.5.3 MANUAL COMPENSATION ....................................................................................................... 86
7.5.4 INLINE CALIBRATION .............................................................................................................. 86
7.6 NON-VOLATILE MEMORY GYROSCOPE ............................................................................ 86
7.7 INTERRUPT CONTROLLER GYROSCOPE.......................................................................... 87
7.7.1 GENERAL FEATURES ..............................................................................................................87
7.7.2 MAPPING TO PHYSICAL INTERRUPT PINS (INTTYPE TO INT PIN#) ..............................................88
7.7.3 ELECTRICAL BEHAVIOUR (INT PIN# TO OPEN-DRIVE OR PUSH-PULL) .........................................88
7.7.4 NEW DATA INTERRUPT ...........................................................................................................88
7.7.5 ANY-MOTION DETECTION / INTERRUPT ................................................................................... 89
7.7.6 HIGH-RATE INTERRUPT ......................................................................................................... 90

8 REGISTER DESCRIPTION GYROSCOPE .......................................................................... 91

8.1 GENERAL REMARKS ..................................................................................................... 91
8.2 REGISTER MAP GYROSCOPE ......................................................................................... 92
GYR REGISTER 0X00 (CHIP_ID) ......................................................................................................... 93
GYR REGISTER 0X01 IS RESERVED ...................................................................................................... 93
GYR REGISTER 0X02 (RATE_X_LSB) ................................................................................................. 93
GYR REGISTER 0X03 (RATE_X_MSB) ................................................................................................ 94
GYR REGISTER 0X04 (RATE_Y_LSB) ................................................................................................. 94
GYR REGISTER 0X05 (RATE_Y_MSB) ................................................................................................ 95
GYR REGISTER 0X06 (RATE_Z_LSB) ................................................................................................. 95
GYR REGISTER 0X07 (RATE_Z_MSB) ................................................................................................ 96
GYR REGISTER 0X08 RESERVED .......................................................................................................... 96
GYR REGISTER 0X09 (INT_STATUS_0) ............................................................................................. 96
GYR REGISTER 0X0A (INT_STATUS_1) ............................................................................................. 97
GYR REGISTER 0X0B (INT_STATUS_2) ............................................................................................. 97
GYR REGISTER 0X0C (INT_STATUS_3) ............................................................................................. 97
GYR REGISTER 0X0D IS RESERVED ...................................................................................................... 98

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR REGISTER 0X0E (FIFO_STATUS) ............................................................................................... 98

GYR REGISTER 0X0F (RANGE)........................................................................................................... 99
GYR REGISTER 0X10 (BW) .................................................................................................................. 99
GYR REGISTER 0X11 (LPM1) ............................................................................................................ 100
GYR REGISTER 0X12 (LPM2) ............................................................................................................ 101
GYR REGISTER 0X13 (RATE_HBW).................................................................................................. 102
GYR REGISTER 0X14 (BGW_SOFTRESET) ..................................................................................... 103
GYR REGISTER 0X15 (INT_EN_0) ..................................................................................................... 103
GYR REGISTER 0X16 (INT_EN_1) ..................................................................................................... 104
GYR REGISTER 0X17 (INT_MAP_0) .................................................................................................. 104
GYR REGISTER 0X18 (INT_MAP_1) .................................................................................................. 104
GYR REGISTER 0X19 (INT_MAP_2) .................................................................................................. 105
GYR REGISTER 0X1A ........................................................................................................................ 106
GYR REGISTER 0X1B ........................................................................................................................ 106
GYR REGISTER 0X1C ........................................................................................................................ 106
GYR REGISTER 0X1D IS RESERVED. ................................................................................................... 107
GYR REGISTER 0X1E ........................................................................................................................ 107
GYR REGISTER 0X1F AND 0X20 ARE RESERVED ................................................................................. 107
GYR REGISTER 0X21 (INT_RST_LATCH) ......................................................................................... 108
GYR REGISTER 0X22 (HIGH_TH_X).................................................................................................... 108
GYR REGISTER 0X23 (HIGH_DUR_X) ................................................................................................ 109
GYR REGISTER 0X24 (HIGH_TH_Y) ................................................................................................... 109
GYR REGISTER 0X25 (HIGH_DUR_Y) ................................................................................................ 110
GYR REGISTER 0X26 (HIGH_TH_Z) ................................................................................................... 110
GYR REGISTER 0X27 (HIGH_DUR_Z) .................................................................................................111
GYR REGISTER 0X28 TO 0X30 ARE RESERVED ....................................................................................111
GYR REGISTER 0X31 (SOC) ...............................................................................................................111
GYR REGISTER 0X32 (A_FOC) ...........................................................................................................112
GYR REGISTER 0X33 (TRIM_NVM_CTRL) ........................................................................................112
GYR REGISTER 0X34 (BGW_SPI3_WDT) ..........................................................................................113
GYR REGISTER 0X35 IS RESERVED .....................................................................................................113
GYR REGISTER 0X36 (OFC1) .............................................................................................................114
GYR REGISTER 0X37 (OFC2) .............................................................................................................114
GYR REGISTER 0X38 (OFC3) .............................................................................................................115
GYR REGISTER 0X39 (OFC4) .............................................................................................................115
GYR REGISTER 0X3A (TRIM_GP0) ................................................................................................... 116
GYR REGISTER 0X3B (TRIM_GP1) ................................................................................................... 116
GYR REGISTER 0X3C (BIST) ..............................................................................................................117
GYR REGISTER 0X3D (FIFO_CONFIG_0) ..........................................................................................117
GYR REGISTER 0X3E (FIFO_CONFIG_1) ..........................................................................................118

9 FUNCTIONAL DESCRIPTION MAGNETOMETER ........................................................... 120

9.1 MAGNETOMETER POWER MANAGEMENT ...................................................................... 120
9.2 MAGNETOMETER POWER MODES ................................................................................ 120
9.2.1 POWER OFF MODE .............................................................................................................. 120
9.2.2 SUSPEND MODE .................................................................................................................. 120
9.2.3 SLEEP MODE ...................................................................................................................... 120
9.2.4 ACTIVE MODE ..................................................................................................................... 120
9.3 MAGNETOMETER OUTPUT DATA .................................................................................. 122
9.3.1 MAGNETIC FIELD DATA .........................................................................................................122
9.3.2 MAGNETIC FIELD DATA TEMPERATURE COMPENSATION ..........................................................123
9.4 SELF-TEST MAGNETOMETER ....................................................................................... 124

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

9.4.1 NORMAL SELF TEST .............................................................................................................124

9.4.2 ADVANCED SELF TEST ..........................................................................................................124
9.5 NON-VOLATILE MEMORY ............................................................................................. 125
9.6 MAGNETOMETER INTERRUPT CONTROLLER ................................................................. 125
9.6.1 GENERAL FEATURES ........................................................................................................... 126
9.6.2 ELECTRICAL BEHAVIOR OF MAGNETIC INTERRUPT PINS ..........................................................127
9.6.3 DATA READY / DRDY INTERRUPT .........................................................................................127
9.6.4 LOW-THRESHOLD INTERRUPT ...............................................................................................127
9.6.5 HIGH-THRESHOLD INTERRUPT ..............................................................................................128
9.6.6 OVERFLOW......................................................................................................................... 129

10 REGISTER DESCRIPTION MAGNETOMETER ................................................................ 130

10.1 GENERAL REMARKS ................................................................................................... 130
10.2 REGISTER MAP MAGNETOMETER ................................................................................. 130
10.3 CHIP ID MAGNETOMETER ........................................................................................... 131
MAG REGISTER (0X40) .......................................................................................................................131
MAG REGISTER (0X41) IS RESERVED ...................................................................................................131
10.4 MAGNETIC FIELD DATA ............................................................................................... 131
MAG REGISTER (0X42) .......................................................................................................................131
MAG REGISTER (0X43) .......................................................................................................................131
MAG REGISTER (0X44) .......................................................................................................................132
MAG REGISTER (0X45) .......................................................................................................................132
MAG REGISTER (0X46) .......................................................................................................................132
MAG REGISTER (0X47) .......................................................................................................................133
MAG REGISTER (0X48) .......................................................................................................................133
MAG REGISTER (0X49) .......................................................................................................................133
10.5 INTERRUPT STATUS REGISTER MAGNETOMETER .......................................................... 134
MAG REGISTER (0X4A) .......................................................................................................................134
10.6 POWER AND OPERATION MODES, SELF-TEST, DATA OUTPUT RATE CONTROL REGISTERS 134
MAG REGISTER (0X4B) .......................................................................................................................134
MAG REGISTER (0X4C).......................................................................................................................135
10.7 INTERRUPT AND AXIS ENABLE SETTINGS CONTROL REGISTERS ...................................... 136
MAG REGISTER (0X4D)...................................................................................................................... 136
MAG REGISTER (0X4E) .......................................................................................................................137
MAG REGISTER (0X4F) .......................................................................................................................137
MAG REGISTER (0X50) .......................................................................................................................138
10.8 NUMBER OF REPETITIONS CONTROL REGISTERS .......................................................... 138
MAG REGISTER (0X51) .......................................................................................................................138
MAG REGISTER (0X52) ...................................................................................................................... 139

11 DIGITAL INTERFACE OF THE DEVICE............................................................................ 140

11.1 SERIAL PERIPHERAL INTERFACE (SPI) ......................................................................... 141
11.2 INTER-INTEGRATED CIRCUIT (I²C) ............................................................................... 145

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

11.2.1 SPI AND I²C ACCESS RESTRICTIONS ................................................................................... 149

12 FIFO OPERATION .............................................................................................................. 150

12.1 FIFO OPERATING MODES .......................................................................................... 150
12.2 FIFO DATA READOUT ................................................................................................ 151
12.2.1 DATA READOUT ACCELEROMETER ........................................................................................151
12.2.2 DATA READOUT GYROSCOPE ...............................................................................................152
12.2.3 EXTERNAL FIFO SYNCHRONIZATION (EFS) FOR THE GYROSCOPE .........................................152
12.3 FIFO FRAME COUNTER AND OVERRUN FLAG .............................................................. 153
12.4 FIFO INTERRUPTS ..................................................................................................... 153

13 PIN-OUT AND CONNECTION DIAGRAM ......................................................................... 155

13.1 PIN-OUT .................................................................................................................... 155
13.2 CONNECTION DIAGRAM 4-WIRE SPI ............................................................................ 157
13.3 CONNECTION DIAGRAM 3-WIRE SPI ............................................................................ 158
13.4 CONNECTION DIAGRAM I2C ......................................................................................... 159

14 PACKAGE ........................................................................................................................... 160

14.1 OUTLINE DIMENSIONS ................................................................................................ 160
14.2 SENSING AXES ORIENTATION ...................................................................................... 161
14.3 ANDROID AXES ORIENTATION ...................................................................................... 162
14.4 LANDING PATTERN RECOMMENDATION ........................................................................ 164
14.5 MARKING................................................................................................................... 165
14.5.1 MASS PRODUCTION DEVICES ............................................................................................... 165
14.5.2 ENGINEERING SAMPLES ...................................................................................................... 165
14.6 SOLDERING GUIDELINES ............................................................................................. 166
14.7 HANDLING INSTRUCTIONS ........................................................................................... 167
14.8 TAPE AND REEL SPECIFICATION ................................................................................... 168
14.8.1 ORIENTATION WITHIN THE REEL ........................................................................................... 168
14.9 ENVIRONMENTAL SAFETY ........................................................................................... 168
14.9.1 HALOGEN CONTENT ............................................................................................................ 169
14.9.2 INTERNAL PACKAGE STRUCTURE ......................................................................................... 169

15 LEGAL DISCLAIMER ......................................................................................................... 170

15.1 ENGINEERING SAMPLES.............................................................................................. 170
15.2 PRODUCT USE ........................................................................................................... 170
15.3 APPLICATION EXAMPLES AND HINTS ............................................................................ 170

16 DOCUMENT HISTORY AND MODIFICATION .................................................................. 171

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

1 Specification
If not stated otherwise, the given values are over lifetime and full performance temperature and
voltage ranges, minimum/maximum values are ±3.
1.1 Electrical specification

Table 1: Electrical parameter specification

OPERATING CONDITIONS
Parameter Symbol Condition Min Typ Max Unit
Supply Voltage
VDD 2.4 3.0 3.6 V
Internal Domains
Supply Voltage
VDDIO 1.2 2.4 3.6 V
I/O Domain
Voltage Input
VIL,a SPI & I²C 0.3VDDIO -
Low Level
Voltage Input
VIH,a SPI & I²C 0.7VDDIO -
High Level
Voltage Output
VOL,a IOL = 3mA, SPI & I²C 0.23VDDIO -
Low Level
Voltage Output
VOH IOH = 3mA, SPI 0.8VDDIO -
High Level
Operating
TA -40 +85 °C
Temperature

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

1.2 Electrical and physical characteristics, measurement performance

Table 2: Electrical characteristics accelerometer

OPERATING CONDITIONS ACCELEROMETER

Parameter Symbol Condition Min Typ Max Units
gFS2g ±2 g
gFS4g Selectable ±4 g
Acceleration Range via serial digital
gFS8g interface ±8 g
gFS16g ±16 g
Total Supply
1
Current in IDD see 130 µA
Normal Mode
Total Supply
1
Current in IDDsum see 2.1 µA
Suspend Mode
Total Supply
Current in 1
IDDdsum see 1.0 µA
Deep Suspend
Mode
Total Supply 1
IDDlp1 see
Current in 6.5 µA
sleep duration ≥ 25ms
Low-power Mode 1
Total Supply 1
IDDlp2 see
Current in 66 µA
sleep duration ≥ 25ms
Low-power Mode 2
Total Supply
1
Current in IDDsbm see 62 µA
Standby Mode
from Low-power Mode 1
or Suspend Mode or
Wake-Up Time 1 tw,up1 1.3 ms
Deep Suspend Mode
bw = 1kHz
from Low-power Mode
Wake-Up Time 2 tw,up2 2 or Stand-by Mode 1 ms
bw = 1kHz
Start-Up Time ts,up POR, bw = 1kHz ms
Non-volatile
memory (NVM) nNVM 15 Cycles
write-cycles

1
Conditions of current consumption if not specified otherwise: TA=25°C, BW_Accel=1kHz, VDD =
VDDIO = 2.4V, digital protocol on, no streaming data

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

OUTPUT SIGNAL ACCELEROMETER

Parameter Symbol Condition Min Typ Max Units
S2g gFS2g, TA=25°C 1024 LSB/g
S4g gFS4g, TA=25°C 512 LSB/g
Sensitivity
S8g gFS8g, TA=25°C 256 LSB/g
S16g gFS16g, TA=25°C 128 LSB/g
Sensitivity gFS2g,
TCS ±0.03 %/K
Temperature Drift Nominal VDD supplies
Sensitivity gFS2g, TA=25°C,
SVDD 0.05 %/V
Supply Volt. Drift VDD_min ≤ VDD ≤ VDD_max
gFS2g, TA=25°C, nominal
Zero-g Offset (x,y.z) Offx,z VDD supplies, over life- ±80 mg
time
Zero-g Offset gFS2g,
TCO ±1 mg/K
Temperature Drift Nominal VDD supplies
Zero-g Offset gFS2g, TA=25°C,
OffVDD 0.5 mg/V
Supply Volt. Drift VDD_min ≤ VDD ≤ VDD_max
bw8 8 Hz
bw16 16 Hz
bw31 31 Hz
nd
bw63 2 order filter, 63 Hz
Bandwidth bandwidth
bw125 programmable 125 Hz
bw250 250 Hz
bw500 500 Hz
bw1000 1,000 Hz
best fit straight line,
Nonlinearity NL -1 ±0.5 +1 %FS
gFS2g
gFS2g, TA=25°C
Output Noise
nrms Nominal VDD supplies 150 µg/Hz
Density
Normal mode
Temperature Sensor
TS -40 85 °C
Measurement Range

Temperature Sensor
dTS 0.5 K/LSB
Slope

Temperature Sensor
OTS ±2 K
Offset

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

MECHANICAL CHARACTERISTICS ACCELEROMETER

Parameter Symbol Condition Min Typ Max Units
relative contribution
Cross Axis
S between any two of the 1 %
Sensitivity
three axes
relative to package
Alignment Error EA ±0.5 deg
outline

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Table 3: Electrical characteristics gyroscope

OPERATING CONDITIONS GYROSCOPE

Parameter Symbol Condition Min Typ Max Unit
RFS125 125 °/s
RFS250 250 °/s
Selectable
Range RFS500 500 °/s
via serial digital interface
RFS1000 1,000 °/s
RFS2000 2,000 °/s
Supply Current in 2
IDD see 5 mA
Normal Mode
Supply Current in
2
Fast Power-up IDDfpm see 2.5 mA
Mode
2
Supply Current in see , digital and analog
I 25 µA
Suspend Mode DDsum
(only IF active)
Supply Current in
Deep Suspend I see
2
<5 µA
DDdsum
Mode
to ±1º/s of final value;
Start-up time tsu 30 ms
from power-off
From suspend- and
Wake-up time twusm 30 ms
deep suspend-modes

From fast power-up

Wake-up time twufpm 10 ms
mode

Non-volatile
memory (NVM) nNVM 15 cycles
write-cycles

2
Conditions of current consumption if not specified otherwise: TA=25°C, BW_Gyro=1kHz,
VDD=2.4V, VDDIO=1.8V, digital protocol on, no streaming data

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

OUTPUT SIGNAL GYROSCOPE

Parameter Symbol Condition Min Typ Max Unit
Ta=25°C, RFS2000 16.4 LSB/°/s
Ta=25°C, RFS1000 32.8 LSB/°/s
Sensitivity
Ta=25°C, RFS500 65.6 LSB/°/s
Ta=25°C, RFS250 131.2 LSB/°/s
Ta=25°C, RFS125 262.4 LSB/°/s
Sensitivity tolerance Ta=25°C, RFS2000 ±1 %
Nominal VDD supplies
Sensitivity Change -40°C ≤ T ≤ +85°C
TCS ±0.03 %/K
over Temperature A
RFS2000
Sensitivity TA=25°C,
SVDD <0.4 %/V
Supply Volt. Drift VDD_min ≤ VDD ≤ VDD_max

best fit straight line

Nonlinearity NL ±0.05 %FS
RFS1000, RFS2000

Sensitivity to
acceleration stimuli in
g- Sensitivity 0.1 °/s/g
all three axis
(frequency <20kHz)
Nominal VDD supplies
Off x T =25°C,
Zero-rate Offset A ±1 °/s
y and z slow and fast offset
cancellation off

Zero- Offset Nominal VDD supplies

Change over TCO -40°C ≤ T ≤ +85°C ±0.015 °/s per K
A
Temperature RFS2000

Zero- Offset TA=25°C,

Off VDD <0.1 °/s /V
Supply Volt. Drift VDD_min ≤ VDD ≤ VDD_max

rms, BW=47Hz
Output Noise n 0.1 °/s
rms
(@ 0.014°/s/√Hz)

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

unfiltered
230
116
f 64
Bandwidth BW Hz
-3dB 47
32
23
12
2000
1000
Data rate
400 Hz
(set of x,y,z rate)
200
100
Data rate tolerance
±0.3 %
(set of x,y,z rate)
Cross Axis Sensitivity to stimuli in
±1 %
Sensitivity non-sense-direction

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Table 4: Electrical characteristics magnetometer

OPERATING CONDITIONS MAGNETOMETER

Parameter Symbol Condition Min Typ Max Units
Magnetic field Brg,xy TA=25°C ±1200 ±1300 µT
3
range Brg,z ±2000 ±2500 µT
30µT horizontal
Magnetometer
4 Acheading geomagnetic field ±2.5 deg
heading accuracy
component, TA=25°C
30µT horizontal
System heading
5 Asheading geomagnetic field ±3.0 deg
accuracy
component, TA=25°C
Low power preset
IDD,lp,m Nominal VDD supplies 170 µA
TA=25°C, ODR=10Hz
Regular preset
IDD,rg,m Nominal VDD supplies 0.5 mA
Supply Current in TA=25°C, ODR=10Hz
Active Mode Enhanced regular
6
(average) preset
IDD,eh,m 0.8 mA
Nominal VDD supplies
TA=25°C, ODR=10Hz
High accuracy preset
IDD,ha,m Nominal VDD supplies 4.9 mA
TA=25°C, ODR=20Hz
Supply Current in IDDsm,m Nominal VDD/VDDIO
1 µA
Suspend Mode supplies, TA=25°C
In measurement phase
Peak supply current
IDDpk,m Nominal VDD supplies 18 mA
in Active Mode
TA=25°C
Only during
Peak logic supply measurement phase
IDDIOpk,
current in active Nominal VDDIO 210 µA
m
mode supplies
TA=25°C
from OFF to Suspend;
time starts when
POR time tw_up,m 1.0 ms
VDD>1.5V and
VDDIO>1.1V
Start-Up Time ts_up,m from Suspend to sleep 3.0 ms

3
Full linear measurement range considering sensor offsets.
4
The heading accuracy depends on hardware and software. For detailed information of the
software performance please contact Bosch Sensortec.
5
Heading accuracy of the tilt-compensated 9-axis system, assuming calibration with Bosch
Sensortec FusionLib software. Average value over various device orientations (typical device
usage).
6
For details on magnetometer current consumption calculation refer to chapter 9.2.4

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

MAGNETOMETER OUTPUT SIGNAL

Parameter Symbol Condition Min Typ Max Unit

Device Resolution Dres,m TA=25°C 0.3 µT
After API compensation
7
Gain error Gerr,m TA=25°C ±5 %
Nominal VDD supplies
After API compensation
Sensitivity
TCSm -40°C ≤ TA ≤ +85°C ±0.01 %/K
Temperature Drift
Nominal VDD supplies
Zero-B offset OFFm TA=25°C ±40 µT
After software calibration
8 with Bosch Sensortec
Zero-B offset OFFm,cal ±2 µT
eCompass software
-40°C ≤ TA ≤ +85°C
odrlp Low power preset 10 Hz
ODR (data output odrrg Regular preset 10 Hz
rate), normal
mode odreh Enhanced regular preset 10 Hz
odrha High accuracy preset 20 Hz

odrlp Low power preset 0 >300 Hz

ODR (data output odrrg Regular preset 0 100 Hz

rate), forced mode odreh Enhanced regular preset 0 60 Hz

odrha High accuracy preset 0 20 Hz

Full-scale
NLm, FS best fit straight line 1 %FS
Nonlinearity
Low power preset
nrms,lp,m,xy x, y-axis, TA=25°C 1.0 µT
Nominal VDD supplies
Low power preset
nrms,lp,m,z z-axis, TA=25°C 1.4 µT
Nominal VDD supplies
Output Noise
Regular preset
nrms,rg,m TA=25°C 0.6 µT
Nominal VDD supplies
Enhanced regular preset
nrms,eh,m TA=25°C 0.5 µT
Nominal VDD supplies

7
Definition: gain error = ( (measured field after API compensation) / (applied field) ) – 1
8
Magnetic zero-B offset assuming calibration with Bosch Sensortec eCompass software. Typical
value after applying calibration movements containing various device orientations (typical device
usage).

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

High accuracy preset

nrms,ha,m TA=25°C 0.3 µT
Nominal VDD supplies
Power Supply TA=25°C
PSRRm ±0.5 µT/V
Rejection Rate Nominal VDD supplies

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

2 Absolute maximum ratings

Table 5: Absolute maximum ratings

Parameter Condition Min Max Units

VDD Pin -0.3 4.25 V

Voltage at Supply Pin
VDDIO Pin -0.3 4.25 V
Voltage at any Logic Pin Non-Supply Pin -0.3 VDDIO+0.3 V
Passive Storage Temp. Range ≤ 65% rel. H. -50 +150 °C
None-volatile memory (NVM) T = 85°C,
10 y
Data Retention after 15 cycles

Duration ≤ 200µs 10,000 g

Duration ≤ 1.0ms 2,000 g
Mechanical Shock
Free fall
1.8 m
onto hard surfaces
HBM, at any Pin 2 kV
ESD CDM 500 V
MM 200 V

Note: Stress above these limits may cause damage to the device. Exceeding the specified
electrical limits may affect the device reliability or cause malfunction.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

3 Block diagram
Figure 1 shows the basic building blocks of the BMX055:

Figure 1: Block diagram of the BMX055

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

4 Basic power management

The BMX055 has two distinct power supply pins:
• VDD is the main power supply for the internal blocks
• VDDIO is a separate power supply pin mainly used for the supply of the interface

There are no limitations on the voltage levels of both pins relative to each other, as long as
each of them lies within its operating range. Furthermore, the device can be completely
switched off (VDD = 0V) while keeping the VDDIO supply on (VDDIO > 0V) or vice versa.

When the VDDIO supply is switched off, all interface pins (CSB, SDI, SCK, PS) must be kept
close to GNDIO potential.

The device contains a power-on reset (POR) generator. It resets the logic part and the register
values after powering-on VDD and VDDIO. Please note, that all application specific settings which
are not equal to the default settings (refer to 6.2 register map accelerometer, to 8.2 register
map gyroscope and to 10.2 register map magnetometer), must be re-set to its designated
values after POR.

In case the I²C interface shall be used, a direct electrical connection between VDDIO supply and
the PS pin is needed in order to ensure reliable protocol selection. For SPI interface mode the
PS pin must be directly connected to GNDIO.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

5 Functional description accelerometer

Note: Default values for registers can be found in Chapter 6.
5.1 Acceleration data
The accelerometer has six different power modes. Besides normal mode, which represents the
fully operational state of the device, there are five energy saving modes: deep-suspend mode,
suspend mode, standby mode, low-power mode 1 and low-power mode 2.

The possible transitions between the power modes are illustrated in Figure 2:

DEEP-
SUSPEND
Mode

SUSPEND NORMAL STANDBY

Mode Mode Mode

Low Power Low Power

Mode 1 Mode 2
Figure 2: Power mode transition diagram

After power-up accelerometer is in normal mode so that all parts of the device are held
powered-up and data acquisition is performed continuously.

In deep-suspend mode the device reaches the lowest possible power consumption. Only the
interface section is kept alive. No data acquisition is performed and the content of the
configuration registers is lost. Deep suspend mode is entered (left) by writing ‘1’ (‘0’) to the
2
(ACC 0x11) deep_suspend bit while (ACC 0x11) suspend bit is set to ‘0’. The I C watchdog
timer remains functional. The (ACC 0x11) deep_ suspend bit, the (ACC 0x34) spi3 bit, (ACC
0x34) i2c_wdt_en bit and the (ACC 0x34) i2c_wdt_sel bit are functional in deep-suspend mode.
Equally the interrupt level and driver configuration registers (ACC 0x20) int1_lvl, (ACC 0x20)
int1_od, (ACC 0x20) int2_lvl, and (ACC 0x20) int2_od are accessible. Still it is possible to enter
normal mode by performing a softreset as described in chapter 5.7. Please note, that all

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

application specific settings which are not equal to the default settings (refer to 6.2 register map
accelerometer), must be re-set to its designated values after leaving deep-suspend mode.

In suspend mode the whole analog part is powered down. No data acquisition is performed.
While in suspend mode the latest acceleration data and the content of all configuration registers
are kept. Writing to and reading from registers is supported except from the (0x3E)
fifo_config_1, (0x30) fifo_config_0 and (0x3F) fifo_data register. It is possible to enter normal
mode by performing a softreset as described in chapter 5.7.

Suspend mode is entered (left) by writing ´1´ (´0´) to the (ACC 0x11) suspend bit after bit (ACC
0x12) lowpower_mode has been set to ‘0’. Although write access to registers is supported at
the full interface clock speed (SCL or SCK), a waiting period must be inserted between two
consecutive write cycles (please refer also to section 9.2.1).

In standby mode the analog part is powered down, while the digital part remains largely
operational. No data acquisition is performed. Reading and writing registers is supported
without any restrictions. The latest acceleration data and the content of all configuration
registers are kept. Standby mode is entered (left) by writing ´1´ (´0´) to the (ACC 0x11) suspend
bit after bit (ACC 0x12) lowpower_mode has been set to ‘1’. It is also possible to enter normal
mode by performing a softreset as described in chapter 5.7.

In low-power mode 1, the device is periodically switching between a sleep phase and a wake-
up phase. The wake-up phase essentially corresponds to operation in normal mode with
complete power-up of the circuitry. The sleep phase essentially corresponds to operation in
suspend mode. Low-power mode is entered (left) by writing ´1´ (´0´) to the (ACC 0x11)
lowpower_en bit with bit (ACC 0x12) lowpower_mode set to ‘0’. Read access to registers is
possible except from the (0x3F) fifo_data register. However, unless the register access is
synchronised with the wake-up phase, the restrictions of the suspend mode apply.

Low-power mode 2 is very similar to low-power mode 1, but register access is possible at any
time without restrictions. It consumes more power than low-power mode 1. In low-power mode
2 the device is periodically switching between a sleep phase and a wake-up phase. The wake-
up phase essentially corresponds to operation in normal mode with complete power-up of the
circuitry. The sleep phase essentially corresponds to operation in standby mode. Low-power
mode is entered (left) by writing ´1´ (´0´) to the (ACC 0x11) lowpower_en bit with bit (ACC 0x12)
lowpower_mode set to ‘1’.

The timing behaviour of the low-power modes 1 and 2 depends on the setting of the (ACC
0x12) sleeptimer_en bit. When (ACC 0x12) sleeptimer_en is set to ‘0’, the event-driven time-
base mode (EDT) is selected. In EDT the duration of the wake-up phase depends on the
number of samples required by the enabled interrupt engines. If an interrupt is detected, the
device stays in the wake-up phase as long as the interrupt condition endures (non-latched
interrupt), or until the latch time expires (temporary interrupt), or until the interrupt is reset
(latched interrupt). If no interrupt is detected, the device enters the sleep phase immediately
after the required number of acceleration samples have been taken and an active interface
access cycle has ended. The EDT mode is recommended for power-critical applications which
do not use the FIFO. Also, EDT mode is compatible with legacy BST sensors. Figure 3 shows
the timing diagram for low-power modes 1 and 2 when EDT is selected.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

tACTIVE
State

Active phase

Sample

Sample
Sample
Sample
Sample
Sample
Sample

Settle
Settle
Sleep phase Settle
tSLEEP tSLEEP
t

Figure 3: Timing Diagram for low-power mode 1/2, EDT

When (ACC 0x12) sleeptimer_en is set to ‘1’, the equidistant-sampling mode (EST) is selected.
The use of the EST mode is recommended when the FIFO is used since it ensures that
equidistant samples are sampled into the FIFO regardless of whether the active phase is
extended by active interrupt engines or interface activity. In EST mode the sleep time tSLEEP is
defined as shown in Figure 4. The FIFO sampling time tSAMPLE is the sum of the sleep time tSLEEP
and the sensor data sampling time tSSMP. Since interrupt engines can extend the active phase to
exceed the sleep time tSLEEP, equidistant sampling is only guaranteed if the bandwidth has been
chosen such that 1/(2 * bw) = n * tSLEEP where n is an integer. If this condition is infringed,
equidistant sampling is not possible. Once the sleep time has elapsed the device will store the
next available sample in the FIFO. This set-up condition is not recommended as it may result in
timing jitter.

Sampled into FIFO

State

Active phase
Sample

Sample

Sample
Sample
Sample
Sample
Sample
Sample

Settle

Settle
Settle
Settle

Sleep phase
tSLEEP tSLEEP tSLEEP
tSSMP
tSAMPLE tSAMPLE tSAMPLE
t

Figure 4: Timing Diagram for low-power mode 1/2, EST

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The sleep time for lower-power mode 1 and 2 is set by the (ACC 0x11) sleep_dur bits as shown
in the following table:

Table 6: Sleep phase duration settings

Sleep Phase
(ACC 0x11)
Duration
sleep_dur
tsleep
0000b 0.5ms
0001b 0.5ms
0010b 0.5ms
0011b 0.5ms
0100b 0.5ms
0101b 0.5ms
0110b 1ms
0111b 2ms
1000b 4ms
1001b 6ms
1010b 10ms
1011b 25ms
1100b 50ms
1101b 100ms
1110b 500ms
1111b 1s

The current consumption of the accelerometer in low-power mode 1 (IDDlp1) and low-power
mode 2 (IDDlp2) can be estimated according to the following formulae:

t sleep  I DDsum  t active  I DD

I DDlp1  .
t sleep  t active

t sleep  I DDsbm  t active  I DD

I DDlp 2 
t sleep  t active

When estimating the length of the wake-up phase tactive, the corresponding typical wake-up time,
tw,up1 or tw,up2 and tut (given in Table 7) have to be considered:

If bandwidth is >=31.25 Hz:

tactive = tut + tw,up1 - 0.9 ms (or tactive = tut + tw,up2 - 0.9 ms)
else:
tactive = 4 tut + tw,up1 - 0.9 ms (or tactive = 4 tut + tw,up2 - 0.9 ms)

During the wake-up phase all analog modules are held powered-up, while during the sleep
phase most analog modules are powered down. Consequently, a wake-up time of more than
tw,up1 (tw,up2) ms is needed to settle the analog modules so that reliable acceleration data are
generated.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

5.2 IMU data accelerometer

5.2.1 Acceleration data

The width of acceleration data is 12 bits given in two´s complement representation. The 12 bits
for each axis are split into an MSB upper part (one byte containing bits 11 to 4) and an LSB
lower part (one byte containing bits 3 to 0 of acceleration and a (ACC 0x02, 0x04, 0x06)
new_data flag). Reading the acceleration data registers shall always start with the LSB part. In
order to ensure the integrity of the acceleration data, the content of an MSB register is locked by
reading the corresponding LSB register (shadowing procedure). When shadowing is enabled,
the MSB must always be read in order to remove the data lock. The shadowing procedure can
be disabled (enabled) by writing ´1´ (´0´) to the bit shadow_dis. With shadowing disabled, the
content of both MSB and LSB registers is updated by a new value immediately. Unused bits of
the LSB registers may have any value and should be ignored. The (ACC 0x02, 0x04, 0x06)
new_data flag of each LSB register is set if the data registers have been updated. The flag is
reset if either the corresponding MSB or LSB part is read.

Two different streams of acceleration data are available, unfiltered and filtered. The unfiltered
data is sampled with 2kHz. The sampling rate of the filtered data depends on the selected filter
bandwidth and is always twice the selected bandwidth (BW = ODR/2). Which kind of data is
stored in the acceleration data registers depends on bit (ACC 0x13) data_high_bw. If (ACC
0x13) data_high_bw is ´0´ (´1´), then filtered (unfiltered) data is stored in the registers. Both
data streams are offset-compensated.

The bandwidth of filtered acceleration data is determined by setting the (ACC 0x10) bw bit as
followed:
Table 7: Bandwidth configuration

Update Time
bw Bandwidth
tut
00xxx *) -
01000 7.81Hz 64ms
01001 15.63Hz 32ms
01010 31.25Hz 16ms
01011 62.5Hz 8ms
01100 125Hz 4ms
01101 250Hz 2ms
01110 500Hz 1ms
01111 1000Hz 0.5ms
1xxxx *) -

*) Note: Settings 00xxx result in a bandwidth of 7.81 Hz; settings 1xxxx result in a bandwidth of
1000 Hz. It is recommended to actively set an application specific and an appropriate bandwidth
and to use the range from ´01000b´ to ´01111b´ only in order to be compatible with future
products.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The accelerometer supports four different acceleration measurement ranges. A measurement

range is selected by setting the (ACC 0x0F) range bits as follows:

Table 8: Range selection

Acceleration
Range measurement Resolution
range
0011 ±2g 0.98mg/LSB
0101 ±4g 1.95mg/LSB
1000 ±8g 3.91mg/LSB
1100 ±16g 7.81mg/LSB
others reserved -

5.2.2 Temperature Sensor

The width of temperature data is 8 bits given in two´s complement representation. Temperature
values are available in the (ACC 0x08) temp register.

The slope of the temperature sensor is 0.5K/LSB, its center temperature is 23°C [(ACC 0x08)
temp = 0x00].

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

5.3 Self-test accelerometer

This feature permits to check the sensor functionality by applying electrostatic forces to the
sensor core instead of external accelerations. By actually deflecting the seismic mass, the
entire signal path of the sensor can be tested. Activating the self-test results in a static offset of
the acceleration data; any external acceleration or gravitational force applied to the sensor
during active self-test will be observed in the output as a superposition of both acceleration and
self-test signal.

Before the self-test is enabled the g-range should be set to 8 g. The self-test is activated
individually for each axis by writing the proper value to the (ACC 0x32) self_test_axis bits (´01b´
for x-axis, ´10b´ for y-axis, ´11b´ for z-axis, ´00b´ to deactivate self-test). It is possible to control
the direction of the deflection through bit (ACC 0x32) self_test_sign. The excitation occurs in
negative (positive) direction if (ACC 0x32) self_test_sign = ´0b´ (´1b´). The amplitude of the
deflection has to be set high by writing (ACC 0x32) self_test_amp=´1b´. After the self-test is
enabled, the user should wait 50ms before interpreting the acceleration data.

In order to ensure a proper interpretation of the self-test signal it is recommended to perform the
self-test for both (positive and negative) directions and then to calculate the difference of the
resulting acceleration values. Table 9 shows the minimum differences for each axis. The
actually measured signal differences can be significantly larger.

Table 9: Self-test difference values

x-axis signal y-axis signal z-axis signal

resulting minimum
800 mg 800 mg 400 mg
difference signal

It is recommended to perform a reset of the device after a self-test has been performed. If the
reset cannot be performed, the following sequence must be kept to prevent unwanted interrupt
generation: disable interrupts, change parameters of interrupts, wait for at least 50ms, enable
desired interrupts.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

5.4 Offset compensation accelerometer

Offsets in measured signals can have several causes but they are always unwanted and
disturbing in many cases. Therefore, the accelerometer offers an advanced set of four digital
offset compensation methods which are closely matched to each other. These are slow, fast,
and manual compensation as well as inline calibration.

The compensation is performed with filtered data, and is then applied to both, unfiltered and
filtered data. If necessary the result of this computation is saturated to prevent any overflow
errors (the smallest or biggest possible value is set, depending on the sign). However, the
registers used to read and write compensation values have a width of 8 bits.

An overview of the offset compensation principle is given in Figure 5:

I2C/SPI/NVM mapping 12 bit acceleration data range

+-16g

+-8g MSB Sign

+-4g MSB Sign 8g

+-2g MSB Sign 4g 4g

MSB Sign 2g 2g 2g

MSB Sign 1g 1g 1g 1g

500mg 500mg 500mg 500mg 500mg

250mg 250mg 250mg 250mg 250mg

125mg 125mg 125mg 125mg 125mg

Read/
Write
62.5mg
- 62.5mg 62.5mg 62.5mg 62.5mg

31.2mg 31.2mg 31.2mg 31.2mg 31.2mg

15.6mg 15.6mg 15.6mg 15.6mg 15.6mg

LSB 7.8mg 7.8mg 7.8mg 7.8mg LSB 7.8mg

3.9mg 3.9mg LSB 3.9mg

1.9mg LSB 1.9mg

LSB 0.97mg

Figure 5: Principle of offset compensation

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The public offset compensation registers (ACC 0x38) offset_x, (ACC 0x39) offset_y, (ACC
0x3A) offset_z are images of the corresponding registers in the NVM. With each image update
(see section 5.5 Non-volatile memory accelerometer for details) the contents of the NVM
registers are written to the public registers. The public registers can be over-written by the user
at any time. After changing the contents of the public registers by either an image update or
manually, all 8bit values are extended to 12bit values for internal computation. In the opposite
direction, if an internally computed value changes it is converted to an 8bit value and stored in
the public register.

Depending on the selected g-range the conversion from 12bit to 8bit values can result in a loss
of accuracy of one to several LSB. This is shown in Figure 5.

In case an internally computed compensation value is too small or too large to fit into the
corresponding register, it is saturated in order to prevent an overflow error.

By writing ´1´ to the (ACC 0x36) offset_reset bit, all offset compensation registers are reset to
zero.
5.4.1 Fast compensation
st
Slow compensation is based on a 1 order high-pass filter, which continuously drives the
average value of the output data stream of each axis to zero. The bandwidth of the high-pass
filter is configured with bit (ACC 0x37) cut_off according to Table 10.

Table 10: Compensation period settings

(ACC 0x37) high-pass filter

cut_off bandwidth
0b 1
1b 10 Hz

The slow compensation can be enabled (disabled) for each axis independently by setting the
bits (ACC 0x36) hp_x_en, hp_y_en, hp_z_en to ´1´ (´0´), respectively.

Slow compensation should not be used in combination with low-power mode. In low-power
mode the conditions (availability of necessary data) for proper function of slow compensation
are not fulfilled.
5.4.2 Fast compensation
Fast compensation is a one-shot process by which the compensation value is set in such a way
that when added to the raw acceleration, the resulting acceleration value of each axis
approaches the target value. This is best suited for “end-of-line trimming” with the customer’s
device positioned in a well-defined orientation. For fast compensation the g-range has to be
switched to 2g.

The algorithm in detail: An average of 16 consecutive acceleration values is computed and the
difference between target value and computed value is written to (ACC 0x38, 0x39, 0x3A)
offset_filt_x/y/z. The public registers (ACC 0x38, 0x39, 0x3A) offset_filt_x/y/z are updated with
the contents of the internal registers (using saturation if necessary) and can be read by the
user.

Fast compensation is triggered for each axis individually by setting the (ACC 0x36) cal_trigger
bits as shown in Table 11:

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Table 11: Fast compensation axis selection

(ACC 0x36)
Selected Axis
cal_trigger
00b none
01b x
10b y
11b z

Register (ACC 0x36) cal_trigger is a write-only register. Once triggered, the status of the fast
correction process is reflected in the status bit (ACC 0x36) cal_rdy. Bit (ACC 0x36) cal_rdy is ‘0’
while the correction is in progress. Otherwise it is ‘1’. Bit (ACC 0x36) cal_rdy is ´0´ when (ACC
0x36) cal_trigger is not ´00´.

For the fast offset compensation, the compensation target can be chosen by setting the bits
(ACC 0x37) offset_target_x, (ACC 0x37) offset_target_y, and (ACC 0x37) offset_target_z
according to Table 12:

Table 12: Offset target settings

(ACC 0x37)
Target value
offset_target_x/y/z
00b 0g
01b +1g
10b -1g
11b 0g

Fast compensation should not be used in combination with any of the low-power modes. In low-
power mode the conditions (availability of necessary data) for proper function of fast
compensation are not fulfilled.
5.4.3 Manual compensation
The contents of the public compensation registers (ACC 0x38, 0x39, 0x3A) offset_filt_x/y/z can
be set manually via the digital interface. It is recommended to write into these registers directly
after a new data interrupt has occurred in order not to disturb running offset computations.

Writing to the offset compensation registers is not allowed while the fast compensation
procedure is running.
5.4.4 Inline calibration
For certain applications, it is often desirable to calibrate the offset once and to store the
compensation values permanently. This can be achieved by using one of the aforementioned
offset compensation methods to determine the proper compensation values and then storing
these values permanently in the NVM. See section 5.5 Non-volatile memory accelerometer for
details of the storing procedure.

Each time the device is reset, the compensation values are loaded from the non-volatile
memory into the image registers and used for offset compensation. until they are possibly
overwritten using one of the other compensation methods.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

5.5 Non-volatile memory accelerometer

The entire memory of the accelerometer consists of three different kinds of registers: hard-
wired, volatile, and non-volatile. Part of it can be both read and written by the user. Access to
non-volatile memory is only possible through (volatile) image registers.

Altogether, there are eight registers (octets) with NVM backup which are accessible by the user.
The addresses of the image registers range from (ACC 0x38) to (ACC 0x3C). While the
addresses up to (ACC 0x3A) are used for offset compensation (see 5.4 Offset Compensation),
addresses (ACC 0x3B) and (ACC 0x3C) are general purpose registers not linked to any
sensor-specific functionality.

The content of the NVM is loaded to the image registers after a reset (either POR or softreset)
or after a user request which is performed by writing ´1´ to the write-only bit (ACC 0x33)
nvm_load. As long as the image update is in progress, bit (ACC 0x33) nvm_rdy is ´0´,
otherwise it is ´1´.

The image registers can be read and written like any other register.

Writing to the NVM is a three-step procedure:

1. Write the new contents to the image registers.
2. Write ´1´ to bit (ACC 0x33) nvm_prog_mode in order to unlock the NVM.
3. Write ´1´ to bit (ACC 0x33) nvm_prog_trig and keep ´1´ in bit (ACC 0x33)
nvm_prog_mode in order to trigger the write process.

Writing to the NVM always renews the entire NVM contents. It is possible to check the write
status by reading bit (ACC 0x33) nvm_rdy. While (ACC 0x33) nvm_rdy = ´0´, the write process
is still in progress; if (ACC 0x33) nvm_rdy = ´1´, then writing is completed. As long as the write
process is ongoing, no change of power mode and image registers is allowed. Also, the NVM
write cycle must not be initiated while image registers are updated, in low-power mode, and in
suspend mode.

Please note that the number of permitted NVM write-cycles is limited as specified in table 2.
The number of remaining write-cycles can be obtained by reading bits (ACC 0x33)
nvm_remain.
5.6 Interrupt controller accelerometer
The accelerometer is equipped with eight programmable interrupt engines. Each interrupt can
be independently enabled and configured. If the trigger condition of an enabled interrupt is
fulfilled, the corresponding status bit is set to ´1´ and the selected interrupt pin is activated. The
accelerometer provides two interrupt pins, INT1 and INT2; interrupts can be freely mapped to
any of these pins. The state of a specific interrupt pin is derived from a logic ´or´ combination of
all interrupts mapped to it.

The interrupt status registers are updated when a new data word is written into the acceleration
data registers. If an interrupt is disabled, all active status bits associated with it are immediately
reset.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

5.6.1 General features

An interrupt is cleared depending on the selected interrupt mode, which is common to all
interrupts. There are three different interrupt modes: non-latched, latched, and temporary. The
mode is selected by the (ACC 0x21) latch_int bits according to Table 13.

Table 13: Interrupt mode selection

(ACC 0x21) latch_int Interrupt mode

0000b non-latched
0001b temporary, 250ms
0010b temporary, 500ms
0011b temporary, 1s
0100b temporary, 2s
0101b temporary, 4s
0110b temporary, 8s
0111b latched
1000b non-latched
1001b temporary, 250µs
1010b temporary, 500µs
1011b temporary, 1ms
1100b temporary, 12.5ms
1101b temporary, 25ms
1110b temporary, 50ms
1111b latched

An interrupt is generated if its activation condition is met. It cannot be cleared as long as the
activation condition is fulfilled. In the non-latched mode the interrupt status bit and the selected
pin (the contribution to the ´or´ condition for INT1 and/or INT2) are cleared as soon as the
activation condition is no more valid. Exceptions to this behavior are the new data, orientation,
and flat interrupts, which are automatically reset after a fixed time.

In latched mode an asserted interrupt status and the selected pin are cleared by writing ´1´ to
bit (ACC 0x21) reset_int. If the activation condition still holds when it is cleared, the interrupt
status is asserted again with the next change of the acceleration registers.

In the temporary mode an asserted interrupt and selected pin are cleared after a defined period
of time. The behavior of the different interrupt modes is shown graphically in Figure 6. The
timings in this mode are subject to the same tolerances as the bandwidths (see table 2).

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

internal signal from

interrupt engine

interrupt output
non-latched

latch period

temporary

latched

Figure 6: Interrupt modes

Several interrupt engines can use either unfiltered or filtered acceleration data as their input. For
these interrupts, the source can be selected with the bits in register (ACC 0x1E). These are
(ACC 0x1E) int_src_data, (ACC 0x1E) int_src_tap, (ACC 0x1E) int_src_slo_no_mot, (ACC
0x1E) int_src_slope, (ACC 0x1E) int_src_high, and (ACC 0x1E) int_src_low. Setting the
respective bits to ´0´ (´1´) selects filtered (unfiltered) data as input. The orientation recognition
and flat detection interrupt always use filtered input data.

It is strongly recommended to set interrupt parameters prior to enabling the interrupt. Changing
parameters of an already enabled interrupt may cause unwanted interrupt generation and
generation of a false interrupt history. A safe way to change parameters of an enabled interrupt
is to keep the following sequence: disable the desired interrupt, change parameters, wait for at
least 10ms, and then re-enable the desired interrupt.
5.6.2 Mapping to physical interrupt pins (inttype to INT Pin#)
Registers (ACC 0x19) to (ACC 0x1B) are dedicated to mapping of interrupts to the interrupt pins
“INT1” or “INT2”. Setting (ACC 0x19) int1_”inttype” to ´1´ (´0´) maps (unmaps) “inttype” to pin
“INT1”. Correspondingly setting (ACC 0x1B) int2_”inttype” to ´1´ (´0´) maps (unmaps) “inttype”
to pin “INT2”.

Note: “inttype” to be replaced with the precise notation, given in the memory map in chapter 6.

Example: For flat interrupt (int1_flat): Setting (ACC 0x19) int1_flat to ´1´ maps int1_flat to pin
“INT1”.
5.6.3 Electrical behavior (INT pin# to open-drive or push-pull)
Both interrupt pins can be configured to show the desired electrical behavior. The ´active´ level
of each interrupt pin is determined by the (ACC 0x20) int1_lvl and (ACC 0x20) int2_lvl bits.

If (ACC 0x20) int1_lvl = ´1´ (´0´) / (ACC 0x20) int2_lvl = ´1´ (´0´), then pin “INT1” / pin “INT2” is
active ´1´ (´0´). The characteristic of the output driver of the interrupt pins may be configured
with bits (ACC 0x20) int1_od and (ACC 0x20) int2_od. By setting bits (ACC 0x20) int1_od /
(ACC 0x20) int2_od to ´1´, the output driver shows open-drive characteristic, by setting the
configuration bits to ´0´, the output driver shows push-pull characteristic. When open-drive
characteristic is selected in the design, external pull-up or pull-down resistor should be applied

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

according the int_lvl configuration. When open-drive characteristic is selected in the design,
external pull-up or pull-down resistor should be applied according the int_lvl configuration.

5.6.4 New data interrupt

This interrupt serves for synchronous reading of acceleration data. It is generated after storing a
new value of z-axis acceleration data in the data register. The interrupt is cleared automatically
when the next data acquisition cycle starts. The interrupt status is ´0´ for at least 50µs.

The interrupt mode of the new data interrupt is fixed to non-latched.

It is enabled (disabled) by writing ´1´ (´0´) to bit (ACC 0x17) data_en. The interrupt status is
stored in bit (ACC 0x0A) data_int.

Due to the settling time of the filter, the first interrupt after wake-up from suspend or standby
mode will take longer than the update time.
5.6.5 Slope / any-motion detection
Slope / any-motion detection uses the slope between successive acceleration signals to detect
changes in motion. An interrupt is generated when the slope (absolute value of acceleration
difference) exceeds a preset threshold. It is cleared as soon as the slope falls below the
threshold. The principle is made clear in Figure 7.

acceleration

acc(t0)

acc(t0−1/(2*bw))

time

slope(t0)=acc(t0)−acc(t0−1/(2*bw))
slope

slope_th

time

slope_dur slope_dur

INT

time

Figure 7: Principle of any-motion detection

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The threshold is defined through register (ACC 0x28) slope_th. In terms of scaling 1 LSB of
(ACC 0x28) slope_th corresponds to 3.91 mg in 2g-range (7.81 mg in 4g-range, 15.6 mg in 8g-
range and 31.3 mg in 16g-range). Therefore the maximum value is 996 mg in 2g-range (1.99g
in 4g-range, 3.98g in 8g-range and 7.97g in 16g-range).

The time difference between the successive acceleration signals depends on the selected
bandwidth and equates to 1/(2*bandwidth) (t=1/(2*bw)). In order to suppress false triggers, the
interrupt is only generated (cleared) if a certain number N of consecutive slope data points is
larger (smaller) than the slope threshold given by (ACC 0x28) slope_th. This number is set by
the (ACC 0x27) slope_dur bits. It is N = (ACC 0x27) slope_dur + 1 for (ACC 0x27).

Example: (ACC 0x27) slope_dur = 00b, …, 11b = 1decimal, …, 4decimal.

[Link] Enabling (disabling) for each axis
Any-motion detection can be enabled (disabled) for each axis separately by writing ´1´ (´0´) to
bits (ACC 0x16) slope_en_x, (ACC 0x16) slope_en_y, (ACC 0x16) slope_en_z. The criteria for
any-motion detection are fulfilled and the slope interrupt is generated if the slope of any of the
enabled axes exceeds the threshold (ACC 0x28) slope_th for [(ACC 0x27) slope_dur +1]
consecutive times. As soon as the slopes of all enabled axes fall or stay below this threshold for
[(ACC 0x27) slope_dur +1] consecutive times the interrupt is cleared unless interrupt signal is
latched.
[Link] Axis and sign information of slope / any motion interrupt
The interrupt status is stored in bit (ACC 0x09) slope_int. The any-motion interrupt supplies
additional information about the detected slope. The axis which triggered the interrupt is given
by that one of bits (ACC 0x0B) slope_first_x, (ACC 0x0B) slope_first_y, (ACC 0x0B)
slope_first_z that contains a value of ´1´. The sign of the triggering slope is held in bit (ACC
0x0B) slope_sign until the interrupt is retriggered. If (ACC 0x0B) slope_sign = ´0´ (´1´), the sign
is positive (negative).
5.6.6 Tap sensing
Tap sensing has a functional similarity with a common laptop touch-pad or clicking keys of a
computer mouse. A tap event is detected if a pre-defined slope of the acceleration of at least
one axis is exceeded. Two different tap events are distinguished: A ‘single tap’ is a single event
within a certain time, followed by a certain quiet time. A ‘double tap’ consists of a first such
event followed by a second event within a defined time frame.

Single tap interrupt is enabled (disabled) by writing ´1´ (´0´) to bit (ACC 0x16) s_tap_en. Double
tap interrupt is enabled (disabled) by writing ´1´ (´0´) to bit (ACC 0x16) d_tap_en.

The status of the single tap interrupt is stored in bit (ACC 0x09) s_tap_int, the status of the
double tap interrupt is stored in bit (ACC 0x09) d_tap_int.

The slope threshold for detecting a tap event is set by bits (ACC 0x2B) tap_th. The meaning of
(ACC 0x2B) tap_th depends on the range setting. 1 LSB of (ACC 0x2B) tap_th corresponds to
a slope of 62.5mg in 2g-range, 125mg in 4g-range, 250mg in 8g-range, and 500mg in 16g-
range.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

In Figure 8 the meaning of the different timing parameters is visualized:

slope

1st tap 2nd tap

tap_th

time

tap_shock tap_quiet tap_dur

tap_shock tap_quiet

single tap detection

12.5 ms

time
double tap detection
12.5 ms

time

Figure 8: Timing of tap detection

The parameters (ACC 0x2A) tap_shock and (ACC 0x2A) tap_quiet apply to both single tap and
double tap detection, while (ACC 0x2A) tap_dur applies to double tap detection only. Within the
duration of (ACC 0x2A) tap_shock any slope exceeding (ACC 0x2B) tap_th after the first event
is ignored. Contrary to this, within the duration of (ACC 0x2A) tap_quiet no slope exceeding
(ACC 0x2B) tap_th must occur, otherwise the first event will be cancelled.
[Link] Single tap detection
A single tap is detected and the single tap interrupt is generated after the combined durations of
(ACC 0x2A) tap_shock and (ACC 0x2A) tap_quiet, if the corresponding slope conditions are
fulfilled. The interrupt is cleared after a delay of 12.5 ms.
Do not map single-tap to any INT pin if you do not want to use it.

[Link] Double tap detection

A double tap interrupt is generated if an event fulfilling the conditions for a single tap occurs
within the set duration in (ACC 0x2A) tap_dur after the completion of the first tap event. The
interrupt is automatically cleared after a delay of 12.5 ms.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

[Link] Selecting the timing of tap detection

For each of parameters (ACC 0x2A) tap_shock and (ACC 0x2A) tap_quiet two values are
selectable. By writing ´0´ (´1´) to bit (ACC 0x2A) tap_shock the duration of (ACC 0x2A)
tap_shock is set to 50 ms (75 ms). By writing ´0´ (´1´) to bit (ACC 0x2A) tap_quiet the duration
of (ACC 0x2A) tap_quiet is set to 30 ms (20 ms).

The length of (ACC 0x2A) tap_dur can be selected by setting the (ACC 0x2A) tap_dur bits
according to Table 14:
Table 14: Selection of tap_dur

(ACC 0x2A) tap_dur length of tap_dur

000b 50 ms
001b 100 ms
010b 150 ms
011b 200 ms
100b 250 ms
101b 375 ms
110b 500 ms
111b 700 ms

[Link] Axis and sign information of tap sensing

The sign of the slope of the first tap which triggered the interrupt is stored in bit (ACC 0x0B)
tap_sign (´0´ means positive sign, ´1´ means negative sign). The value of this bit persists after
clearing the interrupt.

The axis which triggered the interrupt is indicated by bits (ACC 0x0B) tap_first_x, (ACC 0x0B)
tap_first_y, and (ACC 0x0B) tap_first_z.
The bit corresponding to the triggering axis contains a ´1´ while the other bits hold a ´0´. These
bits are cleared together with clearing the interrupt status.
[Link] Tap sensing in low power mode
In low-power mode, a limited number of samples is processed after wake-up to decide whether
an interrupt condition is fulfilled. The number of samples is selected by bits (ACC 0x2B)
tap_samp according to Table 15.

Table 15: Meaning of (ACC 0x2B) tap_samp

(ACC 0x2B) tap_samp Number of Samples

00b 2
01b 4
10b 8
11b 16

5.6.7 Orientation recognition

The orientation recognition feature informs on an orientation change of the sensor with respect
to the gravitational field vector ‘g’. The measured acceleration vector components with respect
to the gravitational field are defined as shown in Figure 9.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Figure 9: Definition of vector components

Therefore, the magnitudes of the acceleration vectors are calculated as follows:

acc_x = 1g x sin x cos

acc_y = −1g x sin x sin
acc_z = 1g x cos
acc_y/acc_x = −tan

Depending on the magnitudes of the acceleration vectors the orientation of the device in the
space is determined and stored in the three (ACC 0x0C) orient bits. These bits may not be reset
in the sleep phase of low-power mode. There are three orientation calculation modes with
different thresholds for switching between different orientations: symmetrical, high-
asymmetrical, and low-asymmetrical. The mode is selected by setting the (ACC 0x2C)
orient_mode bits as given in Table 16.

Table 16: Orientation mode settings

(ACC 0x2C) orient_mode Orientation Mode

00b symmetrical
01b high-asymmetrical
10b low-asymmetrical
11b symmetrical

For each orientation mode the (ACC 0x0C) orient bits have a different meaning as shown in
Table 17 to Table 19:

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Table 17: Meaning of the (ACC 0x0C) orient bits in symmetrical mode

(ACC 0x0C) orient Name Angle Condition

Table 18: Meaning of the (ACC 0x0C) orient bits in high-asymmetrical mode

(ACC 0x0C) orient Name Angle Condition

Table 19: Meaning of the (ACC 0x0C) orient bits in low-asymmetrical mode

(ACC 0x0C) orient Name Angle Condition

In the preceding tables, the parameter ‘hyst’ stands for a hysteresis, which can be selected by
setting the (ACC 0x2C) orient_hyst bits. 1 LSB of (ACC 0x2C) orient_hyst always corresponds
to 62.5 mg, in any g-range (i.e. increment is independent from g-range setting). It is important to
note that by using a hysteresis ≠ 0 the actual switching angles become different from the angles
given in the tables since there is an overlap between the different orientations.
The most significant bit of the (ACC 0x0C) orient bits (which is displayed as an ´x´ in the above
given tables) contains information about the direction of the z-axis. It is set to ´0´ (´1´) if acc_z ≥
0 (acc_z < 0).

Figure 10 shows the typical switching conditions between the four different orientations for the
symmetrical mode i.e. without hysteresis:

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

portrait
portraitupright
upright landscape left portrait
portraitupside
upside landscape
landscaperight
right portrait upright
down
2

1.5

0.5

0
0 45 90 135 180 225 270 315 360
-0.5

-1 acc_y/acc_x
acc_x/sin(theta)
-1.5 acc_y/sin(theta)

-2

phi

Figure 10: Typical orientation switching conditions w/o hysteresis

The orientation interrupt is enabled (disabled) by writing ´1´ (´0´) to bit (ACC 0x16) orient_en.
The interrupt is generated if the value of (ACC 0x0C) orient has changed. It is automatically
cleared after one stable period of the (ACC 0x0C) orient value. The interrupt status is stored in
the (ACC 0x09) orient_int bit. The register (ACC 0x0C) orient always reflects the current
orientation of the device, irrespective of which interrupt mode has been selected. Bit (ACC
0x0C) orient<2> reflects the device orientation with respect to the z-axis. The bits (ACC 0x0C)
orient<1:0> reflect the device orientation in the x-y-plane. The conventions associated with
register (ACC 0x0C) orient are detailed in chapter 6.
[Link] Orientation blocking
The change of the (ACC 0x0C) orient value and – as a consequence – the generation of the
interrupt can be blocked according to conditions selected by setting the value of the (ACC
0x2C) orient_blocking bits as described by Table 20.

Table 20: Blocking conditions for orientation recognition

(ACC 0x2C) orient_blocking Conditions

00b no blocking
theta blocking
01b or
acceleration in any axis > 1.5g
theta blocking
or
10b acceleration slope in any axis > 0.2 g
or
acceleration in any axis > 1.5g
theta blocking
or
acceleration slope in any axis > 0.4 g
11b
or
acceleration in any axis > 1.5g and value of orient is
not stable for at least 100 ms

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The theta blocking is defined by the following inequality:

blocking _ theta
tan   .
8

The parameter blocking_theta of the above given equation stands for the contents of the (ACC
0x2D) orient_theta bits. It is possible to define a blocking angle between 0° and 44.8°. The
internal blocking algorithm saturates the acceleration values before further processing. As a
consequence, the blocking angles are strictly valid only for a device at rest; they can be
different if the device is moved.

Example:
To get a maximum blocking angle of 19° the parameter blocking_theta is determined in the
following way: (8 * tan(19°) )² = 7.588, therefore, blocking_value = 8dec = 001000b has to be
chosen.

In order to avoid unwanted generation of the orientation interrupt in a nearly flat position (z ~ 0,
sign change due to small movements or noise), a hysteresis of 0.2 g is implemented for the z-
axis, i. e. a after a sign change the interrupt is only generated after |z| > 0.2 g.
[Link] Up-Down Interrupt Suppression Flag
Per default an orientation interrupt is triggered when any of the bits in register (ACC 0x0C)
orient changes state. The accelerometer can be configured to trigger orientation interrupts only
when the device position changes in the x-y-plane while orientation changes with respect to the
z-axis are ignored. A change of the orientation of the z-axis, and hence a state change of bit
(ACC 0x0C) orient<2> is ignored (considered) when bit (ACC 0x2D) orient_ud_en is set to ‘0’
(‘1’).

5.6.8 Flat detection

The flat detection feature gives information about the orientation of the devices´ z-axis relative
to the g-vector, i. e. it recognizes whether the device is in a flat position or not.

The flat angle  is adjustable by (0x2E) flat_theta from 0° to 44.8°. The flat angle can be set
according to following formula:

1 
  atan flat_theta 
8 

A hysteresis of the flat detection can be enabled by (0x2F) flat_hy bits. In this case the flat
position is set if the angle drops below following threshold:

1  flat _ hy  flat _ hy 
 hyst,ll  atan flat_theta  1  
8  1024  16 
 

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The flat position is reset if the angle exceeds the following threshold:

1  flat _ hy  flat _ hy 
 hyst,ul  atan flat_theta  1  
8  1024  16 


The flat interrupt is enabled (disabled) by writing ´1´ (´0´) to bit (ACC 0x16) flat_en. The flat
value is stored in the (ACC 0x0C) flat bit if the interrupt is enabled. This value is ´1´ if the device
is in the flat position, it is ´0´ otherwise. The flat interrupt is generated if the flat value has
changed and the new value is stable for at least the time given by the (ACC 0x2F)
flat_hold_time bits. A flat interrupt may be also generated if the flat interrupt is enabled. The
actual status of the interrupt is stored in the (ACC 0x09) flat_int bit. The flat orientation of the
sensor can always be determined from reading the (ACC 0x0C) flat bit after interrupt
generation. If unlatched interrupt mode is used, the (ACC 0x09) flat_int value and hence the
interrupt is automatically cleared after one sample period. If temporary or latched interrupt mode
is used, the (ACC 0x09) flat_int value is kept fixed until the latch time expires or the interrupt is
reset.

The meaning of the (ACC 0x2F) flat_hold_time bits can be seen from Table 21.

Table 21: Meaning of flat_hold_time

(ACC 0x2F) flat_hold_time Time

00b 0
01b 512 ms
10b 1024 ms
11b 2048 ms

5.6.9 Low-g interrupt

This interrupt is based on the comparison of acceleration data against a low-g threshold, which
is most useful for free-fall detection.

The interrupt is enabled (disabled) by writing ´1´ (´0´) to the (ACC 0x17) low_en bit. There are
two modes available, ‘single’ mode and ‘sum’ mode. In ‘single’ mode, the acceleration of each
axis is compared with the threshold; in ‘sum’ mode, the sum of absolute values of all
accelerations |acc_x| + |acc_y| + |acc_z| is compared with the threshold. The mode is selected
by the contents of the (ACC 0x24) low_mode bit: ´0´ means ‘single’ mode, ´1´ means ‘sum’
mode.

The low-g threshold is set through the (ACC 0x23) low_th register. 1 LSB of (ACC 0x23) low_th
always corresponds to an acceleration of 7.81 mg (i.e. increment is independent from g-range
setting).

A hysteresis can be selected by setting the (ACC 0x24) low_hy bits. 1 LSB of (ACC 0x24)
low_hy always corresponds to an acceleration difference of 125 mg in any g-range (as well,
increment is independent from g-range setting).

The low-g interrupt is generated if the absolute values of the acceleration of all axes (´and´
relation, in case of single mode) or their sum (in case of sum mode) are lower than the
threshold for at least the time defined by the (ACC 0x22) low_dur register. The interrupt is reset

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

if the absolute value of the acceleration of at least one axis (´or´ relation, in case of single
mode) or the sum of absolute values (in case of sum mode) is higher than the threshold plus
the hysteresis for at least one data acquisition. In bit (ACC 0x09) low_int the interrupt status is
stored.

The relation between the content of (ACC 0x22) low_dur and the actual delay of the interrupt
generation is: delay [ms] = [(ACC 0x22) low_dur + 1] • 2 ms. Therefore, possible delay times
range from 2 ms to 512 ms.
5.6.10 High-g interrupt
This interrupt is based on the comparison of acceleration data against a high-g threshold for the
detection of shock or other high-acceleration events.

The high-g interrupt is enabled (disabled) per axis by writing ´1´ (´0´) to bits (ACC 0x17)
high_en_x, (ACC 0x17) high_en_y, and (ACC 0x17) high_en_z, respectively. The high-g
threshold is set through the (ACC 0x26) high_th register. The meaning of an LSB of (ACC
0x26) high_th depends on the selected g-range: it corresponds to 7.81 mg in 2g-range, 15.63
mg in 4g-range, 31.25 mg in 8g-range, and 62.5 mg in 16g-range (i.e. increment depends from
g-range setting).

A hysteresis can be selected by setting the (ACC 0x24) high_hy bits. Analogously to (ACC
0x26) high_th, the meaning of an LSB of (ACC 0x24) high_hy is g-range dependent: It
corresponds to an acceleration difference of 125 mg in 2g-range, 250 mg in 4g-range, 500 mg
in 8g-range, and 1000mg in 16g-range (as well, increment depends from g-range setting).

The high-g interrupt is generated if the absolute value of the acceleration of at least one of the
enabled axes (´or´ relation) is higher than the threshold for at least the time defined by the (ACC
0x25) high_dur register. The interrupt is reset if the absolute value of the acceleration of all
enabled axes (´and´ relation) is lower than the threshold minus the hysteresis for at least the
time defined by the (ACC 0x25) high_dur register. In bit (ACC 0x09) high_int the interrupt status
is stored. The relation between the content of (ACC 0x25) high_dur and the actual delay of the
interrupt generation is delay [ms] = [(ACC 0x22) low_dur + 1] • 2 ms. Therefore, possible delay
times range from 2 ms to 512 ms. The interrupt will be cleared immediately once acceleration is
lower than threshold.
[Link] Axis and sign information of high-g interrupt
The axis which triggered the interrupt is indicated by bits (ACC 0x0C) high_first_x, (ACC 0x0C)
high_first_y, and (ACC 0x0C) high_first_z. The bit corresponding to the triggering axis contains
a ´1´ while the other bits hold a ´0´. These bits are cleared together with clearing the interrupt
status. The sign of the triggering acceleration is stored in bit (ACC 0x0C) high_sign. If (ACC
0x0C) high_sign = ´0´ (´1´), the sign is positive (negative).

5.6.11 No-motion / slow motion detection

The slow-motion/no-motion interrupt engine can be configured in two modes.

In slow-motion mode an interrupt is triggered when the measured slope of at least one enabled
axis exceeds the programmable slope threshold for a programmable number of samples.
Hence the engine behaves similar to the any-motion interrupt, but with a different set of
parameters. In order to suppress false triggers, the interrupt is only generated (cleared) if a
certain number N of consecutive slope data points is larger (smaller) than the slope threshold
given by (ACC 0x27) slo_no_mot_dur<1:0>. The number is N = (ACC 0x27)

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

slo_no_mot_dur<1:0> + 1.

In no-motion mode an interrupt is generated if the slope on all selected axes remains smaller
than a programmable threshold for a programmable delay time. Figure 11 shows the timing
diagram for the no-motion interrupt. The scaling of the threshold value is identical to that of the
slow-motion interrupt. However, in no-motion mode register (ACC 0x27) slo_no_mot_dur
defines the delay time before the no-motion interrupt is triggered. Table 22 lists the delay times
adjustable with register (ACC 0x27) slo_no_mot_dur. The timer tick period is 1 second. Hence
using short delay times can result in considerable timing uncertainty.

If bit (ACC 0x18) slo_no_mot_sel is set to ‘1’ (‘0’) the no-motion/slow-motion interrupt engine is
configured in the no-motion (slow-motion) mode. Common to both modes, the engine monitors
the slopes of the axes that have been enabled with bits (ACC 0x18) slo_no_mot_en_x, (ACC
0x18) slo_no_mot_en_y, and (ACC 0x18) slo_no_mot_en_z for the x-axis, y-axis and z-axis,
respectively. The measured slope values are continuously compared against the threshold
value defined in register (ACC 0x29) slo_no_mot_th. The scaling is such that 1 LSB of (ACC
0x29) slo_no_mot_th corresponds to 3.91 mg in 2g-range (7.81 mg in 4g-range, 15.6 mg in 8g-
range and 31.3 mg in 16g-range). Therefore the maximum value is 996 mg in 2g-range (1.99g
in 4g-range, 3.98g in 8g-range and 7.97g in 16g-range). The time difference between the
successive acceleration samples depends on the selected bandwidth and equates to 1/(2 * bw).

Table 22: No-motion time-out periods

(ACC 0x27) Delay (ACC 0x27) Delay (ACC 0x27) Delay
slo_no_mot_dur time slo_no_mot_dur time slo_no_mot_dur Time
0 1s 16 40 s 32 88 s
1 2s 17 48 s 33 96 s
2 3s 18 56 s 34 104 s
... ... 19 64 s. ... ...
14 15 s 20 72 s 62 328 s
15 16 s 21 80 s 63 336 s

Note: slo_no_mot_dur values 22 to 31 are not specified

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

acceleration acc(t0+Δt)

acc(t0)
axis x, y, or z

slope slope(t0+Δt)= acc(t0+Δt) - acc(t0)

axis x, y, or z
slo_no_mot_th

-slo_no_mot_th

slo_no_mot_dur
timer

INT

time

Figure 11: Timing of no-motion interrupt

5.7 Softreset accelerometer

A softreset causes all user configuration settings to be overwritten with their default value and
the sensor to enter normal mode.

A softreset is initiated by means of writing value ‘0xB6’ to register (ACC 0x14)softrset.

Subsequently a waiting time of tw,up1 (max.) is required prior to accessing any configuration
register.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

6 Register description accelerometer

6.1 General remarks accelerometer

The entire communication with the device is performed by reading from and writing to registers.
Registers have a width of 8 bits; they are mapped to a common space of 64 addresses from
(ACC 0x00) up to (ACC 0x3F). Within the used range there are several registers which are
either completely or partially marked as ‘reserved’. Any reserved bit is ignored when it is written
and no specific value is guaranteed when read. It is recommended not to use registers at all
which are completely marked as ‘reserved’. Furthermore it is recommended to mask out (logical
and with zero) reserved bits of registers which are partially marked as reserved.

Registers with addresses from (ACC 0x00) up to (ACC 0x0E) are read-only. Any attempt to
write to these registers is ignored. There are bits within some registers that trigger internal
sequences. These bits are configured for write-only access, e. g. (ACC 0x21) reset_int or the
entire (ACC 0x14) softreset register, and read as value ´0´.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

6.2 Register map accelerometer

0x3F fifo_data_output_register<7:0> ro 0x00

0x3E fifo_mode<1:0> fifo_data_select<1:0> w/r 0x00
0x3D w/r 0xFF
0x3C GP1<7:0> w/r 0x00
0x3B GP0<7:0> w/r 0x00
0x3A offset_z<7:0> w/r 0x00
0x39 offset_y<7:0> w/r 0x00
0x38 offset_x<7:0> w/r 0x00
0x37 offset_target_z<1:0> offset_target_y<1:0> offset_target_x<1:0> cut_off w/r 0x00
0x36 offset_reset cal_trigger<1:0> cal_rdy hp_z_en hp_y_en hp_x_en w/r 0x10
0x35 w/r 0x00
0x34 i2c_wdt_en i2c_wdt_sel spi3 w/r 0x00
0x33 nvm_remain<3:0> nvm_load nvm_rdy nvm_prog_trig nvm_prog_mode w/r 0xF0
0x32 self_test_amp self_test_sign self_test_axis<1:0> w/r 0x00
0x31 w/r 0xFF
0x30 fifo_water_mark_level_trigger_retain<5:0> w/r 0x00
0x2F flat_hold_time<1:0> flat_hy<2:0> w/r 0x11
0x2E flat_theta<5:0> w/r 0x08
0x2D orient_ud_en orient_theta<5:0> w/r 0x48
0x2C orient_hyst<2:0> orient_blocking<1:0> orient_mode<1:0> w/r 0x18
0x2B tap_samp<1:0> tap_th<4:0> w/r 0x0A
0x2A tap_quiet tap_shock tap_dur<2:0> w/r 0x04
0x29 slo_no_mot_th<7:0> w/r 0x14
0x28 slope_th<7:0> w/r 0x14
0x27 slo_no_mot_dur<5:0> slope_dur<1:0> w/r 0x00
0x26 high_th<7:0> w/r 0xC0
0x25 high_dur<7:0> w/r 0x0F
0x24 high_hy<1:0> low_mode low_hy<1:0> w/r 0x81
0x23 low_th<7:0> w/r 0x30
0x22 low_dur<7:0> w/r 0x09
0x21 reset_int latch_int<3:0> w/r 0x00
0x20 int2_od int2_lvl int1_od int1_lvl w/r 0x05
0x1F w/r 0xFF
0x1E int_src_data int_src_tap int_src_slo_no_mot int_src_slope int_src_high int_src_low w/r 0x00
0x1D w/r 0xFF
0x1C w/r 0xFF
0x1B int2_flat int2_orient int2_s_tap int2_d_tap int2_slo_no_mot int2_slope int2_high int2_low w/r 0x00
0x1A int2_data int2_fwm int2_ffull int1_ffull int1_fwm int1_data w/r 0x00
0x19 int1_flat int1_orient int1_s_tap int1_d_tap int1_slo_no_mot int1_slope int1_high int1_low w/r 0x00
0x18 slo_no_mot_sel slo_no_mot_en_z slo_no_mot_en_y slo_no_mot_en_x w/r 0x00
0x17 int_fwm_en int_ffull_en data_en low_en high_en_z high_en_y high_en_x w/r 0x00
0x16 flat_en orient_en s_tap_en d_tap_en slope_en_z slope_en_y slope_en_x w/r 0x00
0x15 w/r 0xFF
0x14 softreset wo 0x00
0x13 data_high_bw shadow_dis w/r 0x00
0x12 lowpower_mode sleeptimer_mode w/r 0x00
0x11 suspend lowpower_en deep_suspend sleep_dur<3:0> w/r 0x00
0x10 bw<4:0> w/r 0x0F
0x0F range<3:0> w/r 0x03
0x0E fifo_overrun fifo_frame_counter<6:0> ro 0x00
0x0D w/r 0xFF
0x0C flat orient<2:0> high_sign high_first_z high_first_y high_first_x ro 0x00
0x0B tap_sign tap_first_z tap_first_y tap_first_x slope_sign slope_first_z slope_first_y slope_first_x ro 0x00
0x0A data_int fifo_wm_int fifo_full_int ro 0x00
0x09 flat_int orient_int s_tap_int d_tap_int slo_no_mot_int slope_int high_int low_int ro 0x00
0x08 temp<7:0> ro 0x00
0x07 acc_z_msb<11:4> ro 0x00
0x06 acc_z_lsb<3:0> new_data_z ro 0x00
0x05 acc_y_msb<11:4> ro 0x00
0x04 acc_y_lsb<3:0> new_data_y ro 0x00
0x03 acc_x_msb<11:4> ro 0x00
0x02 acc_x_lsb<3:0> new_data_x ro 0x00
0x01 ro --
0x00 chip_id<7:0> ro 0xFA

common w/r registers: Application specific settings which are not equal to the default settings,
must be re-set to its designated values after POR, soft-reset and wake up from deep suspend.
user w/r registers: Initial default content = 0x00. Freely programmable by the user.
Remains unchanged after POR, soft-reset and wake up from deep suspend.

Figure 12: Register map accelerometer part

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ACC Register 0x00 (BGW_CHIPID)

The register contains the chip identification code.

Name 0x00 BGW_CHIPID

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content chip_id<7:4>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content chip_id<3:0>
chip_id<7:0>: Fixed value b’1111’1010

ACC Register 0x01 is reserved

ACC Register 0x02 (ACCD_X_LSB)

The register contains the least-significant bits of the X-channel acceleration readout value.
When reading out X-channel acceleration values, data consistency is guaranteed if the
ACCD_X_LSB is read out before the ACCD_X_MSB and shadow_dis=’0’. In this case, after the
ACCD_X_LSB has been read, the value in the ACCD_X_MSB register is locked until the
ACCD_X_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_X_LSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x02 ACCD_X_LSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content acc_x_lsb<3:0>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content undefined undefined undefined new_data_x

acc_x_lsb<3:0>: Least significant 4 bits of acceleration read-back value; (two’s-complement

format)
undefined: random data; to be ignored.
new_data_x: ‚0’: acceleration value has not been updated since it has been read out last
‚1’: acceleration value has been updated since it has been read out last

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ACC Register 0x03 (ACCD_X_MSB)

The register contains the most-significant bits of the X-channel acceleration readout value.
When reading out X-channel acceleration values, data consistency is guaranteed if the
ACCD_X_LSB is read out before the ACCD_X_MSB and shadow_dis=’0’. In this case, after the
ACCD_X_LSB has been read, the value in the ACCD_X_MSB register is locked until the
ACCD_X_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_X_MSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x02 ACCD_X_MSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content acc_x_msb<11:8>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content acc_x_msb<7:4>

acc_x_msb<11:4>: Most significant 8 bits of acceleration read-back value (two’s-complement

format)

ACC Register 0x04 (ACCD_Y_LSB)

The register contains the least-significant bits of the Y-channel acceleration readout value.
When reading out Y-channel acceleration values, data consistency is guaranteed if the
ACCD_Y_LSB is read out before the ACCD_Y_MSB and shadow_dis=’0’. In this case, after the
ACCD_Y_LSB has been read, the value in the ACCD_Y_MSB register is locked until the
ACCD_Y_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_Y_LSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x04 ACCD_Y_LSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content acc_y_lsb<3:0>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content undefined undefined undefined new_data_y

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

acc_y_lsb<3:0>: Least significant 4 bits of acceleration read-back value; (two’s-complement

format)
undefined: random data; to be ignored
new_data_y: ‚0’: acceleration value has not been updated since it has been read out last
‚1’: acceleration value has been updated since it has been read out last

ACC Register 0x05 (ACCD_Y_MSB)

The register contains the most-significant bits of the Y-channel acceleration readout value.
When reading out Y-channel acceleration values, data consistency is guaranteed if the
ACCD_Y_LSB is read out before the ACCD_Y_MSB and shadow_dis=’0’. In this case, after the
ACCD_Y_LSB has been read, the value in the ACCD_Y_MSB register is locked until the
ACCD_Y_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_Y_MSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x05 ACCD_Y_MSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content acc_y_msb<11:8>
Bit 3 2 1 0
Read/Write R R R R
Reset n/a n/a n/a n/a
Value
Content acc_y_msb<7:4>
acc_y_msb<11:4>: Most significant 8 bits of acceleration read-back value (two’s-complement
format)

ACC Register 0x06 (ACCD_Z_LSB)

The register contains the least-significant bits of the Z-channel acceleration readout value.
When reading out Z-channel acceleration values, data consistency is guaranteed if the
ACCD_Z_LSB is read out before the ACCD_Z_MSB and shadow_dis=’0’. In this case, after the
ACCD_Z_LSB has been read, the value in the ACCD_Z_MSB register is locked until the
ACCD_Z_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_Z_LSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x06 ACCD_Z_LSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content acc_z_lsb<3:0>

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content undefined undefined undefined new_data_z

Acc_z_lsb<3:0>: Least significant 4 bits of acceleration read-back value; (two’s-complement

format)
undefined: random data; to be ignored
new_data_z: ‚0’: acceleration value has not been updated since it has been read out last
‚1’: acceleration value has been updated since it has been read out last

ACC Register 0x07 (ACCD_Z_MSB)

The register contains the most-significant bits of the Z-channel acceleration readout value.
When reading out Z-channel acceleration values, data consistency is guaranteed if the
ACCD_Z_LSB is read out before the ACCD_Z_MSB and shadow_dis=’0’. In this case, after the
ACCD_Z_LSB has been read, the value in the ACCD_Z_MSB register is locked until the
ACCD_Z_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_Z_MSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x07 ACCD_Z_MSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content acc_z_msb<11:8>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content acc_z_msb<7:4>

acc_z_msb<11:4>: Most significant 8 bits of acceleration read-back value (two’s-complement

format)

ACC Register 0x08 (ACCD_TEMP)

The register contains the current chip temperature represented in two’s complement format. A
readout value of temp<7:0>=0x00 corresponds to a temperature of 23°C.
Name 0x08 ACCD_TEMP
Bit 7 6 5 4
Read/Write R R R R
Reset n/a n/a n/a n/a
Value
Content temp<7:4>

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Bit 3 2 1 0
Read/Write R R R R
Reset n/a n/a n/a n/a
Value
Content temp<3:0>

temp<7:0>: Temperature value (two s-complement format)

ACC Register 0x09 (INT_STATUS_0)

The register contains interrupt status flags. Each flag is associated with a specific interrupt
function. It is set when the associated interrupt triggers. The setting of latch_int<3:0> controls if
the interrupt signal and hence the respective interrupt flag will be permanently latched,
temporarily latched or not latched. The interrupt function associated with a specific status flag
must be enabled.
Name 0x09 INT_STATUS_0
Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content flat_int orient_int s_tap_int d_tap_int
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content slo_no_mot_int slope_int high_int low_int

flat_int: flat interrupt status: ‘0’inactive, ‘1’ active

orient_int: orientation interrupt status: ‘0’inactive, ‘1’ active
s_tap_int: single tap interrupt status: ‘0’inactive, ‘1’ active
d_tap_int double tap interrupt status: ‘0’inactive, ‘1’ active
slo_not_mot_int: slow/no-motion interrupt status: ‘0’inactive, ‘1’ active
slope_int: slope interrupt status: ‘0’inactive, ‘1’ active
high_int: high-g interrupt status: ‘0’inactive, ‘1’ active
low_int: low-g interrupt status: ‘0’inactive, ‘1’ active

ACC Register 0x0A (INT_STATUS_1)

The register contains interrupt status flags. Each flag is associated with a specific interrupt
function. It is set when the associated interrupt engine triggers. The setting of latch_int<3:0>
controls if the interrupt signal and hence the respective interrupt flag will be permanently
latched, temporarily latched or not latched. The interrupt function associated with a specific
status flag must be enabled.
Name 0x0A INT_STATUS_1
Bit 7 6 5 4
Read/Write R R R R

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Reset
n/a n/a n/a n/a
Value
Content data_int fifo_wm_int fifo_full_int reserved
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content reserved

data_int: data ready interrupt status: ‘0’inactive, ‘1’ active

fifo_wm_int: FIFO watermark interrupt status: ‘0’inactive, ‘1’ active
fifo_full_int: FIFO full interrupt status: ‘0’inactive, ‘1’ active
reserved: reserved, write to ‘0’

ACC Register 0x0B (INT_STATUS_2)

The register contains interrupt status flags. Each flag is associated with a specific interrupt
engine. It is set when the associated interrupt engine triggers. The setting of latch_int<3:0>
controls if the interrupt signal and hence the respective interrupt flag will be permanently
latched, temporarily latched or not latched. The interrupt function associated with a specific
status flag must be enabled.
Name 0x0B INT_STATUS_2
Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content tap_sign tap_first_z tap_first_y tap_first_x
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content slope_sign slope_first_z slope_first_y slope_first_x

tap_sign: sign of single/double tap triggering signal was ‘0’positive, or ‘1’ negative
tap_first_z: single/double tap interrupt: ‘1’  triggered by, or ‘0’not triggered by z-axis
tap_first_y: single/double tap interrupt: ‘1’  triggered by, or ‘0’not triggered by y-axis
tap_first_x: single/double tap interrupt: ‘1’  triggered by, or ‘0’not triggered by x-axis
slope_sign: slope sign of slope tap triggering signal was ‘0’positive, or ‘1’ negative
slope_first_z: slope interrupt: ‘1’  triggered by, or ‘0’not triggered by z-axis
slope_first_y: slope interrupt: ‘1’  triggered by, or ‘0’not triggered by y-axis
slope_first_x: slope interrupt: ‘1’  triggered by, or ‘0’not triggered by x-axis

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ACC Register 0x0C (INT_STATUS_3)

The register contains interrupt status flags. Each flag is associated with a specific interrupt
engine. It is set when the associated interrupt engine triggers. With the exception of orient<3:0>
the setting of latch_int<3:0> controls if the interrupt signal and hence the respective interrupt
flag will be permanently latched, temporarily latched or not latched. The interrupt function
associated with a specific status flag must be enabled.
Name 0x0C INT_STATUS_3
Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content flat orient<2:0>

Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content high_sign high_first_z high_first_y high_first_x

flat: device is in ‘1’  flat, or ‘0’ non flat position;

only valid if (ACC 0x16) flat_en = ‘1’ ‘
orient<2>: Orientation value of z-axis: ´0´  upward looking, or ´1´  downward
looking. The flag always reflect the current orientation status, independent of
the setting of latch_int<3:0>. The flag is not updated as long as an
orientation blocking condition is active.
orient<1:0>: orientation value of x-y-plane:
‘00’portrait upright; ‘01’portrait upside down;
‘10’landscape left; ‘11’landscape right;
The flags always reflect the current orientation status, independent of the
setting of latch_int<3:0>. The flag is not updated as long as an orientation
blocking condition is active.
high_sign: sign of acceleration signal that triggered high-g interrupt was ‘0’positive, ‘1’
negative
high_first_z: high-g interrupt: ‘1’  triggered by, or ‘0’not triggered by z-axis
high_first_y: high-g interrupt: ‘1’  triggered by, or ‘0’not triggered by y-axis
high_first_x: high-g interrupt: ‘1’  triggered by, or ‘0’not triggered by x-axis

ACC Register 0x0D is reserved

ACC Register 0x0E (FIFO_STATUS)

The register contains FIFO status flags.
Name 0x0E FIFO_STATUS
Bit 7 6 5 4
Read/Write R R R R
Reset n/a n/a n/a n/a

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Value
Content fifo_overrun fifo_frame_counter<6:4>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content fifo_frame_counter<3:0>

fifo_overrun: FIFO overrun condition has ‘1’  occurred, or ‘0’not occurred; flag can be
cleared by writing to the FIFO configuration register FIFO_CONFIG_1 only
fifo_frame_counter<6:4>: Current fill level of FIFO buffer. An empty FIFO corresponds to
0x00. The frame counter can be cleared by reading out all frames from the
FIFO buffer or writing to the FIFO configuration register FIFO_CONFIG_1.

ACC Register 0x0F (PMU_RANGE)

The register allows the selection of the accelerometer g-range.
Name 0x0F PMU_RANGE
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved
0
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 1 1
Value
Content range<3:0>
range<3:0>: Selection of accelerometer g-range:
´0011b´  ±2g range; ´0101b´  ±4g range; ´1000b´  ±8g range;
´1100b´  ±16g range; all other settings  reserved (do not use)
reserved: write ‘0’

ACC Register 0x10 (PMU_BW)

The register allows the selection of the acceleration data filter bandwidth.
Name 0x10 PMU_BW
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved bw<4>
0
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset 1 1 1 1

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Value
Content bw<3:0>
bw<4:0>: Selection of data filter bandwidth:
´00xxxb´  7.81 Hz, ´01000b´  7.81 Hz, ´01001b´  15.63 Hz,
´01010b´  31.25 Hz, ´01011b´  62.5 Hz, ´01100b´  125 Hz,
´01101b´  250 Hz, ´01110b´  500 Hz, ´01111b´  1000 Hz,
´1xxxxb´  1000 Hz
reserved: write ‘0’

ACC Register 0x11 (PMU_LPW)

Selection of the main power modes and the low power sleep period.
Name 0x11 PMU_LPW
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content suspend lowpower_en deep_suspend sleep_dur<3>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content sleep_dur<2:0> reserved

suspend, low_power_en, deep_suspend:

Main power mode configuration setting {suspend; lowpower_en;
deep_suspend}:
{0; 0; 0}  NORMAL mode;
{0; 0; 1}  DEEP_SUSPEND mode;
{0; 1; 0}  LOW_POWER mode;
{1; 0; 0}  SUSPEND mode;
{all other}  illegal
Please note that only certain power mode transitions are permitted.
sleep_dur<3:0>: Configures the sleep phase duration in LOW_POWER mode:
´0000b´ to ´0101b´  0.5 ms, ´0110b´  1 ms,
´0111b´  2 ms, ´1000b´  4 ms,
´1001b´  6 ms, ´1010b´  10 ms,
´1011b´  25 ms, ´1100b´  50 ms,
´1101b´  100 ms, ´1110b´  500 ms,
´1111b´ 1s

Please note, that all application specific settings which are not equal to the default settings
(refer to 6.2 register map), must be re-set to its designated values after DEEP_SUSPEND.

ACC Register 0x12 (PMU_LOW_POWER)

Configuration settings for low power mode.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Name 0x12 PMU_LOW_POWER

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved lowpower_mode sleeptimer_mode reserved

Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved

lowpower_mode: select ‘0’  LPM1, or ‘1´  LPM2 configuration for SUSPEND and
LOW_POWER mode. In the LPM1 configuration the power consumption in
LOW_POWER mode and SUSPEND mode is significantly reduced when
compared to LPM2 configuration, but the FIFO is not accessible and writing
to registers must be slowed down. In the LPM2 configuration the power
consumption in LOW_POWER mode is reduced compared to NORMAL
mode, but the FIFO is fully accessible and registers can be written to at full
speed.
sleeptimer_mode: when in LOW_POWER mode ‘0’  use event-driven time-base mode
(compatible with BMA250), or ‘1´  use equidistant sampling time-base
mode. Equidistant sampling of data into the FIFO is maintained in
equidistant time-base mode only.
reserved: write ‘0’

ACC Register 0x13 (ACCD_HBW)

Acceleration data acquisition and data output format.
Name 0x13 ACCD_HBW
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset 0 (1 in 8-bit
0 0 0
Value mode)
Content data_high_bw shadow_dis reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved

data_high_bw: select whether ‘1´ unfiltered, or ‘0’ filtered data may be read from the
acceleration data registers.
shadow_dis: ‘1´ disable, or ‘0’ the shadowing mechanism for the acceleration data
output registers. When shadowing is enabled, the content of the acceleration

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

data component in the MSB register is locked, when the component in the
LSB is read, thereby ensuring the integrity of the acceleration data during
read-out. The lock is removed when the MSB is read.
reserved: write ‘0’

ACC Register 0x14 (BGW_SOFTRESET)

Controls user triggered reset of the sensor.
Name 0x14 BGW_SOFTRESET
Bit 7 6 5 4
Read/Write W W W W
Reset
0 0 0 0
Value
Content softreset
Bit 3 2 1 0
Read/Write W W W W
Reset
0 0 0 0
Value
Content softreset
softreset: 0xB6  triggers a reset. Other values are ignored. Following a delay, all
user configuration settings are overwritten with their default state or the
setting stored in the NVM, wherever applicable. This register is functional in
all operation modes. Please note that all application specific settings which
are not equal to the default settings (refer to 6.2 register map), must be
reconfigured to their designated values.

ACC Register 0x15 is reserved

ACC Register 0x16 (INT_EN_0)

Controls which interrupt engines in group 0 are enabled.
Name 0x16 INT_EN_0
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content flat_en orient_en s_tap_en d_tap_en
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved slope_en_z slope_en_y slope_en_x

flat_en: flat interrupt: ‘0’disabled, or ‘1’ enabled

orient_en: orientation interrupt: ‘0’disabled, or ‘1’ enabled

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

s_tap_en: single tap interrupt: ‘0’disabled, or ‘1’ enabled

d_tap_en double tap interrupt: ‘0’disabled, or ‘1’ enabled
reserved: write ‘0’
slope_en_z: slope interrupt, z-axis component: ‘0’disabled, or ‘1’ enabled
slope_en_y: slope interrupt, y-axis component: ‘0’disabled, or ‘1’ enabled
slope_en_x: slope interrupt, x-axis component: ‘0’disabled, or ‘1’ enabled

ACC Register 0x17 (INT_EN_1)

Controls which interrupt engines in group 1 are enabled.
Name 0x17 INT_EN_1
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved int_fwm_en int_ffull_en data_en
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content low_en high_en_z high_en_y high_en_x

reserved: write ‘0’

int_fwm_en: FIFO watermark interrupt: ‘0’disabled, or ‘1’ enabled
int_ffull_en: FIFO full interrupt: ‘0’disabled, or ‘1’ enabled
data_en data ready interrupt: ‘0’disabled, or ‘1’ enabled
low_en: low-g interrupt: ‘0’disabled, or ‘1’ enabled
high_en_z: high-g interrupt, z-axis component: ‘0’disabled, or ‘1’ enabled
high_en_y: high-g interrupt, y-axis component: ‘0’disabled, or ‘1’ enabled
high_en_x: high-g interrupt, x-axis component: ‘0’disabled, or ‘1’ enabled

ACC Register 0x18 (INT_EN_2)

Controls which interrupt engines in group 2 are enabled.
Name 0x18 INT_EN_2
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content slo_no_mot_sel slo_no_mot_en_z slo_no_mot_en_y slo_no_mot_en_x

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

reserved: write ‘0’

slo_no_mot_sel: select ‘0’slow-motion, ‘1’ no-motion interrupt function
slo_no_mot_en_z: slow/n-motion interrupt, z-axis component: ‘0’disabled, or ‘1’ enabled
slo_no_mot_en_y: slow/n-motion interrupt, y-axis component: ‘0’disabled, or ‘1’ enabled
slo_no_mot_en_x: slow/n-motion interrupt, x-axis component: ‘0’disabled, or ‘1’ enabled

ACC Register 0x19 (INT_MAP_0)

Controls which interrupt signals are mapped to the INT1 pin.
Name 0x19 INT_MAP_0
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content int1_flat int1_orient int1_s_tap int1_d_tap
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content int1_slo_no_mot int1_slope int1_high int1_low

int1_flat: map flat interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled

int1_orient: map orientation interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
int1_s_tap: map single tap interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
int1_d_tap: map double tap interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
int1_slo_no_mot: map slow/no-motion interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
int1_slope: map slope interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
int1_high: map high-g to INT1 pin: ‘0’disabled, or ‘1’ enabled
int1_low: map low-g to INT1 pin: ‘0’disabled, or ‘1’ enabled

ACC Register 0x1A (INT_MAP_1)

Controls which interrupt signals are mapped to the INT1 and INT2 pins.

Name 0x1A INT_MAP_1

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content int2_data int2_fwm int2_ffull reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Content reserved int1_ffull int1_fwm int1_data

int2_data: map data ready interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
int2_fwm: map FIFO watermark interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
int2_ffull: map FIFO full interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
reserved: write ‘0’
int1_ffull: map FIFO full interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
int1_fwm: map FIFO watermark interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
int1_data: map data ready interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled

ACC Register 0x1B (INT_MAP_2)

Controls which interrupt signals are mapped to the INT2 pin.
Name 0x1B INT_MAP_2
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content int2_flat int2_orient int2_s_tap int2_d_tap
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content int2_slo_no_mot int2_slope int2_high int2_low

int2_flat: map flat interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled

int2_orient: map orientation interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
int2_s_tap: map single tap interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
int2_d_tap: map double tap interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
int2_slo_no_mot: map slow/no-motion interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
int2_slope: map slope interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
int2_high: map high-g to INT2 pin: ‘0’disabled, or ‘1’ enabled
int2_low: map low-g to INT2 pin: ‘0’disabled, or ‘1’ enabled

ACC Register 0x1C is reserved

ACC Register 0x1D is reserved

ACC Register 0x1E (INT_SRC)

Contains the data source definition for interrupts with selectable data source.
Name 0x1E INT_SRC
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved int_src_data int_src_tap

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
int_src_slo_no_m
Content int_src_slope int_src_high int_src_low
ot

reserved: write ‘0’

int_src_data: select ‘0’filtered, or ‘1’ unfiltered data for new data interrupt
int_src_tap: select ‘0’filtered, or ‘1’ unfiltered data for single-/double tap interrupt
int_src_slo_no_mot: select ‘0’filtered, or ‘1’ unfiltered data for slow/no-motion interrupt
int_src_slope: select ‘0’filtered, or ‘1’ unfiltered data for slope interrupt
int_src_high: select ‘0’filtered, or ‘1’ unfiltered data for high-g interrupt
int_src_low: select ‘0’filtered, or ‘1’ unfiltered data for low-g interrupt

ACC Register 0x1F is reserved

ACC Register 0x20 (INT_OUT_CTRL)

Contains the behavioural configuration (electrical behavior) of the interrupt pins.
Name 0x20 INT_OUT_CTRL
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 1 0 1
Value
Content int2_od int2_lvl int1_od int1_lvl

reserved: write ‘0’

int2_od: select ‘0’push-pull, or ‘1’ open drain behavior for INT2 pin
int2_lvl: select ‘0’active low, or ‘1’active high level for INT2 pin
int1_od: select ‘0’push-pull, or ‘1’ open drain behavior for INT1 pin
int1_lvl: select ‘0’active low, or ‘1’active high level for INT1 pin

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ACC Register 0x21 (INT_RST_LATCH)

Contains the interrupt reset bit and the interrupt mode selection.
Name 0x21 INT_RST_LATCH
Bit 7 6 5 4
Read/Write W R/W R/W R/W
Reset
0 0 0 0
Value
Content reset_int Reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content latch_int<3:0>

reset_int: write ‘1’  clear any latched interrupts, or ‘0’  keep latched interrupts
active
reserved: write ‘0’
latch_int<3:0>: ´0000b´  non-latched, ´0001b´  temporary, 250 ms,
´0010b´  temporary, 500 ms, ´0011b´  temporary, 1 s,
´0100b´  temporary, 2 s, ´0101b´  temporary, 4 s,
´0110b´  temporary, 8 s, ´0111b´  latched,
´1000b´  non-latched, ´1001b´  temporary, 250 s,
´1010b´  temporary, 500 s, ´1011b´  temporary, 1 ms,
´1100b´  temporary, 12.5 ms, ´1101b´  temporary, 25 ms,
´1110b´  temporary, 50 ms, ´1111b´  latched

ACC Register 0x22 (INT_0)

Contains the delay time definition for the low-g interrupt.
Name 0x22 INT_0
Bit 7 6 5 4
Read/Write W R/W R/W R/W
Reset
0 0 0 0
Value
Content low_dur<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
1 0 0 1
Value
Content low_dur<3:0>
low_dur<7:0>: low-g interrupt trigger delay according to [low_dur<7:0> + 1] • 2 ms in a
range from 2 ms to 512 ms; the default corresponds to a delay of 20 ms.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ACC Register 0x23 (INT_1)

Contains the threshold definition for the low-g interrupt.
Name 0x23 INT_1
Bit 7 6 5 4
Read/Write W R/W R/W R/W
Reset
0 0 1 1
Value
Content low_th<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content low_th<3:0>

low_th<7:0>: low-g interrupt trigger threshold according to low_th<7:0> • 7.81 mg in a

range from 0 g to 1.992 g; the default value corresponds to an acceleration
of 375 mg

ACC Register 0x24 (INT_2)

Contains the low-g interrupt mode selection, the low-g interrupt hysteresis setting, and the high-
g interrupt hysteresis setting.
Name 0x24 INT_2
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
1 0 0 0
Value
Content high_hy<1:0> reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 1
Value
Content reserved low_mode low_hy<1:0>

high_hy<1:0>: hysteresis of high-g interrupt according to high_hy<1:0> · 125 mg (2-g

range), high_hy<1:0> · 250 mg (4-g range), high_hy<1:0> · 500 mg (8-g
range), or high_hy<1:0> · 1000 mg (16-g range)
low_mode: select low-g interrupt ‘0’ single-axis mode, or ‘1’ axis-summing mode
low_hy<1:0>: hysteresis of low-g interrupt according to low_hy<1:0> · 125 mg independent
of the selected accelerometer g-range

ACC Register 0x25 (INT_3)

Contains the delay time definition for the high-g interrupt.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Name 0x25 INT_3

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content high_dur<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
1 1 1 1
Value
Content high_dur<3:0>

high_dur<7:0>: high-g interrupt trigger delay according to [high_dur<7:0> + 1] • 2 ms in a

range from 2 ms to 512 ms; the default corresponds to a delay of 32 ms.

ACC Register 0x26 (INT_4)

Contains the threshold definition for the high-g interrupt.
Name 0x26 INT_4
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
1 1 0 0
Value
Content high_th<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content high_th<3:0>
high_th<7:0>: threshold of high-g interrupt according to high_th<7:0> · 7.81 mg (2-g range),
high_th<7:0> · 15.63 mg (4-g range), high_th<7:0> · 31.25 mg (8-g range),
or high_th<7:0> · 62.5 mg (16-g range)

ACC Register 0x27 (INT_5)

Contains the definition of the number of samples to be evaluated for the slope interrupt (any-
motion detection) and the slow/no-motion interrupt trigger delay.
Name 0x27 INT_5
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content slo_no_mot_dur<5:2>

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content slo_no_mot_dur<1:0> slope_dur<1:0>

slo_no_mot_dur<5:0>: Function depends on whether the slow-motion or no-motion

interrupt function has been selected. If the slow-motion interrupt function has
been enabled (slo_no_mot_sel = ‘0’) then [slo_no_mot_dur<1:0>+1]
consecutive slope data points must be above the slow/no-motion threshold
(slo_no_mot_th) for the slow-/no-motion interrupt to trigger. If the no-motion
interrupt function has been enabled (slo_no_mot_sel = ‘1’) then
slo_no_motion_dur<5:0> defines the time for which no slope data points
must exceed the slow/no-motion threshold (slo_no_mot_th) for the slow/no-
motion interrupt to trigger. The delay time in seconds may be calculated
according with the following equation:

slo_no_mot_dur<5:4>=’b00’  [slo_no_mot_dur<3:0> + 1]
slo_no_mot_dur<5:4>=’b01’  [slo_no_mot_dur<3:0> · 4 + 20]
slo_no_mot_dur<5>=’1’  [slo_no_mot_dur<4:0> · 8 + 88]
slope_dur<1:0>: slope interrupt triggers if [slope_dur<1:0>+1] consecutive slope data points
are above the slope interrupt threshold slope_th<7:0>

ACC Register 0x28 (INT_6)

Contains the threshold definition for the any-motion interrupt.
Name 0x28 INT_6
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 1
Value
Content slope_th<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 1 0 0
Value
Content slope_th<3:0>

slope_th<7:0>: Threshold of the any-motion interrupt. It is range-dependent and defined as a

sample-to-sample difference according to
slope_th<7:0> · 3.91 mg (2-g range) /
slope_th<7:0> · 7.81 mg (4-g range) /
slope_th<7:0> · 15.63 mg (8-g range) /
slope_th<7:0> · 31.25 mg (16-g range)

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ACC Register 0x29 (INT_7)

Contains the threshold definition for the slow/no-motion interrupt.
Name 0x29 INT_7
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 1
Value
Content slo_no_mot_th<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 1 0 0
Value
Content slo_no_mot_th<3:0>

slo_no_mot_th<7:0>: Threshold of slow/no-motion interrupt. It is range-dependent and defined

as a sample-to-sample difference according to
slo_no_mot_th<7:0> · 3.91 mg (2-g range),
slo_no_mot_th<7:0> · 7.81 mg (4-g range),
slo_no_mot_th<7:0> · 15.63 mg (8-g range),
slo_no_mot_th<7:0> · 31.25 mg (16-g range)

ACC Register 0x2A (INT_8)

Contains the timing definitions for the single tap and double tap interrupts.
Name 0x2A INT_8
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content tap_quiet tap_shock reserved reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 1 0 0
Value
Content reserved tap_dur<2:0>

tap_quiet: selects a tap quiet duration of ‘0’ 30 ms, ‘1’ 20 ms

tap_shock: selects a tap shock duration of ‘0’ 50 ms, ‘1’75 ms
reserved: write ‘0’
tap_dur<2:0>: selects the length of the time window for the second shock event for double
tap detection according to ´000b´  50 ms, ´001b´  100 ms, ´010b´  150
ms, ´011b´  200 ms, ´100b´  250 ms, ´101b´  375 ms, ´110b´  500
ms, ´111b´  700 ms.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ACC Register 0x2B (INT_9)

Contains the definition of the number of samples processed by the single / double-tap interrupt
engine after wake-up in low-power mode. It also defines the threshold definition for the single
and double tap interrupts.
Name 0x2B INT_9
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content tap_samp<1:0> reserved tap_th<4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
1 0 1 0
Value
Content tap_th<3:0>

tap_samp<1:0>: selects the number of samples that are processed after wake-up in the low-
power mode according to ´00b´  2 samples, ´01b´  4 samples, ´10b´  8
samples, and ´11b´  16 samples
reserved: write ‘0’
tap_th<4:0>: threshold of the single/double-tap interrupt corresponding to an acceleration
difference of tap_th<3:0> · 62.5mg (2g-range), tap_th<3:0> · 125mg (4g-
range), tap_th<3:0> · 250mg (8g-range), and tap_th<3:0> · 500mg (16g-
range).

ACC Register 0x2C (INT_A)

Contains the definition of hysteresis, blocking, and mode for the orientation interrupt
Name 0x2C INT_A
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 1
Value
Content reserved orient_hyst<2:0>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
1 0 0 0
Value
Content orient_blocking<1:0> orient_mode<1:0>

reserved: write ‘0’

orient_hyst<2:0>: sets the hysteresis of the orientation interrupt; 1 LSB corresponds to 62.5 mg
irrespective of the selected g-range
orient_blocking<1:0>: selects the blocking mode that is used for the generation of the
orientation interrupt. The following blocking modes are available:

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

´00b´  no blocking,
´01b´  theta blocking or acceleration in any axis > 1.5g,
´10b´  ,theta blocking or acceleration slope in any axis > 0.2 g or
acceleration in any axis > 1.5g
´11b´  theta blocking or acceleration slope in any axis > 0.4 g or
acceleration in any axis > 1.5g and value of orient is not stable for
at least 100ms
orient_mode<1:0>: sets the thresholds for switching between the different orientations. The
settings: ´00b´  symmetrical, ´01b´  high-asymmetrical, ´10b´  low-
asymmetrical, ´11b´ symmetrical.

ACC Register 0x2D (INT_B)

Contains the definition of the axis orientation, up/down masking, and the theta blocking angle
for the orientation interrupt.
Name 0x2D INT_B
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
n/a 1 0 0
Value
Content reserved orient_ud_en orient_theta<5:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
1 0 0 0
Value
Content orient_theta<3:0>

orient_ud_en: change of up/down-bit ´1´  generates an orientation interrupt, ´0´  is

ignored and will not generate an orientation interrupt
orient_theta<5:0>: defines a blocking angle between 0° and 44.8°

ACC Register 0x2E (INT_C)

Contains the definition of the flat threshold angle for the flat interrupt.
Name 0x2E INT_C
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
n/a n/a 0 0
Value
Content reserved flat_theta<5:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
1 0 0 0
Value
Content flat_theta<3:0>
reserved: write ‘0’
flat_theta<5:0>: defines threshold for detection of flat position in range from 0° to 44.8°.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ACC Register 0x2F (INT_D)

Contains the definition of the flat interrupt hold time and flat interrupt hysteresis.
Name 0x2F INT_D
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 1
Value
Content reserved flat_hold_time<1:0>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 1
Value
Content reserved flat_hy<2:0>

reserved: write ‘0’

flat_hold_time<1:0>: delay time for which the flat value must remain stable for the flat interrupt
to be generated: ´00b´  0 ms, ´01b´  512 ms, ´10b´  1024 ms,
´11b´  2048 ms
flat_hy<2:0>: defines flat interrupt hysteresis; flat value must change by more than twice
the value of flat interrupt hysteresis to detect a state change. For details see
chapter 5.6.8.
‘000b’  hysteresis of the flat detection disabled

ACC Register 0x30 (FIFO_CONFIG_0)

Contains the FIFO watermark level.
Name 0x30 FIFO_CONFIG_0
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
n/a n/a 0 0
Value
fifo_water_mark_level_trigger_retain<
Content reserved
5:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content fifo_water_mark_level_trigger_retain<3:0>

reserved: write ‘0’

fifo_water_mark_level_trigger_retain<5:0>: fifo_water_mark_level_trigger_retain<5:0> defines
the FIFO watermark level. An interrupt will be generated, when the number
of entries in the FIFO is equal to fifo_water_mark_level_trigger_retain<5:0>;

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ACC Register 0x31 is reserved

ACC Register 0x32 (PMU_SELF_TEST)

Contains the settings for the sensor self-test configuration and trigger.
Name 0x32 PMU_SELF_TEST
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved self_test_amp
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved_0 self_test_sign self_test-axis<1:0>

reserved: write ‘0x0’

reserved_0: write ‘0x0’
self_test_amp; select amplitude of the selftest deflection ´1´  high,
default value is low (´0´),
self_test_sign: select sign of self-test excitation as ´1´  positive, or ´0´  negative
self_test_axis: select axis to be self-tested: ´00b´  self-test disabled, ´01b´  x-axis, ´10b´
 y-axis, or ´11b´  z-axis; when a self-test is performed, only the
acceleration data readout value of the selected axis is valid; after the self-
test has been enabled a delay of a least 50 ms is necessary for the read-out
value to settle

ACC Register 0x33 (TRIM_NVM_CTRL)

Contains the control settings for the few-time programmable non-volatile memory (NVM).
Name 0x33 TRIM_NVM_CTRL
Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content nvm_remain<3:0>

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Bit 3 2 1 0
Read/Write R/W R W R/W
Reset
0 n/a 0 0
Value
Content nvm_load nvm_rdy nvm_prog_trig nvm_prog_mode

nvm_remain<3:0>: number of remaining write cycles permitted for NVM; the number is
decremented each time a write to the NVM is triggered
nvm_load: ´1´  trigger, or ‘0’  do not trigger an update of all configuration registers
from NVM; the nvm_rdy flag must be ‘1’ prior to triggering the update
nvm_rdy: status of NVM controller: ´0´  NVM write / NVM update operation is in
progress, ´1´  NVM is ready to accept a new write or update trigger
nvm_prog_trig: ‘1’  trigger, or ‘0’ do not trigger an NVM write operation; the trigger is
only accepted if the NVM was unlocked before and nvm_remain<3:0> is
greater than ‘0’; flag nvm_rdy must be ‘1’ prior to triggering the write cycle
nvm_prog_mode: ‘1’  unlock, or ‘0’  lock NVM write operation

ACC Register 0x34 (BGW_SPI3_WDT)

Contains settings for the digital interfaces.
Name 0x34 BGW_SPI3_WDT
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved i2c_wdt_en i2c_wdt_sel spi3

reserved: write ‘0’

i2c_wdt_en: if I²C interface mode is selected then ‘1´  enable, or ‘0’  disables the
watchdog at the SDI pin (= SDA for I²C)
i2c_wdt_sel: select an I²C watchdog timer period of ‘0’  1 ms, or ‘1’  50 ms
spi3: select ´0´  4-wire SPI, or ´1´  3-wire SPI mode

ACC Register 0x35 is reserved

ACC Register 0x36 (OFC_CTRL)

Contains control signals and configuration settings for the fast and the slow offset
compensation.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Name 0x36 OFC_CTRL

Bit 7 6 5 4
Read/Write W W W R
Reset
0 0 0 0
Value
Content offset_reset cal_trigger<1:0> cal_rdy
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved hp_z_en hp_y_en hp_x_en

offset_reset: ´1´  set all offset compensation registers (0x38 to 0x3A) to zero, or ‘0’ 
keep their values
offset_trigger<1:0>: trigger fast compensation for ´01b´  x-axis, ´10b´  y-axis, or ´11b´ 
z-axis; ´00b´  do not trigger offset compensation; offset compensation
must not be triggered when cal_rdy is ‘0’
cal_rdy: indicates the state of the fast compensation: ´0´  offset compensation is in
progress, or ´1´  offset compensation is ready to be retriggered
reserved: write ‘0’
hp_z_en: ‘1´  enable, or ‘0’  disable slow offset compensation for the z-axis
hp_y_en: ‘1´  enable, or ‘0’  disable slow offset compensation for the y-axis
hp_x_en: ‘1´  enable, or ‘0’  disable slow offset compensation for the x-axis

ACC Register 0x37 (OFC_SETTING)

Contains configuration settings for the fast and the slow offset compensation.
Name 0x37 OFC_SETTING
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
offset_target_y<1
Content reserved offset_target_z<1:0>
>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
offset_target_y<0
Content offset_target_x<1:0> cut_off
>

reserved: write ‘0’

offset_target_z<1:0>: offset compensation target value for z-axis is ´00b´  0 g, ´01b´  +1 g,
´10b´  -1 g, or ´11b´  0 g

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

offset_target_y<1:0>: offset compensation target value for y-axis is ´00b´  0 g, ´01b´  +1 g,

´10b´  -1 g, or ´11b´  0 g
offset_target_x<1:0>: offset compensation target value for x-axis is ´00b´  0 g, ´01b´  +1 g,
´10b´  -1 g, or ´11b´  0 g
cut_off: select ‘0’ 1 Hz, or ‘1’  10 Hz cut-off frequency for slow offset
compensation high-pass filter

ACC Register 0x38 (OFC_OFFSET_X)

Contains the offset compensation value for x-axis acceleration readout data.
Name 0x38 OFC_OFFSET_X
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_x<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_x<3:0>

offset_ x<7:0>: offset value, which is added to the internal filtered and unfiltered x-axis
acceleration data; the offset value is represented with two’s complement
notation, with a mapping of +127  +0.992g, 0  0 g, and -128  -1 g; the
scaling is independent of the selected g-range; the content of the
offset_x<7:0> may be written to the NVM; it is automatically restored from
the NVM after each power-on or softreset; offset_x<7:0> may be written
directly by the user; it is generated automatically after triggering the fast
offset compensation procedure for the x-axis

Example:

Original readout Value in offset Compensated readout value

value register
0g 127 0.992 g
0g 0 0g
0g -128 -1 g

ACC Register 0x39 (OFC_OFFSET_Y)

Contains the offset compensation value for y-axis acceleration readout data.
Name 0x39 OFC_OFFSET_Y
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Content offset_y<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_y<3:0>

offset_y<7:0>: offset value, which is added to the internal filtered and unfiltered y-axis
acceleration data; the offset value is represented with two’s complement
notation, with a mapping of +127  +0.992g, 0  0 g, and -128  -1 g; the
scaling is independent of the selected g-range; the content of the
offset_y<7:0> may be written to the NVM; it is automatically restored from
the NVM after each power-on or softreset; offset_y<7:0> may be written
directly by the user; it is generated automatically after triggering the fast
offset compensation procedure for the y-axis
For reference see example at ACC Register 0x38 (OFC_OFFSET_X)

ACC Register 0x3A (OFC_OFFSET_Z)

Contains the offset compensation value for z-axis acceleration readout data.
Name 0x3A OFC_OFFSET_Z
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_z<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_z<3:0>

offset_z<7:0>: offset value, which is added to the internal filtered and unfiltered z-axis
acceleration data; the offset value is represented with two’s complement
notation, with a mapping of +127  +0.992g, 0  0 g, and -128  -1 g; the
scaling is independent of the selected g-range; the content of the
offset_z<7:0> may be written to the NVM; it is automatically restored from
the NVM after each power-on or softreset; offset_z<7:0> may be written
directly by the user; it is generated automatically after triggering the fast
offset compensation procedure for the z-axis
For reference see example at ACC Register 0x38 (OFC_OFFSET_X)

ACC Register 0x3B (TRIM_GP0)

Contains general purpose data register with NVM back-up.
Name 0x3B TRIM_GP0
Bit 7 6 5 4

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Read/Write R/W R/W R/W R/W

Reset
0 0 0 0
Value
Content GP0<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content GP0<3:0>

GP0<7:0>: general purpose NVM image register not linked to any sensor-specific
functionality; register may be written to NVM and is restored after each
power-up or softreset

ACC Register 0x3C (TRIM_GP1)

Contains general purpose data register with NVM back-up.
Name 0x3C TRIM_GP1
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content GP1<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content GP1<3:0>

GP1<7:0>: general purpose NVM image register not linked to any sensor-specific
functionality; register may be written to NVM and is restored after each
power-up or softreset

ACC Register 0x3D is reserved

ACC Register 0x3E (FIFO_CONFIG_1)

Contains FIFO configuration settings. The FIFO buffer memory is cleared and the fifo-full flag is
cleared when writing to FIFO_CONFIG_1 register.
Name 0x3E FIFO_CONFIG_1
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content fifo_mode<1:0> Reserved

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content Reserved fifo_data_select<1:0>

fifo_mode<1:0>: selects the FIFO operating mode:

´00b´  BYPASS (buffer depth of 1 frame; old data is discarded),
´01b´  FIFO (data collection stops when buffer is filled with 32 frames),
´10b´  STREAM (sampling continues when buffer is full; old is discarded),
´11b´  reserved, do not use
fifo_data_select<1:0>: selects whether ´00b´  X+Y+Z, ´01b´  X only, ´10b´  Y only,
´11b´  Z only acceleration data are stored in the FIFO

ACC Register 0x3F (FIFO_DATA)

FIFO data readout register. The format of the LSB and MSB components corresponds to that of
the acceleration data readout registers. The new data flag is preserved. Read burst access may
be used since the address counter will not increment when the read burst is started at the
address of FIFO_DATA. The entire frame is discarded when a fame is only partially read out.
Name 0x3F FIFO_DATA
Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content fifo_data_output_register<7:4>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content fifo_data_output_register<3:0>

fifo_data_output_register<7:0>: FIFO data readout; data format depends on the setting of

if X+Y+Z data are selected, the data of frame n is reading out in the order of
X-lsb(n), X-msb(n), Y-lsb(n), Y-msb(n), Z-lsb(n), Z-msb(n);
if X-only is selected, the data of frame n and n+1 are reading out in the order
of X-lsb(n), X-msb(n), X-lsb(n+1), X-msb(n+1); the Y-only and Z-only modes
behave analogously

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

7 Functional description Gyroscope

Note: Default values for registers can be found in chapter 8.
7.1 Power modes gyroscope
The gyroscope has four different power modes. Besides normal mode, which represents the
fully operational state of the device, there are three energy saving modes: deep-suspend mode,
suspend mode, and fast power up

Figure 13: Block diagram of the power modes of gyroscope

After power-up gyro is in normal mode so that all parts of the device are held powered-up and
data acquisition is performed continuously.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

In deep-suspend mode the device reaches the lowest possible power consumption. Only the
interface section is kept alive. No data acquisition is performed and the content of the
configuration registers is lost. Deep suspend mode is entered (left) by writing ‘1’ (‘0’) to the
2
(GYR 0x11) deep_suspend bit. The I C watchdog timer remains functional. The (GYR 0x11)
deep_ suspend bit, the (GYR 0x34) spi3 bit, (GYR 0x34) i2c_wdt_en bit and the (GYR 0x34)
i2c_wdt_sel bit are functional in deep-suspend mode. Equally the interrupt level and driver
configuration registers (GYR 0x20) int1_lvl, (GYR 0x20) int1_od, (GYR 0x20) int2_lvl, and (GYR
0x20) int2_od are accessible. Still it is possible to enter normal mode by writing to the (GYR
0x14) softreset register. Please note, that all application specific settings which are not equal to
the default settings (refer to 8.2 register map gyroscope), must be re-set to its designated
values after leaving deep-suspend mode.

In suspend mode the whole analog part is powered down. No data acquisition is performed.
While in suspend mode the latest rate data and the content of all configuration registers are
kept. The only supported operations are reading and writing registers as well as writing to the
(GYR 0x14) softreset register.

Suspend mode is entered (left) by writing ´1´ (´0´) to the (GYR 0x11) suspend bit. Bit (GYR
0x12) fast_power_up must be set to ‘0’.

Although write access to registers is supported at the full interface clock speed (SCL or SCK), a
waiting period must be inserted between two consecutive write cycles (please refer also to
section 9.2.1).

In external wake-up mode, when the device is in deep suspend mode or suspend mode, it
can be woken-up by external trigger to pin INT3/4. Register settings:

Table 23: Trigger source

ext_trig_sel [1:0] Trigger source

‘00’ No
‘01’ INT3 pin
‘10’ INT4 pin
‘11’ SDO2 pin (SPI3 mode)

In fast power-up mode the sensing analog part is powered down, while the drive and the
digital part remains largely operational. No data acquisition is performed. Reading and writing
registers as well as writing to the (GYR 0x14) softreset register are supported without any
restrictions. The latest rate data and the content of all configuration registers are kept. Fast
power-up mode is entered (left) by writing ´1´ (´0´) to the (GYR 0x11) suspend bit with bit (GYR
0x12) fast_power_up set to ‘1’.
7.1.1 Advanced power-saving modes
In addition to the power modes described in Figure 13, there are other advanced power modes
that can be used to optimize the power consumption of the BMX055.
The power_save_mode is set by setting power_save_mode=´1´ (GYR 0x12). This power mode
implements a duty cycle and change between normal mode and fast-power-up mode. By
setting the sleep_dur (time in ms in fast-power-up mode) (GYR 0x11 bits <1:3>) and
auto_sleep_dur (time in ms in normal mode) (GYR 0x12 bits <0:2>) different timings can be
used. Some of these settings allow the sensor to consume less than 3mA. See also diagram
below:

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

autosleep autosleep autosleep autosleep autosleep

i[mA] powerup dur dur dur dur dur

NORMAL

Fast Power
Up
sleep sleep sleep sleep sleep
dur dur dur dur dur

OFF t

Figure 14: Duty-cycling

The possible configuration for the autosleep_dur and sleep_dur are indicated in the table below:

Table 24: Sleep durations gyroscope

sleep_dur<2:0> Time (ms)

‘000’ 2 ms
‘001’ 4 ms
‘010’ 5 ms
‘011’ 8 ms
‘100’ 10 ms
‘101’ 15 ms
‘110’ 18 ms
‘111’ 20 ms

Table 25: Autosleep durations gyroscope

autosleep_dur<2:0> Time (ms)

‘000’ Not allowed
‘001’ 4 ms
‘010’ 5 ms
‘011’ 8 ms
‘100’ 10 ms
‘101’ 15 ms
‘110’ 20 ms
‘111’ 40 ms

The only restriction for the use of the power save mode comes from the configuration of the
digital filter bandwidth (GYR 0x10). For each Bandwidth configuration, a minimum
autosleep_dur must be ensured. For example, for Bandwidth=47Hz, the minimum
autosleep_dur is 5ms. This is specified in the table below. For sleep_dur there is no restriction.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Table 26: Minimum autosleep duration according to bandwidth

bw<3:0> Bandwidth (Hz) min. autosleep_dur (ms)

‘0111’ 32 Hz 20 ms
‘0110’ 64 Hz 10 ms
‘0101’ 12 Hz 20 ms
‘0100’ 23 Hz 10 ms
‘0011’ 47 Hz 5 ms
‘0010’ 116 Hz 4 ms
‘0001’ 230 Hz 4 ms
‘0000’ Unfiltered (523Hz) 4 ms

7.2 BMX055 Data Gyroscope

7.2.1 Rate data

The angular rate data can be read-out through addresses GYR 0x02 through GYR 0x07. The
angular rate data is in 2’s complement form according to Table 27 below. In order to not corrupt
the angular rate data, the LSB should always be read out first. Once the LSB of the x,y, or z
read-out registers have been read, the MSBs are locked until the MSBs are read out.
This default behavior can be switched off by setting the address (GYR 0x13) bit 6 (shadow_dis)
= ‘1’. In this case there is no MSB locking, and the data is updated between each read.
2
The burst-access mechanism provides an efficient way to read out the angular rate data in I C
or SPI mode. During a burst-access, the gyro automatically increments the starting read
address after each byte. Any address in the user space can be used as a starting address.
When the address (GYR 0x3F – fifo_data) is reached, the address counter is stopped. In the
user space address range, the (GYR 0x3F – fifo_data) will be continuously read out until burst
read ends. It is also possible to start directly with address 0x3F. In this case, the fifo_data
(GYR 0x3F) data will be read out continuously. The burst-access allows data to be transferred
over the I2C bus with an up to 50% reduced data density. The angular rate data in all read-out
registers is locked as long as the burst read access is active. Reading the chip angular rate
registers in burst read access mode ensures that the angular rate values in all readout registers
belong to the same sample.

Table 27: Gyroscope register content for 16bit mode

Decimal value Angular rate (in 2000°/s range mode)

+32767 + 2000°/s
… …
0 0°/s
… …
-32767 - 2000°/s

Per default, the bandwidth of the data being read-out is limited by the internal low-pass filters
according to the filter configuration. Unfiltered (high-bandwidth) data can be read out through
the serial interface when the data_high_bw (GYR 0x13 bit 7) is set to ‘1’.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

7.3 Angular rate Read-Out

Bandwidth configuration: The gyro processes the 2kHz data out of the analog front end with a
CIC/Decimation filter, followed by an IIR filter before sending this data to the interrupt handler.
The possible decimation factors are 2, 5, 10 and 20. It is also possible to bypass these filters,
and use the unfiltered 2kHz data. The decimation factor / bandwidth of the filter can be set by
setting the address space GYR 0x10 bits<3:0> (bw<3:0>) as shown in the memory map
section.

7.4 Self-test Gyro

A built-in self test (BIST) facility has been implemented which provides a quick way to
determine if the gyroscope is operational within the specified conditions.

The BIST uses three parameters for evaluation of proper device operation:
- Drive voltage regulator
- Sense frontend offset regulator of x-,y- and z-channel
- Quad regulator for x-,y- and z-channel

If any of the three parameters is not within the limits the BIST result will be “Fail”.

To trigger the BIST ´bit0´ bite_trig in address GYR 0x3C must be set `1´. When the test is
performed, bit1 bist_rdy will be ´1´. If the result is failed the bit bist_failed will be set to ´1´,
otherwise stay a ´0´.

bite_trig
0x3C = `1`

bist_rdy = ´1´

bist_failed = ´1´ bist_failed = ´0´

 Result: Failure  Result: OK

Figure 15: Flow Diagram

Another possibility to get information about the sensor status is to read out rate_ok GYR 0x3C
bit4. ´1´ indicates proper sensor function, no trigger is needed for this.
7.5 Offset compensation gyroscope
Offsets in measured signals can have several causes but they are always unwanted and
disturbing in many cases. Therefore, the gyro offers an advanced set of four digital offset
compensation methods which are closely matched to each other. These are slow, fast, and
manual compensation as well as inline calibration.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The public offset compensation registers (GYR 0x36) to (GYR 0x39) are image of the
corresponding registers in the NVM. With each image update (see section 7.6 Non-volatile
memory gyroscope for details) the contents of the NVM registers are written to the public
registers. The public register can be over-written by the user at any time.

In case an internally computed compensation value is too small or too large to fit into the
corresponding register, it is saturated in order to prevent an overflow error.

For every axes an offset up to 125°/s with 12 bits full resolution can be calibrated (resolution
0.06°/s).

The modes will be controlled using SPI/I2C commands.

By writing ´1´ to the (GYR 0x21) offset_reset bit, all dynamic (fast & slow) offset compensation
registers are reset to zero.
7.5.1 Slow compensation
In slow regulation mode, the rate data is monitored permanently. If the rate data is above 0°/s
for a certain period of time, an adjustable rate is subtracted by the offset controller. This
procedure of monitoring the rate data and subtracting of the adjustable rate at a time is
repeated continuously. Thus, the output of the offset converges to 0°/s.
The slow regulation can be enabled through the slow_offset_en_x/y/z (GYR 0x31 <0:2>) bits for
each axis. The slow offset cancellation will work for filtered and unfiltered data
(slow_offset_unfilt (GYR 0x1A <5>); slow_offset_unfilt=1  unfiltered data are selected)

Slow Offset cancellation settings are the adjustable rate (slow offset_th 0x31 <7:6>) and the
time period (slow_offset_dur 0x31 <5:3>)
7.5.2 Fast compensation
A fast offset cancellation controller is implemented in gyro. The fast offset cancellation process
is triggerable via SPI/I2C.
The fast offset cancellation can be enabled through the fast_offset_en_x/y/z (GYR 0x32 <0:2>)
bits for each axis. The enable bits will not start the fast offset cancellation! The fast offset
cancellation has to be started by setting the fast_offset_en (GYR 0x32 <3>) bit. Afterwards the
algorithm will start and if the algorithm is finished the fast_offset_en (GYR 0x32 <3>) will be
reset to 0.
The fast offset cancellation will work for filtered and unfiltered data (fast_offset_unfilt (GYR 0x1B
<7>); fast_offset_unfilt=1  unfiltered data are selected)
The fast offset cancellation parameters are fast_offset_wordlength (GYR 0x32 <5:4>)

The sample rate for the fast offset cancellation corresponds to the sample rate of the selected
bandwidth. For unfiltered data and bandwidth settings 0-2 the sample rate for the fast offset
cancellation will be 400Hz.

The resolution of the calculated offset values for the fast offset compensation depends on the,
range setting being less accurate for higher range (e.g. range=2000°/s).Therefore we
recommend a range setting of range=125°/s for fast offset compensation.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

7.5.3 Manual compensation

The contents of the public compensation registers (GYR 0x36 … 0x39) offset_x/y/z can be set
manually via the digital interface. It is recommended to write into these registers directly after a
new data interrupt has occurred in order not to disturb running offset computations.

Writing to the offset compensation registers is not allowed while the fast compensation
procedure is running.
7.5.4 Inline calibration
For certain applications, it is often desirable to calibrate the offset once and to store the
compensation values permanently. This can be achieved by using one of the aforementioned
offset compensation methods to determine the proper compensation values and then storing
these values permanently in the NVM. See section 7.6 Non-volatile memory gyroscope for
details of the storing procedure.

Each time the device is reset, the compensation values are loaded from the non-volatile
memory into the image registers and used for offset compensation until they are possibly
overwritten using one of the other compensation methods.
7.6 Non-volatile memory gyroscope
The entire memory of the gyro consists of three different kinds of registers: hard-wired, volatile,
and non-volatile. Part of it can be both read and written by the user. Access to non-volatile
memory is only possible through (volatile) image registers.

Altogether, there are eight registers (octets) with NVM backup which are accessible by the user.
The addresses of the image registers range from (GYR 0x36) to (GYR 0x3B). While the
addresses up to (GYR 0x39) are used for offset compensation (see 7.5 Offset compensation
gyroscope), addresses (GYR 0x3A) and (GYR 0x3B) are general purpose registers not linked to
any sensor-specific functionality.

The content of the NVM is loaded to the image registers after a reset (either POR or softreset)
or after a user request which is performed by writing ´1´ to the write-only bit (GYR 0x33)
nvm_load. As long as the image update is in progress, bit (GYR 0x33) nvm_rdy is ´0´,
otherwise it is ´1´. In order to read out the correct values (after NVM loading) waiting time is
min. 1ms.

The image registers can be read and written like any other register.

Writing to the NVM is a three-step procedure:

4. Write the new contents to the image registers.
5. Write ´1´ to bit (GYR 0x33) nvm_prog_mode in order to unlock the NVM.
6. Write ´1´ to bit (GYR 0x33) nvm_prog_trig and keep ´1´ in bit (GYR 0x33)
nvm_prog_mode in order to trigger the write process.

Writing to the NVM always renews the entire NVM contents. It is possible to check the write
status by reading bit (GYR 0x33) nvm_rdy. While (GYR 0x33) nvm_rdy = ´0´, the write process
is still in progress; if (GYR 0x33) nvm_rdy = ´1´, then writing is completed. As long as the write
process is ongoing, no change of power mode and image registers is allowed. Also, the NVM
write cycle must not be initiated while image registers are updated, in suspend mode.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Please note that the number of permitted NVM write-cycles is limited as specified in Table 3.
The number of remaining write-cycles can be obtained by reading bits (GYR 0x33)
nvm_remain.
7.7 Interrupt controller Gyroscope
The gyro is equipped with 3 programmable interrupt engines. Each interrupt can be
independently enabled and configured. If the trigger condition of an enabled interrupt is fulfilled,
the corresponding status bit is set to ´1´ and the selected interrupt pin is activated. The gyro
provides two interrupt pins, INT3 and INT4; interrupts can be freely mapped to any of these
pins. The state of a specific interrupt pin is derived from a logic ´or´ combination of all interrupts
mapped to it.

The interrupt status registers are updated when a new data word is written into the rate data
registers. If an interrupt is disabled, all active status bits associated with it are immediately
reset.
Gyro Interrupts are fully functional in normal mode, only. Interrupts are limited in their
functionality in other operation modes. Please contact our technical support for further
assistance.

7.7.1 General features

Table 28: Interrupt mode selection

(GYR 0x21) latch_int Interrupt mode

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

activation condition is no more valid. Exception to this behavior is the new data interrupt which
is automatically reset after a fixed time.

In latched mode an asserted interrupt status and the selected pin are cleared by writing ´1´ to
bit (GYR 0x21) reset_int. If the activation condition still holds when it is cleared, the interrupt
status is asserted again with the next change of the rate registers.
In the temporary mode an asserted interrupt and selected pin are cleared after a defined period
of time. The behavior of the different interrupt modes is shown graphically in Figure 16. The
timings in this mode are subject to the same tolerances as the bandwidths (see Table 3).

internal signal from

interrupt engine

interrupt output
non-latched

latch period

temporary

latched

Figure 16: Interrupt modes

7.7.2 Mapping to physical interrupt pins (inttype to INT Pin#)

Registers (GYR 0x17) to (GYR 0x19) are dedicated to mapping of interrupts to the interrupt pins
“INT3” or “INT4”. Setting (GYR 0x17) int1_”inttype” to ´1´ (´0´) maps (unmaps) “inttype” to pin
“INT3”. Correspondingly setting (GYR 0x19) int2_”inttype” to ´1´ (´0´) maps (unmaps) “inttype”
to pin “INT4”.

Note: “inttype” has to be replaced with the precise notation, given in the memory map in chapter
8.
7.7.3 Electrical behaviour (INT pin# to open-drive or push-pull)
Both interrupt pins can be configured to show the desired electrical behavior. The ´active´ level
of each interrupt pin is determined by the (GYR 0x16) int1_lvl and (GYR 0x16) int2_lvl bits.

If (GYR 0x16) int1_lvl = ´1´ (´0´) / (GYR 0x16) int2_lvl = ´1´ (´0´), then pin “INT3” / pin “INT4” is
active ´1´ (´0´). The characteristic of the output driver of the interrupt pins may be configured
with bits (GYR 0x16) int1_od and (GYR 0x16) int2_od. By setting bits (GYR 0x16) int1_od /
(GYR 0x16) int2_od to ´1´, the output driver shows open-drive characteristic, by setting the
configuration bits to ´0´, the output driver shows push-pull characteristic. When open-drive
characteristic is selected in the design, external pull-up or pull-down resistor should be applied
according the int_lvl configuration. When open-drive characteristic is selected in the design,
external pull-up or pull-down resistor should be applied according the int_lvl configuration.
7.7.4 New data interrupt
This interrupt serves for synchronous reading of angular rate data. It is generated after storing a
new value of z-axis angular rate data in the data register. The interrupt is cleared automatically
after 280-400 µs (depending on Interrupt settings).

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The interrupt mode of the new data interrupt is fixed to non-latched.

It is enabled (disabled) by writing ´1´ (´0´) to bit (GYR 0x15) data_en. The interrupt status is
stored in bit (GYR 0x0A) data_int.
7.7.5 Any-motion detection / Interrupt
Any-motion (slope) detection uses the slope between successive angular rate signals to detect
changes in motion. An interrupt is generated when the slope (absolute value of angular rate
difference) exceeds a preset threshold. It is cleared as soon as the slope falls below the
threshold. The principle is made clear in Figure 17.

angular rate

rate(t0)

rate(t0−1/(4*fs))

time

slope(t0)=gyro(t0)−gyro(t0−1/(2*bw))
slope

slope_th

time

slope_dur slope_dur

INT

time

Figure 17: Principle of gyroscope any-motion detection

The threshold is defined through register (GYR 0x1B) any_th. In terms of scaling 1 LSB of
(GYR 0x1B) any_th corresponds to 1 °/s in 2000°/s-range (0.5°/s in 1000°/s-range, 0.25°/s in
500°/s -range …). Therefore the maximum value is 125°/s in 2000°/s-range (62.5°/s 1000°/s-
range, 31.25°/s in 500°/s -range …).

The time difference between the successive angular rate signals depends on the selected
update rate(fs) which is coupled to the bandwidth and equates to 1/(4*fs) (t=1/(4*fs)). For
bandwidhth settings with an update rate higher than 400Hz (bandwidth =0, 1, 2) fs is set to
400Hz.

In order to suppress false triggers, the interrupt is only generated (cleared) if a certain number
N of consecutive slope data points is larger (smaller) than the slope threshold given by (GYR

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

0x1B) any_th. This number is set by the (GYR 0x1C) any_dursample bits. It is N = [(GYR 0x1C)
any_dursample+ 1]*4 for (GYR 0x1C). N is set in samples. Thus the time is scaling with the
update rate (fs). Example: (GYR 0x1C) slope_dur = 00b, …, 11b = 4 samples, …, 16 samples.
[Link] Enabling (disabling) for each axis
Any-motion detection can be enabled (disabled) for each axis separately by writing ´1´ (´0´) to
bits (GYR 0x1C) any_en_x, (GYR 0x1C) any_en_y, (GYR 0x1C) any_en_z. The criteria for
any-motion detection are fulfilled and the Any-Motion interrupt is generated if the slope of any of
the enabled axes exceeds the threshold (GYR 0x1B) any_th for [(GYR 0x1C) slope_dur +1]*4
consecutive times. As soon as the slopes of all enabled axes fall or stay below this threshold for
[(GYR 0x1C) slope_dur +1]*4 consecutive times the interrupt is cleared unless interrupt signal is
latched.
[Link] Axis and sign information of slope / any motion interrupt
The interrupt status is stored in bit (GYR 0x09) any_int. The Any-motion interrupt supplies
additional information about the detected slope. The axis which triggered the interrupt is given
by that one of bits (GYR 0x0B) any_first_x, (GYR 0x0B) any_first_y, (GYR 0x0B) any_first_z
that contains a value of ´1´. The sign of the triggering slope is held in bit (GYR 0x0B) any_sign
until the interrupt is retriggered. If (GYR 0x0B) slope_sign = ´1´ (´0´), the sign is positive
(negative).
7.7.6 High-Rate interrupt
This interrupt is based on the comparison of angular rate data against a high-rate threshold for
the detection of shock or other high-angular rate events. The principle is made clear in Figure
18 below:

Figure 18: High rate interrupt

The high-rate interrupt is enabled (disabled) per axis by writing ´1´ (´0´) to bits (GYR 0x22)
high_en_x, (GYR 0x24) high_en_y, and (GYR 0x26) high_en_z, respectively. The high-rate
threshold is set through the (GYR 0x22) high_th_x register, (GYR 0x24) high_th_y register and
(GYR 0x26) high_th_z for the corresponding axes. The meaning of an LSB of (GYR
0x22/24/26) high_th_x/y/z depends on the selected °/s-range: it corresponds to 62.5°/s in
2000°/s-range, 31.25°/s in 1000°/s-range, 15.625°/s in 500°/s -range …). The high_th_x/y/z

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

register setting 0 corresponds to 62.26°/s in 2000°/s-range, 31.13°/s in 1000°/s-range, 15.56°/s

in 500°/s-range …. Therefore the maximum value is 1999.76°/s in 2000°/s-range (999.87°/s
1000°/s-range, 499.93°/s in 500°/s -range …).

A hysteresis can be selected by setting the (GYR 0x22/24/26) high_hy_x/y/z bits. Analogously
to (GYR 0x22/24/26) high_th_x/y/z, the meaning of an LSB of (GYR 0x22/24/26) high_hy_x/y/z
bits is °/s-range dependent: The high_hy_x/y/z register setting 0 corresponds to an angular rate
difference of 62.26°/s in 2000°/s-range, 31.13°/s in 1000°/s-range, 15.56°/s in 500°/s-range ….
The meaning of an LSB of (GYR 0x22/24/26) high_hy_x/y/z depends on the selected °/s-range
too: it corresponds to 62.5°/s in 2000°/s-range, 31.25°/s in 1000°/s-range, 15.625°/s in 500°/s -
range …).

The high-rate interrupt is generated if the absolute value of the angular rate of at least one of
the enabled axes (´or´ relation) is higher than the threshold for at least the time defined by the
(GYR 0x23/25/27) high_dur_x/y/z register. The interrupt is reset if the absolute value of the
angular rate of all enabled axes (´and´ relation) is lower than the threshold minus the
hysteresis. In bit (GYR 0x09) high_int the interrupt status is stored. The relation between the
content of (GYR 0x23/25/27) high_dur_x/y/z and the actual delay of the interrupt generation is
delay [ms] = [(GYR 0x23/25727) high_dur_x/y/z + 1] * 2.5 ms. Therefore, possible delay times
range from 2.5 ms to 640 ms.
[Link] Axis and sign information of high-rate interrupt
The axis which triggered the interrupt is indicated by bits (GYR 0x0C) high_first_x, (GYR 0x0C)
high_first_y, and (GYR 0x0C) high_first_z. The bit corresponding to the triggering axis contains
a ´1´ while the other bits hold a ´0´. These bits are cleared together with clearing the interrupt
status. The sign of the triggering angular rate is stored in bit (GYR 0x0C) high_sign. If (GYR
0x0C) high_sign = ´1´ (´0´), the sign is positive (negative).

8 Register description gyroscope

8.1 General remarks

The entire communication with the device is performed by reading from and writing to registers.
Registers have a width of 8 bits; they are mapped to a common space of 64 addresses from
(GYR 0x00) up to (GYR 0x3F). Within the used range there are several registers which are
either completely or partially marked as ‘reserved’. Any reserved bit is ignored when it is written
and no specific value is guaranteed when read. It is recommended not to use registers at all
which are completely marked as ‘reserved’. Furthermore it is recommended to mask out (logical
and with zero) reserved bits of registers which are partially marked as reserved.

Registers with addresses from (GYR 0x00) up to (GYR 0x0E) are read-only. Any attempt to
write to these registers is ignored. There are bits within some registers that trigger internal
sequences. These bits are configured for write-only access, e. g. (GYR 0x21) reset_int or the
entire (GYR 0x14) softreset register, and read as value ´0´.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

8.2 Register map gyroscope

Register
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 Access Reset Value
Address
0x3F fifo_data[7] fifo_data[6] fifo_data[5] fifo_data[4] fifo_data[3] fifo_data[2] fifo_data[1] fifo_data[0] ro 0x00
0x3E mode[1] mode[0] data_select[1] data_select[0] w/r 0x00
0x3D tag h2o_mrk_lvl_trig_ret[6] h2o_mrk_lvl_trig_ret[5] h2o_mrk_lvl_trig_ret[4] h2o_mrk_lvl_trig_ret[3] h2o_mrk_lvl_trig_ret[2] h2o_mrk_lvl_trig_ret[1] h2o_mrk_lvl_trig_ret[0] w/r 0x00
0x3C rate_ok bist_fail bist_rdy trig_bist ro N/A
0x3B gp0[11] gp0[10] gp0[9] gp0[8] gp0[7] gp0[6] gp0[5] gp0[4] w/r N/A
0x3A gp0[3] gp0[2] gp0[1] gp0[0] offset_x[1] offset_x[0] offset_y[0] offset_z[0] w/r N/A
0x39 offset_z[11] offset_z[10] offset_z[9] offset_z[8] offset_z[7] offset_z[6] offset_z[5] offset_z[4] w/r N/A
0x38 offset_y[11] offset_y[10] offset_y[9] offset_y[8] offset_y[7] offset_y[6] offset_y[5] offset_y[4] w/r N/A
0x37 offset_x[11] offset_x[10] offset_x[9] offset_x[8] offset_x[7] offset_x[6] offset_x[5] offset_x[4] w/r N/A
0x36 offset_x[3] offset_x[2] offset_y[3] offset_y[2] offset_y[1] offset_z[3] offset_z[2] offset_z[1] w/r N/A
0x35 w/r 0x00
0x34 ext_fifo_sc_en ext_fifo_s_sel burst_same_en i2c_wdt_en i2c_wdt_sel spi3 w/r 0x00
0x33 nvm_remain[3] nvm_remain[2] nvm_remain[1] nvm_remain[0] nvm_load nvm_rdy nvm_prog_trig nvm_prog_mode w/r 0x00
0x32 auto_offset_wordlength[1] auto_offset_wordlength[0] fast_offset_wordlength[1] fast_offset_wordlength[0] fast_offset_en fast_offset_en_z fast_offset_en_y fast_offset_en_x w/r 0xC0
0x31 slow_offset_th[1] slow_offset_th[0] slow_offset_dur[2] slow_offset_dur[1] slow_offset_dur[0] slow_offset_en_z slow_offset_en_y slow_offset_en_x w/r 0x60
0x30 w/r 0xE8
0x2F w/r 0xE0
0x2E w/r 0x81
0x2D w/r 0x40
0x2C w/r 0x42
0x2B w/r 0x22
0x2A w/r 0xE8
0x29 w/r 0x19
0x28 w/r 0x24
0x27 high_dur_z[7] high_dur_z[6] high_dur_z[5] high_dur_z[4] high_dur_z[3] high_dur_z[2] high_dur_z[1] high_dur_z[0] w/r 0x19
0x26 high_hy_z[1] high_hy_z[0] high_th_z[4] high_th_z[3] high_th_z[2] high_th_z[1] high_th_z[0] high_en_z w/r 0x02
0x25 high_dur_y[7] high_dur_y[6] high_dur_y[5] high_dur_y[4] high_dur_y[3] high_dur_y[2] high_dur_y[1] high_dur_y[0] w/r 0x19
0x24 high_hy_y[1] high_hy_y[0] high_th_y[4] high_th_y[3] high_th_y[2] high_th_y[1] high_th_y[0] high_en_y w/r 0x02
0x23 high_dur_x[7] high_dur_x[6] high_dur_x[5] high_dur_x[4] high_dur_x[3] high_dur_x[2] high_dur_x[1] high_dur_x[0] w/r 0x19
0x22 high_hy_x[1] high_hy_x[0] high_th_x[4] high_th_x[3] high_th_x[2] high_th_x[1] high_th_x[0] high_en_x w/r 0x02
0x21 reset_int offset_reset latch_status_bits latch_int[3] latch_int[2] latch_int[1] latch_int[0] w/r 0x00
0x20 w/r 0x00
0x1F w/r 0x28
0x1E fifo_wm_en w/r 0x08
0x1D w/r 0xC9
0x1C awake_dur[1] awake_dur[0] any_dursample[1] any_dursample[0] any_en_z any_en_y any_en_x w/r 0xA0
0x1B fast_offset_unfilt any_th[6] any_th[5] any_th[4] any_th[3] any_th[2] any_th[1] any_th[0] w/r 0x04
0x1A slow_offset_unfilt high_unfilt_data any_unfilt_data w/r 0x00
0x19 int2_high int2_any wo 0x00
0x18 int2_data int2_fast_offset int2_fifo int2_auto_offset int1_auto_offset int1_fifo int1_fast_offset int1_data w/r 0x00
0x17 int1_high int1_any w/r 0x00
0x16 int2_od int2_lvl int1_od int1_lvl w/r 0x0F
0x15 data_en fifo_en auto_offset_en w/r 0x00
0x14 softreset[7] softreset[6] softreset[5] softreset[4] softreset[3] softreset[2] softreset[1] softreset[0] wo 0x00
0x13 data_high_bw shadow_dis wo 0x00
0x12 fast_powerup power_save_mode ext_trig_sel[1] ext_trig_sel[0] autosleep_dur[2] autosleep_dur[1] autosleep_dur[0] w/r 0x00
0x11 suspend deep_suspend sleep_dur[2] sleep_dur[1] sleep_dur[0] w/r 0x00
0x10 bw[3] bw[2] bw[1] bw[0] w/r 0x80
0x0F range[2] range[1] range[0] w/r 0x00
0x0E Overrun frame_counter[6] frame_counter[5] frame_counter[4] frame_counter[3] frame_counter[2] frame_counter[1] frame_counter[0] ro 0x00
0x0D ro 0x00
0x0C high_sign high_first_z high_first_y high_first_x ro 0x00
0x0B any_sign any_first_z any_first_y any_first_x ro 0x00
0x0A data_int auto_offset_int fast_ofsset_int fifo_int ro 0x00
0x09 any_int high_int ro 0x00
0x08 ro 0x00
0x07 rate_z[15] rate_z[14] rate_z[13] rate_z[12] rate_z[11] rate_z[10] rate_z[9] rate_z[8] ro 0x00
0x06 rate_z[7] rate_z[6] rate_z[5] rate_z[4] rate_z[3] rate_z[2] rate_z[1] rate_z[0] ro 0x00
0x05 rate_y[15] rate_y[14] rate_y[13] rate_y[12] rate_y[11] rate_y[10] rate_y[9] rate_y[8] ro 0x00
0x04 rate_y[7] rate_y[6] rate_y[5] rate_y[4] rate_y[3] rate_y[2] rate_y[1] rate_y[0] ro 0x00
0x03 rate_x[15] rate_x[14] rate_x[13] rate_x[12] rate_x[11] rate_x[10] rate_x[9] rate_x[8] ro 0x00
0x02 rate_x[7] rate_x[6] rate_x[5] rate_x[4] rate_x[3] rate_x[2] rate_x[1] rate_x[0] ro 0x00
0x01 ro 0x00
0x00 chip_id[7] chip_id[6] chip_id[5] chip_id[4] chip_id[3] chip_id[2] chip_id[1] chip_id[0] ro 0x0F

w/r
write only
read only
res. future use

Figure 19: Register map gyroscope

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR Register 0x00 (CHIP_ID)

The register contains the chip identification code.

Name 0x00 CHIP_ID

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content chip_id<7:4>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content chip_id<3:0>
chip_id<7:0>: Fixed value b’0000’1111 =0x0F

GYR Register 0x01 is reserved

GYR Register 0x02 (RATE_X_LSB)

The register contains the least-significant bits of the X-channel angular rate readout value.
When reading out X-channel angular rate values, data consistency is guaranteed if the
RATE_X_LSB is read out before the RATE_X_MSB and shadow_dis=’0’. In this case, after the
RATE_X_LSB has been read, the value in the RATE_X_MSB register is locked until the
RATE_X_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Angular rate data may be read from register RATE_X_LSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x02 RATE_X_LSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_x_lsb<7:4>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_x_lsb<3:0>

rate_x_lsb<7:0>: Least significant 8 bits of rate read-back value; (two’s-complement format)

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR Register 0x03 (RATE_X_MSB)

The register contains the most-significant bits of the X-channel angular rate readout value.
When reading out X-channel angular rate values, data consistency is guaranteed if the
RATE_X_LSB is read out before the RATE_X_MSB and shadow_dis=’0’. In this case, after the
RATE_X_LSB has been read, the value in the RATE_X_MSB register is locked until the
RATE_X_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Angular rate data may be read from register RATE_X_MSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x03 RATE_X_MSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_x_msb<15:12>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_x_msb<11:8>
rate_x_msb<15:8>: Most significant 8 bits of rate read-back value (two’s-complement format)

GYR Register 0x04 (RATE_Y_LSB)

The register contains the least-significant bits of the Y-channel angular rate readout value.
When reading out Y-channel angular rate values, data consistency is guaranteed if the
RATE_Y_LSB is read out before the RATE_Y_MSB and shadow_dis=’0’. In this case, after the
RATE_Y_LSB has been read, the value in the RATE_Y_MSB register is locked until the
RATE_Y_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Angular rate data may be read from register RATE_Y_LSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x04 RATE_Y_LSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_y_lsb<7:4>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_y_lsb<3:0>

rate_y_lsb<7:0>: Least significant 8 bits of rate read-back value; (two’s-complement format)

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR Register 0x05 (RATE_Y_MSB)

The register contains the most-significant bits of the Y-channel angular rate readout value.
When reading out Y-channel angular rate values, data consistency is guaranteed if the
RATE_Y_LSB is read out before the RATE_Y_MSB and shadow_dis=’0’. In this case, after the
RATE_Y_LSB has been read, the value in the RATE_Y_MSB register is locked until the
RATE_Y_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Angular rate data may be read from register RATE_Y_MSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x05 RATE_Y_MSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_y_msb<15:12>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_y_msb<11:8>

rate_y_msb<15:8>: Most significant 8 bits of rate read-back value (two’s-complement format)

GYR Register 0x06 (RATE_Z_LSB)

The register contains the least-significant bits of the Z-channel angular rate readout value.
When reading out Z-channel angular rate values, data consistency is guaranteed if the
RATE_Z_LSB is read out before the RATE_Z_MSB and shadow_dis=’0’. In this case, after the
RATE_Z_LSB has been read, the value in the RATE_Z_MSB register is locked until the
RATE_Z_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Angular rate data may be read from register RATE_Z_LSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x06 RATE_Z_LSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_z_lsb<7:4>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_z_lsb<3:0>

rate_z_lsb<7:0>: Least significant 8 bits of rate read-back value; (two’s-complement format)

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR Register 0x07 (RATE_Z_MSB)

The register contains the most-significant bits of the Z-channel angular rate readout value.
When reading out Z-channel angular rate values, data consistency is guaranteed if the
RATE_Z_LSB is read out before the RATE_Z_MSB and shadow_dis=’0’. In this case, after the
RATE_Z_LSB has been read, the value in the RATE_Z_MSB register is locked until the
RATE_Z_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Angular rate data may be read from register RATE_Z_MSB at any time except
during power-up and in DEEP_SUSPEND mode.

Name 0x07 RATE_Z_MSB

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_z_msb<15:12>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content rate_z_msb<11:8>

rate_z_msb<15:8>: Most significant 8 bits of rate read-back value (two’s-complement format)

GYR Register 0x08 reserved

GYR Register 0x09 (INT_STATUS_0)

The register contains interrupt status bits.

Name 0x09 INT_STATUS_0

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content reserved
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content reserved any_int high_int reserved

any_int: Any motion interrupt status

high_int: High rate interrupt status

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR Register 0x0A (INT_STATUS_1)

The register contains interrupt status bits.

Name 0x0A INT_STATUS_1

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content data_int auto_offset_int fast_offset_int fifo_int
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content reserved

data_int: New data interrupt status

auto_offset_int: Auto Offset interrupt status
fast_offset_int: Fast Offset interrupt status
fifo_int: Fifo interrupt status

GYR Register 0x0B (INT_STATUS_2)

The register contains any motion interrupt status bits,

Name 0x0B INT_STATUS_2

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content reserved
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content any_sign any_first_z any_first_y any_first_x

any_sign: sign of any motion interrupt (‘1’= positive, ‘0’=negative)

any_first_z: ‘1’ indicates that z-axis is triggering axis of any motion interrupt
any_first_y: ‘1’ indicates that y-axis is triggering axis of any motion interrupt
any_first_x: ‘1’ indicates that z-axis is triggering axis of any motion interrupt

GYR Register 0x0C (INT_STATUS_3)

The register contains high rate interrupt status bits.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Name 0x0C INT_STATUS_3

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content reserved
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content high_sign high_first_z high_first_y high_first_x

high_sign: sign of high rate interrupt (‘1’= positive, ‘0’=negative)

high_first_z: ‘1’ indicates that z-axis is triggering axis of high rate interrupt
high_first_y: ‘1’ indicates that y-axis is triggering axis of high rate interrupt
high_first_x: ‘1’ indicates that z-axis is triggering axis of high rate interrupt

GYR Register 0x0D is reserved

GYR Register 0x0E (FIFO_STATUS)

The register contains FIFO status flags.

Name 0x0E FIFO_STATUS

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content fifo_overrun fifo_frame_counter<6:4>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content fifo_frame_counter<3:0>

fifo_overrun: FIFO overrun condition has ‘1’  occurred, or ‘0’not occurred; flag can be
cleared by writing to the FIFO configuration register FIFO_CONFIG_1 only

fifo_frame_counter<6:4>: Current fill level of FIFO buffer. An empty FIFO corresponds to

0x00. The frame counter can be cleared by reading out all frames
from the FIFO buffer or writing to the FIFO configuration register
FIFO_CONFIG_1.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR Register 0x0F (RANGE)

The gyroscope supports four different angular rate measurement ranges. A measurement
range is selected by setting the (0x0F) range bits as follows:
Name 0x0F RANGE
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved
0
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved range<2:0>

range<2:0>: Angular Rate Range and Resolution.

Table 29: Angular Rate Range and Resolution

range<2:0> Full Scale Resolution

‘000’ ±2000°/s 16.4 LSB/°/s  61.0 m°/s / LSB
‘001’ ±1000°/s 32.8 LSB/°/s  30.5 m°/s / LSB
‘010’ ±500°/s 65.6 LSB/°/s  15.3 m°/s / LSB
‘011’ ±250°/s 131.2 LSB/°/s  7.6 m°/s / LSB
‘100’ ±125°/s 262.4 LSB/°/s  3.8m°/s / LSB
‘101’, ´110´, ´111´ reserved

reserved: write ‘0’

GYR Register 0x10 (BW)

The register allows the selection of the rate data filter bandwidth.

Name 0x10 BW
Bit 7 6 5 4
Read/Write R R/W R/W R/W
Reset
1 0 0 0
Value
Content reserved
0
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content bw<3:0>

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

bw<3:0>:
Table 30: Gyroscope Output data rate and filter bandwidth

0x10 bits<3:0> Decimation Factor ODR Filter Bandwidth

‘0111’ 20 100 Hz 32 Hz

‘0110’ 10 200 Hz 64 Hz

‘0101’ 20 100 Hz 12 Hz

‘0100’ 10 200 Hz 23 Hz

‘0011’ 5 400 Hz 47 Hz

‘0010’ 2 1000 Hz 116 Hz

‘0001’ 0 2000 Hz 230 Hz

‘0000’ 0 2000 Hz Unfiltered (523Hz)

‘1xxx’ Unused / Reserved Unused / Reserved Unused / Reserved

reserved: write ‘0

GYR Register 0x11 (LPM1)

Selection of the main power modes.

Name 0x11 LPM1

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content suspend reserved deep_suspend reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content sleep_dur[2] sleep_dur[1] sleep_dur[0] reserved

suspend, deep_suspend:
Main power mode configuration setting {suspend; deep_suspend}:
{0; 0}  NORMAL mode;
{0; 1}  DEEP_SUSPEND mode;
{1; 0}  SUSPEND mode;
{all other}  illegal

Please note that only certain power mode transitions are permitted.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Please note, that all application specific settings which are not equal to the default settings
(refer to 8.2 register map gyroscope), must be re-set to its designated values after
DEEP_SUSPEND.

sleep_dur<2:0>: time in ms in fast-power-up mode under advanced power-saving mode.

Table 31: Sleep duration time gyroscope

sleep_dur<2:0> Time (ms)

‘000’ 2 ms
‘001’ 4 ms
‘010’ 5 ms
‘011’ 8 ms
‘100’ 10 ms
‘101’ 15 ms
‘110’ 18 ms
‘111’ 20 ms

reserved: write ‘0’

GYR Register 0x12 (LPM2)

Configuration settings for fast power-up and external trigger.

Name 0x12 LPM2

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content fast_powerup power_save_mode ext_trig_sel[1] ext_trig_sel[0]
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved autosleep_dur[2] autosleep_dur[1] autosleep_dur[0]

fast powerup: 1  Drive stays active for suspend mode in order to have a short wake-up
time…..
0  Drive is switched off for suspend mode

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

ext_trig_sel<1:0>:
Table 32: external trigger gyroscope

ext_trig_sel<1:0> Trigger source

‘00’ No
‘01’ INT1 pin
‘10’ INT2 pin
‘11’ SDO pin
(SPI3 mode)

autosleep<2:0>: time in ms in normal mode under advanced power-saving mode.

Table 33: Autosleep duration gyroscope

autosleep_dur<2:0> Time (ms)

‘000’ Not allowed
‘001’ 4 ms
‘010’ 5 ms
‘011’ 8 ms
‘100’ 10 ms
‘101’ 15 ms
‘110’ 20 ms
‘111’ 40 ms

reserved: write ‘0’

GYR Register 0x13 (RATE_HBW)

Angular rate data acquisition and data output format.

Name 0x13 RATE_HBW

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset 0 (1 in 8-bit
0 0 0
Value mode)
Content data_high_bw shadow_dis reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved

data_high_bw: select whether ‘1´ unfiltered, or ‘0’ filtered data may be read from the
rate data registers.
shadow_dis: ‘1´ disable, or ‘0’ the shadowing mechanism for the rate data output
registers. When shadowing is enabled, the content of the rate data

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

component in the MSB register is locked, when the component in the LSB is
read, thereby ensuring the integrity of the rate data during read-out. The lock
is removed when the MSB is read.
reserved: write ‘0’

GYR Register 0x14 (BGW_SOFTRESET)

Controls user triggered reset of the sensor.

Name 0x14 BGW_SOFTRESET

Bit 7 6 5 4
Read/Write W W W W
Reset
0 0 0 0
Value
Content softreset
Bit 3 2 1 0
Read/Write W W W W
Reset
0 0 0 0
Value
Content softreset
softreset: 0xB6  trigger a reset. Other values are ignored. Following a delay, all user
configuration settings are overwritten with their default state or the setting
stored in the NVM, wherever applicable. This register is functional in all
operation modes. Please note, that all application specific settings which are
not equal to the default settings (refer to 8.2 register map gyroscope), must
be re-set to its designated values.

GYR Register 0x15 (INT_EN_0)

Controls which interrupts are enabled.

Name 0x15 INT_EN_0

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content data_en fifo_en reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved auto_offset_en reserved

data_en: ‘1’ (‘0’) enables (disables) new data interrupt

fifo_en : ‘1’ (‘0’) enables (disables) fifo interrupt
auto_offset_en: ‘1’ (‘0’) enables (disables) auto-offset compensation

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

reserved: write ‘0’

GYR Register 0x16 (INT_EN_1)

Contains interrupt pin configurations.

Name 0x16 INT_EN_1

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
1 1 1 1
Value
Content int2_od int2_lvl int1_od int1_lvl

int2_od: ‘0’ (‘1’) selects push-pull, ‘1’ selects open drive for INT4
int2_lvl: ‘0’ (‘1’) selects active level ‘0’ (‘1’) for INT4
int1_od: ‘0’ (‘1’) selects push-pull, ‘1’ selects open drive for INT3
int1_lvl: ‘0’ (‘1’) selects active level ‘0’ (‘1’) for INT3
reserved: write ‘0’

GYR Register 0x17 (INT_MAP_0)

Controls which interrupt signals are mapped to the INT3 pin.

Name 0x17 INT_MAP_0

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content int1_high reserved int1_any reserved

int1_high: map high rate interrupt to INT3 pin: ‘0’  disabled, or ‘1’  enabled
int1_any: map Any-Motion to INT3 pin: ‘0’  disabled, or ‘1’  enabled
reserved: write ‘0’

GYR Register 0x18 (INT_MAP_1)

Controls which interrupt signals are mapped to the INT3 pin and INT4 pin.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Name 0x1B INT_MAP_1

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content int2_data int2_fast_offset int2_fifo int2_auto_offset
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content Int1_auto_offset int1_fifo int1_fast_offset int1_data

int2_data: map new data interrupt to INT4 pin: ‘0’  disabled, or ‘1’  enabled
int2_fast_offset: map FastOffset interrupt to INT4 pin: ‘0’  disabled, or ‘1’  enabled
int2_fifo: map Fifo interrupt to INT4 pin: ‘0’  disabled, or ‘1’ enabled
int2_auto_offset: map AutoOffset tap interrupt to INT4 pin: ‘0’  disabled, or ‘1’  enabled
int1_auto_offset: map AutoOffset tap interrupt to INT3 pin: ‘0’  disabled, or ‘1’  enabled
int1_fifo: map Fifo interrupt to INT3 pin: ‘0’  disabled, or ‘1’  enabled
int1_fast_offset: map FastOffset interrupt to INT3 pin: ‘0’  disabled, or ‘1’  enabled
int1_data: map new data interrupt to INT3 pin: ‘0’  disabled, or ‘1’  enabled

GYR Register 0x19 (INT_MAP_2)

Controls which interrupt signals are mapped to the INT4 pin.

Name 0x19 INT_MAP_2

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content Int2_high reserved Int2_any reserved

Int2_high: map high rate interrupt to INT4 pin: ‘0’  disabled, or ‘1’  enabled
Int2_any: map Any-Motion to INT4 pin: ‘0’  disabled, or ‘1’  enabled
reserved: write ‘0’

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR Register 0x1A

Contains the data source definition of those interrupts with selectable data source.

Name 0x1A
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved slow_offset_unfilt reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content high_unfilt_data reserved any_unfilt_data reserved

slow_offset_unfilt: ‘1’ (‘0’) seletects unfiltered (filtered) data for slow offset compensation
high_unfilt_data: ‘1’ (‘0’) seletects unfiltered (filtered) data for high rate interrupt
any_unfilt_data: ‘1’ (‘0’) seletects unfiltered (filtered) data for any motion interrupt
reserved: write ‘0’

GYR Register 0x1B

Contains the data source definition of fast offset compensation and the any motion threshold.

Name 0x1B
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content fast_offset_unfilt any_th <6:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 1 0 0
Value
Content any_th <3:0>

fast_offset_unfilt: ‘1’ (‘0’) selects unfiltered (filtered) data for fast offset compensation
any_th: any_th = (1 + any_th(register value)) * 16 LSB
The any_th scales with the range setting

GYR Register 0x1C

Name 0x1C
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Reset
1 0 1 0
Value
Content awake_dur <1:0> any_dursample <1:0>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved any_en_z any_en_y any_en_x

awake_dur: 0=8 samples, 1=16 samples, 2=32 samples, 3=64 samples

any_dursample: 0=4 samples, 1=8 samples, 2=12 samples, 3=16 samples
any_en_z: ‘1’ (‘0’) enables (disables) any motion interrupt for z-axis
any_en_y: ‘1’ (‘0’) enables (disables) any motion interrupt for y-axis
any_en_x: ‘1’ (‘0’) enables (disables) any motion interrupt for z-axis
If one of the bits any_x/y/z is enabled, the any motion interrupt is enabled
reserved: write ‘0’

GYR Register 0x1D is reserved.

GYR Register 0x1E

Name 0x1E
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
1 0 0 0
Value
Content fifo_wm_en reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
1 0 0 0
Value
Content reserved

fifo_wm_en: ‘1’ (‘0’) enables (disables) fifo water mark level interrupt
reserved: write ‘0’

GYR Register 0x1F and 0x20 are reserved

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR Register 0x21 (INT_RST_LATCH)

Contains the interrupt reset bit and the interrupt mode selection.

Name 0x21 INT_RST_LATCH

Bit 7 6 5 4
Read/Write W R/W R/W R/W
Reset
0 0 0 0
Value
Content reset_int offset_reset reserved latch_status_bit
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content latch_int<3:0>

reset_int: write ‘1’  clear any latched interrupts, or ‘0’  keep latched interrupts
active
write ‘1’  resets internal interrupt status of each interrupt
offset_reset: write ‘1’  resets the Offset value calculated with FastOffset, SlowOffset &
AutoOffset

latch_int<3:0>: ´0000b´  non-latched, ´0001b´  temporary, 250 ms,

´0010b´  temporary, 500 ms, ´0011b´  temporary, 1 s,
´0100b´  temporary, 2 s, ´0101b´  temporary, 4 s,
´0110b´  temporary, 8 s, ´0111b´  latched,
´1000b´  non-latched, ´1001b´  temporary, 250 s,
´1010b´  temporary, 500 s, ´1011b´  temporary, 1 ms,
´1100b´  temporary, 12.5 ms, ´1101b´  temporary, 25 ms,
´1110b´  temporary, 50 ms, ´1111b´  latched
reserved: write ‘0’

GYR Register 0x22 (High_Th_x)

Contains the high rate threshold and high rate hysteresis setting for the x-axis

Name 0x22 High_Th_x

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content high_hy_x <1:0> high_th_x <4:3>

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 1 0
Value
Content high_th_x <2:0> high_en_x

high_hy_x: high_hy_x = (255 + 256 * high_hy_x(register value)) *4 LSB

The high_hy_x scales with the range setting
high_th_x high_th_x = (255 + 256 * high_th_x(register value)) *4 LSB
The high_th_x scales with the range setting
high_en_x ‘1’ (‘0’) enables (disables) high rate interrupt for x-axis

GYR Register 0x23 (High_Dur_x)

Contains high rate duration setting for the x-axis.

Name 0x23 High_Dur_x

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 1
Value
Content high_dur_x <7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
1 0 0 1
Value
Content high_dur_x <3:0>

high_dur_x: high_dur time_x = (1 + high_dur_x(register value))*2.5ms

GYR Register 0x24 (High_Th_y)

Contains the high rate threshold and high rate hysteresis setting for the y-axis.

Name 0x24 High_Th_y

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content high_hy_y <1:0> high_th_y <4:3>

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 1 0
Value
Content high_th_y <2:0> high_en_y

high_hy_y: high_hy_y = (255 + 256 * high_hy_y(register value)) *4 LSB

The high_hy_y scales with the range setting
high_th_y high_th_x = (255 + 256 * high_th_y(register value)) *4 LSB
The high_th_y scales with the range setting
high_en_y ‘1’ (‘0’) enables (disables) high rate interrupt for y-axis

GYR Register 0x25 (High_Dur_y)

Contains high rate duration setting for the x-axis.

Name 0x25 High_Dur_y

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 1
Value
Content high_dur_y <7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
1 0 0 1
Value
Content high_dur_y <3:0>

high_dur_y: high_dur time_y = (1 + high_dur_y(register value))*2.5ms

GYR Register 0x26 (High_Th_z)

Contains the high rate threshold and high rate hysteresis setting for the z-axis.

Name 0x26 High_Th_z

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content high_hy_z <1:0> high_th_z <4:3>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 1 0
Value
Content high_th_z <2:0> high_en_z

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

high_hy_z: high_hy_z = (255 + 256 * high_hx_z(register value)) *4 LSB

The high_hy_x scales with the range setting
high_th_z high_th_z = (255 + 256 * high_th_z(register value)) *4 LSB
The high_th_z scales with the range setting
high_en_z ‘1’ (‘0’) enables (disables) high rate interrupt for z-axis

GYR Register 0x27 (High_Dur_z)

Contains high rate duration setting for the z-axis.

Name 0x27 High_dur_z

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 1
Value
Content high_dur_z <7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
1 0 0 1
Value
Content high_dur_z <3:0>

high_dur_z: high_dur time_z = (1 + high_dur_z(register value))*2.5ms

GYR Register 0x28 to 0x30 are reserved

GYR Register 0x31 (SOC)

Contains the slow offset cancellation setting.

Name 0x31 SOC

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 1 1 0
Value
Content Slow_offset_th<1:0> Slow_offset_dur<2:1>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Slow_offset_dur
Content slow_offset_en_z slow_offset_en_y slow_offset_en_x
<0>

Slow_offset_th: 0=0.1°/s, 1=0.2°/s, 2=0.5°/s, 3=1°/s

Slow_offset_dur: 0=40ms, 1=80ms, 2=160ms, 3=320ms, 4=640ms, 5=1280ms,

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

6 and 7=unused
slow_offset_en_z: ‘1’ (‘0’) enables (disables) slow offset compensation for z-axis
slow_offset_en_y: ‘1’ (‘0’) enables (disables) slow offset compensation for y-axis
slow_offset_en_x: ‘1’ (‘0’) enables (disables) slow offset compensation for x-axis

GYR Register 0x32 (A_FOC)

Contains the fast offset cancellation setting.

Name 0x32 A_FOC

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
1 1 0 0
Value
Content auto_offset_wordlength<1:0> fast_offset_wordlength<1:0>
Bit 3 2 1 0
Read/Write R R/W R/W R/W
Reset
0 0 0 0
Value
Content fast_offset_en fast_offset_en_z fast_offset_en_y fast_offset_en_x

auto_offset_wordlength: 0=32 samples, 1=64 samples, 2=128 samples, 3=256 samples

fast_offset_wordlength: 0=32 samples, 1=64 samples, 2=128 samples, 3=256 samples
fast_offset_en: write ‘1’  triggers the fast offset compensation for the enabled
axes
fast_offset_en_z: ‘1’ (‘0’) enables (disables) fast offset compensation for z-axis
fast _offset_en_y: ‘1’ (‘0’) enables (disables) fast offset compensation for y-axis
fast _offset_en_x: ‘1’ (‘0’) enables (disables) fast offset compensation for x-axis

GYR Register 0x33 (TRIM_NVM_CTRL)

Contains the control settings for the few-time programmable non-volatile memory (NVM).
Name 0x33 TRIM_NVM_CTRL
Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content nvm_remain<3:0>
Bit 3 2 1 0
Read/Write R/W R W R/W
Reset
0 n/a 0 0
Value
Content nvm_load nvm_rdy nvm_prog_trig nvm_prog_mode

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR Register 0x34 (BGW_SPI3_WDT)

Contains settings for the digital interfaces.
Name 0x34 BGW_SPI3_WDT
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved ext_fifo_s_en ext_fifo_s_sel
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved i2c_wdt_en i2c_wdt_sel spi3

ext_fifo_s_en: enables external FIFO synchronization mode, ‘1’  enable, ‘0’  disable
ext_fifo_s_sel: selects source for external FIFO synchronization
‘1’  source = INT4
‘0’  source = INT3
reserved: write ‘0’
i2c_wdt_en: if I²C interface mode is selected then ‘1´  enable, or ‘0’  disables the
watchdog at the SDI pin (= SDA for I²C)
i2c_wdt_sel: select an I²C watchdog timer period of ‘0’  1 ms, or ‘1’  50 ms
spi3: select ´0´  4-wire SPI, or ´1´  3-wire SPI mode

GYR Register 0x35 is reserved

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR Register 0x36 (OFC1)

Contains offset compensation values.
Name 0x36 OFC1
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_x<3:2> offset_y<3:2>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_y<1> offset_z<3:1>

offset_x<3:2>: setting of offset calibration values X-channel

offset_y<3:1>: setting of offset calibration values Y-channel
offset_z<3:1>: setting of offset calibration values Z-channel

GYR Register 0x37 (OFC2)

Contains offset compensation values for X-channel.
Name 0x37 OFC2
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_x<11:8>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_x<7:4>

offset_x <11:4>: offset value, which is subtracted from the internal filtered and unfiltered x-
axis data; please refer to the following table for the scaling of the offset
register; the content of the offset_x<11:4> may be written to the NVM; it is
automatically restored from the NVM after each power-on or softreset;
offset_x<11:4> may be written directly by the user.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Table 34: Scaling of the offset register gyroscope

Original readout value Value in offset register Compensated readout value

0 ˚/s 2047 -124.94 ˚/s
0 ˚/s 0 0 ˚/s
0 ˚/s -2048 125 ˚/s

GYR Register 0x38 (OFC3)

Contains offset compensation values for Y-channel.
Name 0x38 OFC3
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_y<11:8>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_y<7:4>

offset_y <11:4>: offset value, which is subtracted from the internal filtered and unfiltered y-
axis data; please refer Table 34 for the scaling of the offset register; the
content of the offset_y<11:4> may be written to the NVM; it is automatically
restored from the NVM after each power-on or softreset; offset_y<11:4> may
be written directly by the user.
For reference see example at GYR Register 0x38 (OFC2)

GYR Register 0x39 (OFC4)

Contains offset compensation values for Z-channel.
Name 0x39 OFC4
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_z<11:8>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content offset_z<7:4>

offset_z <11:4>: offset value, which is subtracted from the internal filtered and unfiltered z-
axis data; please Table 34 for the scaling of the offset register; the content of

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

the offset_z<11:4> may be written to the NVM; it is automatically restored

from the NVM after each power-on or softreset; offset_z<11:4> may be
written directly by the user.
For reference see example at GYR Register 0x38 (OFC2)

GYR Register 0x3A (TRIM_GP0)

Contains general purpose data register with NVM back-up.
Name 0x3A TRIM_GP0
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
X X X X
Value
Content GP0<3:0>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
X X X X
Value
Content offset_x<1:0> offset_y<0> offset_z<0>

GP0<3:0>: general purpose NVM image register not linked to any sensor-specific
functionality; register may be written to NVM and is restored after each
power-up or software reset
offset_x<1:0>: setting of offset calibration values X-channel
offset_y<0>: setting of offset calibration values Y-channel
offset_z<0> setting of offset calibration values Z-channel

GYR Register 0x3B (TRIM_GP1)

Contains general purpose data register with NVM back-up.
Name 0x3B TRIM_GP1
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
X X X X
Value
Content GP1<7:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
X X X X
Value
Content GP1<3:0>

GP1<7:0>: general purpose NVM image register not linked to any sensor-specific
functionality; register may be written to NVM and is restored after each
power-up or software reset

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

GYR Register 0x3C (BIST)

Contains Built in Self-Test (BIST) possibilities:

Name 0x3C BIST

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content reserved reserved reserved rate_ok
Bit 3 2 1 0
Read/Write R/W R/W R/W R
Reset
0 0 0 0
Value
Content reserved bist_fail bist_rdy trig_bist

Rate ok: ´1´ indicates proper sensor function, no trigger is needed for this

Trig_bist: write ´1´ in order to perform the bist test

Bist_rdy: if bist_rdy is `1` and bist_fail is ´0´ result of bist test is ok means “sensor ok”
If bist_rdy is `1` and bist_fail is ´1´ result of bist test is not ok means “sensor
values not in expected range”

GYR Register 0x3D (FIFO_CONFIG_0)

Contains the FIFO watermark level.

Name 0x3D FIFO_CONFIG_0

Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
n/a n/a 0 0
Value
Content tag fifo_water_mark_level_trigger_retain<6:4>
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content fifo_water_mark_level_trigger_retain<3:0>

tag: ‘1’ (‘0’) enables (disables) fifo tag (interrupt)

Table 35: FIFO watermark level configuration

Address: 0x3D bit 7 tag Interrupt data stored in FIFO

‘0’ Default) Do not collect Interrupts
‘1’ collect Interrupts

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

fifo_water_mark_level_trigger_retain<6:0>:
fifo_water_mark_level_trigger_retain<6:0> defines the FIFO watermark level.
An interrupt will be generated, when the number of entries in the FIFO
exceeds fifo_water_mark_level_trigger_retain<6:0>;

GYR Register 0x3E (FIFO_CONFIG_1)

Register 0x3 contains FIFO configuration settings. The FIFO buffer memory is cleared and the
fifo-full flag is cleared when writing to FIFO_CONFIG_1 register.
Name 0x3E FIFO_CONFIG_1
Bit 7 6 5 4
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content fifo_mode<1:0> Reserved
Bit 3 2 1 0
Read/Write R/W R/W R/W R/W
Reset
0 0 0 0
Value
Content Reserved fifo_data_select<1:0>

fifo_mode<1:0>: selects the FIFO operating mode:

´00b´  BYPASS (buffer depth of 1 frame; old data is discarded),
´01b´  FIFO (data collection stops when buffer is filled with 100 frames),
´10b´  STREAM (sampling continues when buffer is full; old is discarded),
´11b´  reserved, do not use

fifo_data_select<1:0>:
Table 36: Gyroscope FIFO data selection

Address: 0x3E bits<1:0> data_select data of axis stored in FIFO

‘00’ (Default) X,Y,Z
‘01’ X only
‘10’ Y only
‘11’ Z only

reserved: write ‘0’

GYR Register 0x3F (FIFO_DATA)

FIFO data readout register. The format of the LSB and MSB components corresponds to that of
the angular rate data readout registers.. Read burst access may be used since the address
counter will not increment when the read burst is started at the address of FIFO_DATA. The
entire frame is discarded when a frame is only partially read out.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Name 0x3F FIFO_DATA

Bit 7 6 5 4
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content fifo_data_output_register<7:4>
Bit 3 2 1 0
Read/Write R R R R
Reset
n/a n/a n/a n/a
Value
Content fifo_data_output_register<3:0>

fifo_data_output_register<7:0>:
FIFO data readout; data format depends on the setting of register fifo_data_select<1:0>:

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

9 Functional description magnetometer

9.1 Magnetometer power management

The device contains a power on reset (POR) generator. It resets the logic part and the register
values of the concerned ASIC after powering-on VDD and VDDIO. Please note, that all application
specific settings which are not equal to the default settings (refer to register maps chapter 10
and chapter 10.2), must be re-set to its designated values after POR.
9.2 Magnetometer power modes
The magnetometer features configurable power modes. It has four power modes: In the
following chapters, power modes are described.
9.2.1 Power off mode
In Power off mode, VDD and/or VDDIO are unpowered and the device does not operate. When
only one of VDD or VDDIO is supplied, the magnetic sensor will still be in Power off mode. Power
on reset is performed after both VDD and VDDIO have risen above their detection thresholds.
9.2.2 Suspend mode
Suspend mode is the default power mode of magnetometer after the chip is powered. When
VDD and VDDIO are turned on the POR (power on reset) circuits operate and the device’s
registers are initialized. After POR becomes inactive, a start up sequence is executed. In this
sequence NVM content is downloaded to shadow registers located in the device core. After the
start up sequence the device is put in the Suspend mode. In this mode only registers which
store power control bit information and SPI3 wire enable can be accessed by the user. No other
registers can be accessed in Suspend mode. All registers lose their content, except the control
register (0x4B). In particular, in this mode a Chip ID read (register 0x40) returns “0x00” (I²C) or
high-Z (SPI).
9.2.3 Sleep mode
The user puts device from suspend into Sleep mode by setting the Power bit to “1”, or from
active modes (normal or forced) by setting OpMode bits to “11”. In this state the user has full
access to the device registers. In particular, the Chip ID can be read. Setting the power control
bit to “0” (register 0x4B bit0) will bring the device back into Suspend mode. From the Sleep
mode the user can put the device back into Suspend mode or into Active mode.
9.2.4 Active mode
The device can switch into Active mode from Sleep mode by setting OpMode bits (register
0x4C). In this mode the magnetic field measurements are performed and all registers are
accessible.
In active mode, two operation modes can be distinguished:
 Normal mode: selected channels are periodically measured according to settings set in
user registers. After measurements are completed, output data is put into data registers
and the device waits for the next measurement period, which is set by programmed
output data rate (ODR). From normal mode, the user can return to sleep mode by
setting OpMode to “11” or by performing a soft reset (see chapter 10.6). Suspend mode
can be entered by setting power control bit to “0”.
 Forced mode (single measurement): When set by the host, the selected channels are
measured according to settings programmed in user registers. After measurements are
completed, output data is put into data registers, OpMode register value returns to “11”
and the device returns to sleep mode. The forced mode is useful to achieve

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

synchronized operation between host microcontroller and magnetometer. Also, different

data output rates from the ones selectable in normal mode can be achieved using
forced mode.

Figure 20: Magnetometer power mode transition diagram

In Active Mode and normal operation, in principle any desired balance between output noise
and active time (hence power consumption) can be adjusted by the repetition settings for x/y-
axis and z-axis and the output data rate ODR. The average power consumption depends on the
ratio of high current phase time (during data acquisition) and low current phase time (between
data acquisitions). Hence, the more repetitions are acquired to generate one magnetic field
data point, the longer the active time ratio in one sample phase, and the higher the average
current. Thanks to longer internal averaging, the noise level of the output data reduces with
increasing number of repetitions.

By using forced mode, it is possible to trigger new measurements at any rate. The user can
therefore trigger measurements in a shorter interval than it takes for a measurement cycle to
complete. If a measurement cycle is not allowed to complete, the resulting data will not be
written into the data registers. To prevent this, the manually triggered measurement intervals
must not be shorter than the active measurement time which is a function of the selected
number of repetitions. The maximum selectable read-out frequency in forced mode can be
calculated as follows:

1
f max,ODR 
145µs  nXY  500µs  nZ  980µs

Hereby nXY is the number of repetitions on X/Y-axis (not the register value) and nZ the number
of repetitions on Z-axis (not the register value) (see description of REPXY and REPZ registers
in chapter 10.8).

Although the repetition numbers for X/Y and Z axis and the ODR can be adjusted independently
and in a wide range, there are four recommended presets (High accuracy preset, Enhanced

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

regular preset, Regular preset, Low power preset) which reflect the most common usage
scenarios, i.e. required output accuracy at a given current consumption, of the magnetometer.

The four presets consist of the below register configurations, which are automatically set by the
magnetometer API or driver provided by Bosch Sensortec when a preset is selected. Table 37
shows the recommended presets and the resulting magnetic field output noise and current
consumption:

Table 37: Recommended presets for repetitions and output data rates

Average current
Max ODR
consumption
Rep. recommended in forced RMS Noise
Rep. Z at
X/Y ODR mode x/y/z
Preset fmax,ODR
recommended
nZ ODR
nXY [Hz] [µT]
[Hz]
[mA]
Low power
3 3 10 >300 1.0/1.0/1.4 0.17
preset
Regular preset 9 15 10 100 0.6/0.6/0.6 0.5
Enhanced
15 27 10 60 0.5/0.5/0.5 0.8
regular preset
High accuracy
47 83 20 20 0.3/0.3/0.3 4.9
preset

9.3 Magnetometer output data

9.3.1 Magnetic field data

The representation of magnetic field data is different between X/Y-axis and Z-axis. The width of
X- and Y-axis magnetic field data is 13 bits each and stored in two’s complement.
DATAX_LSB (0x42) contains 5-bit LSB part [4:0] of the 13 bit output data of the X-channel.
DATAX_MSB (0x43) contains 8-bit MSB part [12:5] of the 13 bit output data of the X-channel.
DATAY_LSB (0x44) contains 5-bit LSB part [4:0] of the 13 bit output data of the Y-channel.
DATAY_MSB (0x45) contains 8-bit MSB part [12:5] of the 13 bit output data of the Y-channel.

The width of the Z-axis magnetic field data is 15 bit word stored in two’s complement.
DATAZ_LSB (0x46) contains 7-bit LSB part [6:0] of the 15 bit output data of the Z-channel.
DATAZ_MSB (0x47) contains 8-bit MSB part [14:7] of the 15 bit output data of the Z-channel.

For all axes, temperature compensation on the host is used to get ideally matching sensitivity
over the full temperature range. The temperature compensation is based on a resistance
measurement of the hall sensor plate. The resistance value is represented by a 14 bit unsigned
output word.
RHALL_LSB (0x48) contains 6-bit LSB part [5:0] of the 14 bit output data of the RHALL-
channel.
RHALL_MSB (0x49) contains 8-bit MSB part [13:6] of the 14 bit output data of the RHALL-
channel.

All signed register values are in two´s complement representation. Bits which are marked
“reserved” can have different values or can in some cases not be read at all (read will return
0x00 in I²C mode and high-Z in SPI mode).

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Data register readout and shadowing is implemented as follows:

After all enabled axes have been measured; complete data packages consisting of DATAX,
DATAY, DATAZ and RHALL are updated at once in the data registers. This way, it is prevented
that a following axis is updated while the first axis is still being read (axis mix-up) or that MSB
part of an axis is updated while LSB part is being read.
While reading from any data register, data register update is blocked. Instead, incoming new
data is written into shadow registers which will be written to data registers after the previous
read sequence is completed (i.e. upon stop condition in I²C mode, or CSB going high in SPI
mode, respectively). Hence, it is recommended to read out at all data at once (0x42 to 0x49 or
0x4A if status bits are also required) with a burst read.
Single bytes or axes can be read out, while in this case it is not assured that adjacent registers
are not updated during readout sequence.

The “Data ready status” bit (register 0x48 bit0) is set “1” when the data registers have been
updated but the data was not yet read out over digital interface. Data ready is cleared (set “0”)
directly after completed read out of any of the data registers and subsequent stop condition
(I²C) or lifting of CSB (SPI).

In addition, when enabled the “Data overrun” bit (register 0x4A bit7) turns “1” whenever data
registers are updated internally, but the old data was not yet read out over digital interface (i.e.
data ready bit was still high). The “Data overrun” bit is cleared when the interrupt status register
0x4A is read out. This function needs to be enabled separately by setting the “Data overrun En”
bit (register 0x4D bit7)).

Note:
Please also see chapter 10.4 for detailed register descriptions.
9.3.2 Magnetic field data temperature compensation
The raw register values DATAX, DATAY, DATAZ and RHALL are read out from the host
processor using the MAGNETOMETER API/driver which is provided by Bosch Sensortec. The
API/driver performs an off-chip temperature compensation and outputs x/y/z magnetic field data
in 16 LSB/µT to the upper application layer:

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Software
Application
application level

Temperature and sensitivity compensated

magnetic field data x/y/z available in:
a Config - short int (16 LSB/µT, limited Z range)
- long int (16 LSB/µT)
- float (µT)
BMM150
Software API / driver
driver level (provided by
Bosch Sensortec)

Magnetometer raw register data

Config
(DATAX, DATAY, DATAZ, RHALL)

BMM150
Hardware level
sensor

Figure 21: Calculation flow of magnetic field data from raw magnetometer register data

The API/driver performs all calculations using highly optimized fixed-point C-code arithmetic.
For platforms that do not support C code, a floating-point formula is available as well.

9.4 Self-test magnetometer

Magnetometer supports two self-tests modes: Normal self-test and advanced self-test.
9.4.1 Normal self test
During normal self-test, the following verifications are performed:
FlipCore signal path is verified by generating signals on-chip. These are processed through the
signal path and the measurement result is compared to known thresholds.
 FlipCore (X and Y) connection to ASIC are checked for connectivity and short circuits
 Hall sensor connectivity is checked for open and shorted connections
 Hall sensor signal path and hall sensor element offset are checked for overflow.

To perform a self test, the sensor must first be put into sleep mode (OpMode = “11”). Self-test
mode is then entered by setting the bit “Self test” (register 0x4C bit0) to “1”. After performing
self test, this bit is set back to “0”. When self-test is successful, the corresponding self-test result
bits are set to “1” (“X-Self-Test” register 0x42 bit0, “Y-Self-Test” register 0x44 bit0, “Z-Self-Test”
register 0x46 bit0). If self-test fails for an axis, the corresponding result bit returns “0”.
9.4.2 Advanced self test
Advanced self test performs a verification of the Z channel signal path functionality and
sensitivity. An on-chip coil wound around the hall sensor can be driven in both directions with a
calibrated current to generate a positive or negative field of around 100 µT.

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Advanced self test is an option that is active in parallel to the other operation modes. The only
difference is that during the active measurement phase, the coil current is enabled. The
recommended usage of advanced self test is the following:
1. Set sleep mode
2. Disable X, Y axis
3. Set Z repetitions to desired level
4. Enable positive advanced self test current
5. Set forced mode, readout Z and R channel after measurement is finished
6. Enable negative advanced self test current
7. Set forced mode, readout Z and R channel after measurement is finished
8. Disable advanced self test current (this must be done manually)
9. Calculate difference between the two compensated field values. This difference should
be around 200 µT with some margins.
10. Perform a soft reset of manually restore desired settings

Please refer to the corresponding application note for the exact thresholds to evaluate
advanced self-test.

The table below describes how the advanced self-test is controlled:

Table 38: Magnetometer advanced self-test control

(0x4C)
Configuration
[Link] <1:0>
00b Normal operation (no self-test), default
01b Reserved, do not use
10b Negative on-chip magnetic field generation
11b Positive on-chip magnetic field generation

The magnetometer API/driver provided by Bosch Sensortec provides a comfortable way to

perform both self-tests and to directly obtain the result without further calculations. It is
recommended to use this as a reference.
9.5 Non-volatile memory
Some of the memory of the magnetometer is non-volatile memory (NVM). This NVM is pre-
programmed in Bosch Sensortec fabrication line and cannot be modified afterwards. It contains
trimming data which are required for sensor operation and sensor data compensation, thus it is
read out by the magnetometer API/driver during initialization.
9.6 Magnetometer interrupt controller
Four magnetometer based interrupt engines are integrated: Low-Threshold, High-Threshold,
Overflow and Data Ready (DRDY). Each interrupt can be enabled independently.

When enabled, an interrupt sets the corresponding status bit in the interrupt status register
(0x4A) when its condition is satisfied.
When the “Interrupt Pin Enable” bit (register 0x4E bit6) is set, any occurring activated interrupts
are flagged on the magnetometer’s INT output pin. By default, the interrupt pin is disabled (high-
Z status).

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Low-Threshold, High-Threshold and Overflow interrupts are mapped to the INT pin when
enabled, Data Ready (DRDY) interrupt is mapped to the DRDY pin of magnetometer when
enabled. For High- and Low-Threshold interrupts each axis X/Y/Z can be enabled separately for
interrupt detection in the registers “High Int Z en”, “High Int Y en”, “High Int X en”, “Low Int Z
en”, “Low Int Y En” and “Low Int X En” in register 0x4D bit5-bit0. Overflow interrupt is shared for
X, Y and Z axis.

When the “Data Ready Pin En” bit (register 0x4E bit7) is set, the Data Ready (DRDY) interrupt
event is flagged on the magnetometer’s DRDY output pin (by default the “Data Ready Pin En”
bit is not set and DRDY pin is in high-Z state).
The interrupt status registers are updated together with writing new data into the magnetic field
data registers. The status bits for Low-/High-Threshold interrupts are located in register 0x4A,
the Data Ready (DRDY) status flag is located at register 0x48 bit0.

If an interrupt is disabled, all active status bits and pins are reset after the next measurement
was performed.
9.6.1 General features
An interrupt is cleared depending on the selected interrupt mode, which is common to all
interrupts. There are two different interrupt modes: non-latched and latched. All interrupts
(except Data Ready) can be latched or non-latched. Data Ready (DRDY) is always cleared
after readout of data registers ends.

A non-latched interrupt will be cleared on a new measurement when the interrupt condition is
not valid anymore, whereas a latched interrupt will stay high until the interrupts status register
(0x4A) is read out. After reading the interrupt status, both the interrupt status bits and the
interrupt pin are reset. The mode is selected by the “Interrupt latch” bit (register 0x4A bit1),
where the default setting of “1” means latched. Figure 22shows the difference between the
modes for the example Low-Threshold interrupt.

INT and DRDY pin polarity can be changed by the “Interrupt polarity” bit (register 0x4E bit0) and
“DR polarity” (register 0x4E bit2) from the default high active (“1”) to low active (“0”).

Low threshold

a a

measurements

INT pin (non-latched)

INT pin (latched)

Readings of interrupt status register (0x4A)

Figure 22: Interrupt latched and non-latched mode

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

9.6.2 Electrical behavior of magnetic interrupt pins

Both interrupt pins INT and DRDY are push/pull when the corresponding interrupt pin enable bit
is set, and are floating (High-Z) when the corresponding interrupt pin enable bit is disabled
(default).
9.6.3 Data ready / DRDY interrupt
This interrupt serves for synchronous reading of magnetometer data. It is generated after
storing a new set of values (DATAX, DATAY, DATAZ, RHALL) in the data registers:

Active measurement time Inactive time

Data write into

output registers

Preset time Measurement

Measurement Data
Dataprocessing
processing

DRDY =’1 ’

Measurement phase start

Data readout

Figure 23: Data acquisition and DRDY operation (DRDY in “high active” polarity)

The interrupt mode of the Data Ready (DRDY) interrupt is fixed to non-latched.
It is enabled (disabled) by writing “1” (“0”) to “Data Ready pin En” in register 0x4E bit7.

DRDY pin polarity can be changed by the “DR polarity” bit (register 0x4E bit2), from the default
high active (“1”) to low active (“0”).
9.6.4 Low-threshold interrupt
When the data registers’ (DATAX, DATAY and DATAZ) values drop below the threshold level
defined by the “Low Threshold register (0x4F), the corresponding interrupt status bits for those
axes are set (“Low Int X”, “Low Int Y” and “Low Int Z” in register 0x4A). This is done for each
axis independently. Please note that the X and Y axis value for overflow is -4096. However, no
interrupt is generated on these values. See chapter 10.7 for more information on overflow.

Hereby, one bit in “Low Threshold” corresponds to roughly 6µT (not exactly, as the raw
magnetic field values DATAX, DATAY and DATAZ are not temperature compensated).

The Low-threshold interrupt is issued on INT pin when one or more values of the data registers
DATAX, DATAY and DATAZ drop below the threshold level defined by the “Low Threshold”
register (0x4F), and when the axis where the threshold was exceeded is enabled for interrupt
generation:

Result = (DATAX < “Low Threshold” x 16) AND “Low Int X en” is “0” OR
(DATAY < “Low Threshold” x 16) AND “Low Int Y en” is “0” OR
(DATAZ < “Low Threshold” x 16) AND “Low Int Z en” is “0”

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Note: Threshold interrupt enable bits (“Low INT [XYZ] en”) are active low and “1” (disabled) by
default.

Low threshold
a a

measurements

INT pin (non-latched)

INT pin (latched) Read interrupt status

Figure 24: Low-threshold interrupt function

9.6.5 High-threshold interrupt

When the data registers’ (DATAX, DATAY and DATAZ) values exceed the threshold level
defined by the “High Threshold register (0x50), the corresponding interrupt status bits for those
axes are set (“High Int X”, “High Int Y” and “High Int Z” in register 0x4A). This is done for each
axis independently.
Hereby, one bit in “High Threshold” corresponds to roughly 6µT (not exactly, as the raw
magnetic field values DATAX, DATAY and DATAZ are not temperature compensated).

The High-threshold interrupt is issued on INT pin when one or more values of the data registers
DATAX, DATAY and DATAZ exceed the threshold level defined by the “High Threshold”
register (0x50), and when the axis where the threshold was exceeded is enabled for interrupt
generation:

Result = (DATAX > “High Threshold” x 16) AND “High Int X en” is “0” OR
(DATAY > “High Threshold” x 16) AND “High Int Y en” is “0” OR
(DATAZ > “High Threshold” x 16) AND “High Int Z en” is “0”

Note:
Threshold interrupt enable bits (“High INT [XYZ] en”) are active low and “1” (disabled) by
default.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

High threshold

a a

measurements

INT pin (non-latched)

INT pin (latched) Read interrupt status

Figure 25: High-threshold interrupt function

9.6.6 Overflow
When a measurement axis had an overflow, the corresponding data register is saturated to the
most negative value. For X and Y axis, the data register is set to the value -4096. For the Z
axis, the data register is set to the value -16384.
The “Overflow” flag (register 0x4A bit6) indicates that the measured magnetic field raw data of
one or more axes exceeded maximum range of the device. The overflow condition can be
flagged on the INT pin by setting the bit “overflow int enable” (register 0x4D bit6, active high,
default value “0”). The channel on which overflow occurred can by determined by assessing the
DATAX/Y/Z registers.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

10 Register description magnetometer

10.1 General remarks

The entire communication with the device’s magnetometer part is performed by reading from
and writing to registers. Registers have a width of 8 bits; they are mapped to a common space
of 50 addresses from (0x40) up to (0x71). Within the used range there are several registers
which are marked as ‘reserved’. Any reserved bit is ignored when it is written and no specific
value is guaranteed when read. Especially, in SPI mode the SDO pin may stay in high-Z state
when reading some of these registers.

Registers with addresses from (0x40) up to (0x4A) are read-only. Any attempt to write to these
registers is ignored.
10.2 Register map magnetometer

Register Address Default Value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
0x71 N/A
0x70 N/A
0x6F N/A
0x6E N/A
0x6D N/A
0x6C N/A
0x6B N/A
0x6A N/A
0x69 N/A
0x68 N/A
0x67 N/A
0x66 N/A
0x65 N/A
0x64 N/A
0x63 N/A
0x62 N/A reserved
0x61 N/A
0x60 N/A
0x5F N/A
0x5E N/A
0x5D N/A
0x5C N/A
0x5B N/A
0x5A N/A
0x59 N/A
0x58 N/A
0x57 N/A
0x56 N/A
0x55 N/A
0x54 N/A
0x53 N/A
0x52 0x00 REPZ Number Of Repetitions (valid for Z) [7:0]
0x51 0x00 REPXY Number Of Repetitions (valid for XY) [7:0]
0x50 0x00 High Threshold [7:0]
0x4F 0x00 Low Threshold [7:0]
0x4E 0x07 Data Ready Pin En Interrupt Pin En Channel Z Channel Y Channel X DR Polarity Interrupt Latch Interrupt Polarity
0X4D 0x3F Data Overrun En Overflow Int En High Int Z en High Int Y en High Int X en Low Int Z en Low Int Y en Low Int X en
0x4C 0x06 Adv. ST [1:0] Data Rate [2:0] Opmode [1:0] Self Test
0x4B 0x01 Soft Reset '1' fixed '0' fixed '0' fixed '0' fixed '0' SPI3en Soft Reset '1' Power Control Bit
0x4A 0x00 Data Overrun Overflow High Int Z High Int Y High Int X Low Int Z Low Int Y Low Int X
0x49 N/A RHALL [13:6] MSB
0x48 N/A RHALL [5:0] LSB fixed '0' Data Ready Status
0x47 N/A DATA Z [14:7] MSB
0x46 N/A DATA Z [6:0] LSB Z-Self-Test
0x45 N/A DATA Y [12:5] MSB
0x44 N/A DATA Y [4:0] LSB fixed '0' fixed '0' Y-Self-Test
0x43 N/A DATA X [12:5] MSB
0x42 N/A DATA X [4:0] LSB fixed '0' fixed '0' X-Self-Test
0x41 N/A reserved
0x40 0x32 Chip ID = 0x32 (can only be read if power control bit ="1")

w/r
w/r accessible
in suspend mode
read only
reserved

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

10.3 Chip ID magnetometer

MAG Register (0x40)

Chip ID contains the magnetometer chip identification number, which is 0x32. This number can
only be read if the power control bit (register 0x4B bit0) is enabled.

Table 39: Chip identification number, register (0x40)

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

0 0 1 1 0 0 1 0

MAG Register (0x41) is reserved

10.4 Magnetic field data

MAG Register (0x42)

Table 40: LSB part of x-axis magnetic field, register (0x42)

(0x42) Bit Name Description

Bit 7 DATAX_lsb <4> Bit 4 of x-axis magnetic field data
Bit 6 DATAX_lsb <3> Bit 3 of x-axis magnetic field data
Bit 5 DATAX_lsb <2> Bit 2 of x-axis magnetic field data
Bit 4 DATAX_lsb <1> Bit 1 of x-axis magnetic field data
Bit 3 DATAX_lsb <0> Bit 0 of x-axis magnetic field data = x LSB
Bit 2 - (fixed to 0)
Bit 1 - (fixed to 0)
Bit 0 SelfTestX Self-test result flag for x-axis, default is “1”

MAG Register (0x43)

Table 41: MSB part of x-axis magnetic field, register (0x43)

(0x43) Bit Name Description

Bit 7 DATAX_msb <12> Bit 12 of x-axis magnetic field data = x MSB
Bit 6 DATAX_msb <11> Bit 11 of x-axis magnetic field data
Bit 5 DATAX_msb <10> Bit 10 of x-axis magnetic field data
Bit 4 DATAX_msb <9> Bit 9 of x-axis magnetic field data
Bit 3 DATAX_msb <8> Bit 8 of x-axis magnetic field data
Bit 2 DATAX_msb <7> Bit 7 of x-axis magnetic field data
Bit 1 DATAX_msb <6> Bit 6 of x-axis magnetic field data
Bit 0 DATAX_msb <5> Bit 5 of x-axis magnetic field data

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

MAG Register (0x44)

Table 42: LSB part of y-axis magnetic field, register (0x44)

(0x44) Bit Name Description

Bit 7 DATAY_lsb <4> Bit 4 of y-axis magnetic field data
Bit 6 DATAY_lsb <3> Bit 3 of y-axis magnetic field data
Bit 5 DATAY_lsb <2> Bit 2 of y-axis magnetic field data
Bit 4 DATAY_lsb <1> Bit 1 of y-axis magnetic field data
Bit 3 DATAY_lsb <0> Bit 0 of y-axis magnetic field data = y LSB
Bit 2 - (fixed to 0)
Bit 1 - (fixed to 0)
Bit 0 SelfTestY Self-test result flag for y-axis, default is “1”

MAG Register (0x45)

Table 43: MSB part of y-axis magnetic field, register (0x45)

(0x45) Bit Name Description

Bit 7 DATAY_msb <12> Bit 12 of y-axis magnetic field data = y MSB
Bit 6 DATAY_msb <11> Bit 11 of y-axis magnetic field data
Bit 5 DATAY_msb <10> Bit 10 of y-axis magnetic field data
Bit 4 DATAY_msb <9> Bit 9 of y-axis magnetic field data
Bit 3 DATAY_msb <8> Bit 8 of y-axis magnetic field data
Bit 2 DATAY_msb <7> Bit 7 of y-axis magnetic field data
Bit 1 DATAY_msb <6> Bit 6 of y-axis magnetic field data
Bit 0 DATAY_msb <5> Bit 5 of y-axis magnetic field data

MAG Register (0x46)

Table 44: LSB part of z-axis magnetic field, register (0x46)

(0x46) Bit Name Description
Bit 7 DATAZ_lsb <6> Bit 6 of z-axis magnetic field data
Bit 6 DATAZ_lsb <5> Bit 5 of z-axis magnetic field data
Bit 5 DATAZ_lsb <4> Bit 4 of z-axis magnetic field data
Bit 4 DATAZ_lsb <3> Bit 3 of z-axis magnetic field data
Bit 3 DATAZ_lsb <2> Bit 2 of z-axis magnetic field data
Bit 2 DATAZ_lsb <1> Bit 1 of z-axis magnetic field data
Bit 1 DATAZ_lsb <0> Bit 0 of z-axis magnetic field data = z LSB
Bit 0 SelfTestZ Self-test result flag for z-axis, default is “1”

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

MAG Register (0x47)

Table 45: MSB part of z-axis magnetic field, register (0x47)

(0x47) Bit Name Description

Bit 7 DATAZ_msb <14> Bit 14 of y-axis magnetic field data = z MSB
Bit 6 DATAZ_msb <13> Bit 13 of y-axis magnetic field data
Bit 5 DATAZ_msb <12> Bit 12 of y-axis magnetic field data
Bit 4 DATAZ_msb <11> Bit 11 of y-axis magnetic field data
Bit 3 DATAZ_msb <10> Bit 10 of y-axis magnetic field data
Bit 2 DATAZ_msb <9> Bit 9 of y-axis magnetic field data
Bit 1 DATAZ_msb <8> Bit 8 of y-axis magnetic field data
Bit 0 DATAZ_msb <7> Bit 7 of y-axis magnetic field data

MAG Register (0x48)

Table 46: LSB part of hall resistance, register (0x48)

(0x48) Bit Name Description

Bit 7 RHALL_lsb <5> Bit 5 of hall resistance
Bit 6 RHALL_lsb <4> Bit 4 of hall resistance
Bit 5 RHALL_lsb <3> Bit 3 of hall resistance
Bit 4 RHALL_lsb <2> Bit 2 of hall resistance
Bit 3 RHALL_lsb <1> Bit 1 of hall resistance
Bit 2 RHALL_lsb <0> Bit 0 of hall resistance = RHALL LSB
Bit 1 - (fixed to 0)
Bit 0 Data Ready Status Data ready (DRDY) status bit

MAG Register (0x49)

Table 47: MSB part of hall resistance, register (0x49)

(0x49) Bit Name Description

Bit 7 RHALL_msb <13> Bit 13 of hall resistance = RHALL MSB
Bit 6 RHALL_msb <12> Bit 12 of hall resistance
Bit 5 RHALL_msb <11> Bit 11 of hall resistance
Bit 4 RHALL_msb <10> Bit 10 of hall resistance
Bit 3 RHALL_msb <9> Bit 9 of hall resistance
Bit 2 RHALL_msb <8> Bit 8 of hall resistance
Bit 1 RHALL_msb <7> Bit 7 of hall resistance
Bit 0 RHALL_msb <6> Bit 6 of hall resistance

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

10.5 Interrupt status register magnetometer

MAG Register (0x4A)

Table 48: Interrupt status, register (0x4A)

(0x4A) Bit Name Description

Bit 7 Data overrun Data overrun status flag
Bit 6 Overflow Overflow status flag
Bit 5 High Int Z High-Threshold interrupt z-axis status flag
Bit 4 High Int Y High-Threshold interrupt y-axis status flag
Bit 3 High Int X High-Threshold interrupt x-axis status flag
Bit 2 Low Int Z Low-Threshold interrupt z-axis status flag
Bit 1 Low Int Y Low-Threshold interrupt y-axis status flag
Bit 0 Low Int X Low-Threshold interrupt x-axis status flag

10.6 Power and operation modes, self-test, data output rate control registers

MAG Register (0x4B)

Register (0x4B) contains control bits for power control, soft reset and interface SPI mode
selection. This special control register is also accessible in suspend mode.

Soft reset is executed when both bits (register 0x4B bit7 and bit1) are set “1”. Soft reset does
not execute a full POR sequence, but all registers are reset except for the “trim” registers above
register 0x54 and the power control register (0x4B). Soft reset always brings the device into
sleep mode. When device is in the suspend mode, soft reset is ignored and the device remains
in suspend mode. The two “Soft Reset” bits are reset to “0” automatically after soft reset was
completed. To perform a full POR reset, bring the device into suspend and then back into sleep
mode.
When SPI mode is selected, the “SPI3En” bit enables SPI 3-wire mode when set “1”. When
“SPI3En” is set “0” (default), 4-wire SPI mode is selected.
Setting the “Power Control bit” to “1” brings the device up from Suspend mode to Sleep mode,
when “Power Control bit” is set “0” the device returns to Suspend mode (see chapter 9.2 for
details of magnetometer power modes).

Table 49: Power control, soft reset and SPI mode control register (0x4B)

(0x4B) Bit Name Description

Bit 7 Soft Reset ‘1’ One of the soft reset trigger bits.
Bit 6 - (fixed to 0)
Bit 5 - (fixed to 0)
Bit 4 - (fixed to 0)
Bit 3 - (fixed to 0)
Bit 2 SPI3en Enable bit for SPI3 mode
Bit 1 Soft Reset ‘1’ One of the soft reset trigger bits.
Bit 0 Power Control bit When set to “0”, suspend mode is selected

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

MAG Register (0x4C)

The two “Adv. ST” bits control the on-chip advanced self-test (see chapter 9.4 for details of the
magnetometer advanced self-test).

The three “Data rate” bits control the magnetometer output data rate according to below Table
51.

The two “Opmode” bits control the operation mode according to below Table 52 (see chapter
9.2 for a detailed description of magnetometer power modes).

Table 50: Operation mode, output data rate and self-test control register (0x4C)

(0x4C) Bit Name Description

Bit 7 Adv. ST <1> Advanced self-test control bit 1
Bit 6 Adv. ST <0> Advanced self-test control bit 0
Bit 5 Data rate <2> Data rate control bit 2
Bit 4 Data rate <1> Data rate control bit 1
Bit 3 Data rate <0> Data rate control bit 0
Bit 2 Opmode <1> Operation mode control bit 1
Bit 1 Opmode <0> Operation mode control bit 0
Bit 0 Self Test Normal self-test control bit

Three “Data rate” bits control the output data rate (ODR) of the magnetometer part:

Table 51: Output data rate (ODR) setting (0x4C)

(0x4C) Magnetometer output data rate

Data rate <2:0> (ODR) [Hz]
000b 10 (default)
001b 2
010b 6
011b 8
100b 15
101b 20
110b 25
111b 30

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Two “Opmode” bits control the operation mode of the magnetometer part:

Table 52: Operation mode setting (0x4C)

9
(0x4C) Magnetometer operation mode
Opmode <1:0>
00b Normal mode
01b Forced mode
10b Reserved, do not use
11b Sleep Mode

10.7 Interrupt and axis enable settings control registers

MAG Register (0x4D)

Register (0x4D) contains control bits for interrupt settings. (Also refer to chapter 9.6 for the
details of magnetometer interrupt operation).

Table 53: Interrupt settings control register (0x4D)

(0x4D) Bit Name Description

Bit 7 Data Overrun En Enables data overrun indication in the “Data Overrun” flag
(active high, default is “0” disabled)
Bit 6 Overflow Int En Activates mapping of Overflow flag status to the INT pin
(active high, default is “0” disabled)
Bit 5 High Int Z En Enables the z-axis detection for High-Threshold interrupts
(active low, default is “1” disabled)
Bit 4 High Int Y En Enables the y-axis detection for High-Threshold interrupts
(active low, default is “1” disabled)
Bit 3 High Int X En Enables the x-axis detection for High-Threshold interrupts
(active low, default is “1” disabled)
Bit 2 Low Int Z En Enables the z-axis detection for Low-Threshold interrupts
(active low, default is “1” disabled)
Bit 1 Low Int Y En Enables the y-axis detection for Low-Threshold interrupts
(active low, default is “1” disabled)
Bit 0 Low Int X En Enables the x-axis detection for Low-Threshold interrupts
(active low, default is “1” disabled)

9
See chapter 9.2 for a detailed description of magnetometer power modes.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

MAG Register (0x4E)

Register (0x4E) contains control bits interrupt settings and axes enable bits. (Also refer to
chapter 9.6 for the details of magnetometer interrupt operation). If a magnetic measurement
channel is disabled, its last measured magnetic output values will remain in the data registers. If
the Z channel is disabled, the resistance measurement will also be disabled and the resistance
output value will be set to zero. If interrupts are set to trigger on an axis that has been disabled,
these interrupts will still be asserted based on the last measured value.

Table 54: Interrupt settings and axes enable bits control register (0x4E)

(0x4E) Bit Name Description

Bit 7 Data Ready Pin En Enables data ready status mapping on DRDY pin
(active high, default is “0” disabled)
Bit 6 Interrupt Pin En Enables interrupt status mapping on INT pin
(active high, default is “0” disabled)
Bit 5 Channel Z Enable z-axis and resistance measurement
(active low, default is “0” enabled)
Bit 4 Channel Y Enable y-axis
(active low, default is “0” enabled)
Bit 3 Channel X Enable x-axis
(active low, default is “0” enabled)
Bit 2 DR Polarity Data ready (DRDY) pin polarity
(“0” is active low, “1” is active high, default is “1” active
high)
Bit 1 Interrupt Latch Interrupt latching
(“0” means non-latched - interrupt pin is on as long as the
condition is fulfilled, “1” means latched - interrupt pin is on
until interrupt status register 0x4A is read, default is ‘”1”
latched)
Bit 0 Interrupt Polarity Interrupt pin INT polarity selection
(“1” – is active high, “0” is active low, default is “1” active
high)

MAG Register (0x4F)

Register (0x4F) contains the Low-Threshold interrupt threshold setting. (Also refer to
chapter 9.6 for the details of magnetometer interrupt operation and the threshold setting).

Table 55: Low-threshold interrupt threshold setting control register (0x4F)

(0x4F) Bit Name Description

Bit 7 LowThreshold <7> Bit 7 of Low-Threshold interrupt threshold setting
Bit 6 LowThreshold <6> Bit 6 of Low-Threshold interrupt threshold setting
Bit 5 LowThreshold <5> Bit 5 of Low-Threshold interrupt threshold setting
Bit 4 LowThreshold <4> Bit 4 of Low-Threshold interrupt threshold setting
Bit 3 LowThreshold <3> Bit 3 of Low-Threshold interrupt threshold setting
Bit 2 LowThreshold <2> Bit 2 of Low-Threshold interrupt threshold setting
Bit 1 LowThreshold <1> Bit 1 of Low-Threshold interrupt threshold setting
Bit 0 LowThreshold <0> Bit 0 of Low-Threshold interrupt threshold setting

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

MAG Register (0x50)

Register (0x50) contains the High-Threshold interrupt threshold setting. (Also refer to
chapter 9.6 for the details of magnetometer interrupt operation and the threshold setting).

Table 56: High-threshold interrupt threshold setting control register (0x4F)

(0x50) Bit Name Description

Bit 7 HighThreshold <7> Bit 7 of High-Threshold interrupt threshold setting
Bit 6 HighThreshold <6> Bit 6 of High-Threshold interrupt threshold setting
Bit 5 HighThreshold <5> Bit 5 of High-Threshold interrupt threshold setting
Bit 4 HighThreshold <4> Bit 4 of High-Threshold interrupt threshold setting
Bit 3 HighThreshold <3> Bit 3 of High-Threshold interrupt threshold setting
Bit 2 HighThreshold <2> Bit 2 of High-Threshold interrupt threshold setting
Bit 1 HighThreshold <1> Bit 1 of High-Threshold interrupt threshold setting
Bit 0 HighThreshold <0> Bit 0 of High-Threshold interrupt threshold setting

10.8 Number of repetitions control registers

MAG Register (0x51)

Register (0x51) contains the number of repetitions for x/y-axis. Table 58 below shows the
number of repetitions resulting out of the register configuration. The performed number of
repetitions nXY can be calculated from unsigned register value as nXY = 1+2xREPXY as
shown below, where b7-b0 are the bits 7 to 0 of register 0x51:
nXY  1  2  (b 7  2 7  b 6  2 6  b 5  25  b 4  2 4  b 3  23  b 2  2 2  b1  21  b 0  2 0 )
 1  2  (REPXY )

Table 57: X/y-axis repetitions control register (0x51)

(0x51) Bit Name Description

Bit 7 REPXY <7> Bit 7 of number of repetitions (valid for XY)
Bit 6 REPXY <6> Bit 6 of number of repetitions (valid for XY)
Bit 5 REPXY <5> Bit 5 of number of repetitions (valid for XY)
Bit 4 REPXY <4> Bit 4 of number of repetitions (valid for XY)
Bit 3 REPXY <3> Bit 3 of number of repetitions (valid for XY)
Bit 2 REPXY <2> Bit 2 of number of repetitions (valid for XY)
Bit 1 REPXY <1> Bit 1 of number of repetitions (valid for XY)
Bit 0 REPXY <0> Bit 0 of number of repetitions (valid for XY)

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Table 58: Numbers of repetition for x/y-axis depending on value of register (0x51)

(0x51) register (0x51) register value Number of repetitions for x- and y-axis each
value (binary) (hex)
00000000b 0x00h 1
00000001b 0x01h 3
00000010b 0x02h 5
00000011b 0x03h 7
… …
11111111b 0xFFh 511

MAG Register (0x52)

Register (0x52) contains the number of repetitions for z-axis. Table 60 below shows the number
of repetitions resulting out of the register configuration. The performed number of repetitions nZ
can be calculated from unsigned register value as nZ = 1+REPZ as shown below, where b7-b0
are the bits 7 to 0 of register 0x52:
nZ  1  1  (b 7  27  b 6  26  b 5  25  b 4  24  b 3  23  b 2  22  b1  21  b 0  20 )
 1  REPZ

Table 59: Z-axis repetitions control register (0x52)

(0x52) Bit Name Description

Bit 7 REPZ <7> Bit 7 of number of repetitions (valid for Z)
Bit 6 REPZ <6> Bit 6 of number of repetitions (valid for Z)
Bit 5 REPZ <5> Bit 5 of number of repetitions (valid for Z)
Bit 4 REPZ <4> Bit 4 of number of repetitions (valid for Z)
Bit 3 REPZ <3> Bit 3 of number of repetitions (valid for Z)
Bit 2 REPZ <2> Bit 2 of number of repetitions (valid for Z)
Bit 1 REPZ <1> Bit 1 of number of repetitions (valid for Z)
Bit 0 REPZ <0> Bit 0 of number of repetitions (valid for Z)

Table 60: Numbers of repetition for z-axis depending on value of register (0x52)

(0x52) register (0x52) register Number of repetitions for z-axis

value (binary) value
(hex)
00000000b 0x00h 1
00000001b 0x01h 2
00000010b 0x02h 3
00000011b 0x03h 4
… …
11111111b 0xFFh 256

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

11 Digital interface of the device

The BMX055 supports two serial digital interface protocols for communication as a slave with a
host device: SPI (4-wire and 3-wire) and I²C. The active interface is selected by the state of the
Pin#07 (PS) ‘protocol select’ pin: ´GND´ (´VDDIO´) selects SPI (I²C). For details please refer to
section 11.
By default, SPI operates in the standard 4-wire configuration. It can be re-configured by
software to work in 3-wire mode instead of standard 4-wire mode.

Both digital interfaces share partly the same pins. Additionally each inertial sensor
(accelerometer and gyroscope) provides specific interface pins which allow the user to operate
the inertial sensors independently of each other. The mapping for each interface and each
inertial sensor is given in the following table:

Table 61: Mapping of the interface pins

Pin use w/ use w/

Name Description
# SPI I²C
SPI: Accel&Mag Data Output (4-wire mode)
17 SDOAM SDOAM address
I²C: Used to set LSB of Accel&Mag I²C address
SPI: Gyro Data Output (4-wire mode)
12 SDOG SDOG address
I²C: Used to set LSB of Gyro I²C address
SPI: Data In (4-wire mode) & Data In/Out (3-wire
11 SDx SDI SDA
mode) I²C: Serial Data

16 CSBA CSBA unused SPI: Accel Chip Select (enable)

5 CSBG CSBG unused SPI: Gyro Chip Select (enable)

SPI:Mag Chip Select(enable)

20 CSBM CSBM address
I²C: Used to set LSB of Mag I²C address
SPI: Serial Clock SCK
9 SCx SCK SCL
I²C: Serial Clock SCL

The following table shows the electrical specifications of the interface pins:

Table 62: Electrical specification of the interface pins

Parameter Symbol Condition Min Typ Max Units

Internal Pull-up
Pull-up Resistance,
Rup Resistance to 75 100 125 k
CSB pin
VDDIO

Input Capacitance Cin 5 10 pF

I²C Bus Load
Capacitance (max. CI2C_Load 400 pF
drive capability)

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

11.1 Serial peripheral interface (SPI)

The timing specification for SPI of the BMX055 is given in the following table:

Table 63: SPI timing

Parameter Symbol Condition Min Max Units

Max. Load on
SDI or SDO =
10 MHz
Clock Frequency fSPI 25pF, VDDIO ≥
1.62V
VDDIO < 1.62V 7.5 MHz
SCK Low Pulse tSCKL 20 ns
SCK High Pulse tSCKH 20 ns
SDI Setup Time tSDI_setup 20 ns
SDI Hold Time tSDI_hold 20 ns
Load = 25pF,
30 ns
VDDIO ≥ 1.62V
Load = 25pF,
SDO Output Delay tSDO_OD 50 ns
VDDIO < 1.62V
Load = 250pF,
40 ns
VDDIO > 2.4V
CSB Setup Time tCSB_setup 20 ns
CSB Hold Time tCSB_hold 40 ns
Idle time between
write accesses,
normal mode, tIDLE_wacc_nm 2 µs
standby mode, low-
power mode 2
Idle time between
write accesses,
tIDLE_wacc_sum 450 µs
suspend mode, low-
power mode 1

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The following figure shows the definition of the SPI timings:

tCSB_setup tCSB_hold

CSB

SCK
tSCKL tSCKH
SDI
tSDI_setup tSDI_hold
SDO
tSDO_OD

Figure 26: SPI timing diagram

The SPI interface of the BMX055 is compatible with two modes, ´00´ and ´11´. The automatic
selection between [CPOL = ´0´ and CPHA = ´0´] and [CPOL = ´1´ and CPHA = ´1´] is controlled
based on the value of SCK after a falling edge of CSB (A,G or M).

Two configurations of the SPI interface are supported by the BMX055: 4-wire and 3-wire. The
same protocol is used by both configurations. The device operates in 4-wire configuration by
default. It can be switched to 3-wire configuration by writing ´1´ to (ACC 0x34) spi3 and to (GYR
0x34) spi3. Pin SDI is used as the common data pin in 3-wire configuration.
For single byte read as well as write operations, 16-bit protocols are used. The BMX055 also
supports multiple-byte read operations.

In SPI 4-wire configuration CSB (A,G or M - chip select low active), SCK (serial clock), SDI
(serial data input), and SDO (AM or G - serial data output) pins are used. The communication
starts when the CSB (1 or 2) is pulled low by the SPI master and stops when CSB (A,G or M) is
pulled high. SCK is also controlled by SPI master. SDI and SDO (AM or G) are driven at the
falling edge of SCK and should be captured at the rising edge of SCK.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The basic write operation waveform for 4-wire configuration is depicted in Figure 27. During the
entire write cycle SDO remains in high-impedance state.

CSB

SCK

SDI

R/W AD6 AD5 AD4 AD3 AD2 AD1 AD0 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0

SDO Z
tri-state

Figure 27: 4-wire basic SPI write sequence (mode ´11´)

The basic read operation waveform for 4-wire configuration is depicted in Figure 28:

CSB

SCK

SDI

R/W AD6 AD5 AD4 AD3 AD2 AD1 AD0

SDO

DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 tri-state

Figure 28: 4-wire basic SPI read sequence (mode ´11´)

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The data bits are used as follows:

Bit0: Read/Write bit. When 0, the data SDI is written into the chip. When 1, the data SDO from
the chip is read.

Bit1-7: Address AD(6:0).

Bit8-15: when in write mode, these are the data SDI, which will be written into the address.
When in read mode, these are the data SDO, which are read from the address.

Multiple read operations are possible by keeping CSB low and continuing the data transfer.
Only the first register address has to be written. Addresses are automatically incremented after
each read access as long as CSB stays active low.

The principle of multiple read is shown in Figure 29:

Control byte Data byte Data byte Data byte

Start RW Register adress (02h) Data register - adress 02h Data register - adress 03h Data register - adress 04h Stop

CSB CSB
= 1 0 0 0 0 0 1 0 X X X X X X X X X X X X X X X X X X X X X X X X =
0 1

Figure 29: SPI multiple read

In SPI 3-wire configuration CSB (A,G or M - chip select low active), SCK (serial clock), and
SDI (serial data input and output) pins are used. The communication starts when the CSB is
pulled low by the SPI master and stops when CSB is pulled high. SCK is also controlled by SPI
master. SDI is driven (when used as input of the device) at the falling edge of SCK and should
be captured (when used as the output of the device) at the rising edge of SCK.

The protocol as such is the same in 3-wire configuration as it is in 4-wire configuration. The
basic operation wave-form (read or write access) for 3-wire configuration is depicted in Figure
30.

CSB

SCK

SDI

RW AD6 AD5 AD4 AD3 AD2 AD1 AD0 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0

Figure 30: 3-wire basic SPI read or write sequence (mode ´11´)

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

11.2 Inter-Integrated Circuit (I²C)

The I²C bus uses SCL (= SCx pin, serial clock) and SDA (= SDx pin, serial data input and
output) signal lines. Both lines are connected to VDDIO externally via pull-up resistors so that they
are pulled high when the bus is free.

The I²C interface of the BMX055 is compatible with the I²C Specification UM10204 Rev. 03 (19
June 2007), available at [Link] The BMX055 supports I²C standard mode and
fast mode, only 7-bit address mode is supported. For VDDIO = 1.2V to 1.8V the guaranteed
voltage output levels are slightly relaxed as described in the Parameter Specification (Table 1).

When in I²C mode, the BMX055 will work effectively as three I²C-Slave devices. The BMX055 is
not addressed by a single I²C-Address. Instead, the I²C Master (Application processor) should
use a different I²C-Address for each component (Accel, Gyro and Magnet) depending on the
needed data.

In addition to that, the I²C-Address of each component (Accel, Gyro and Magnet) can be
configured by changing the levels in SDO1, SDO2 and CSB3.

The default I²C address of the accelerometer device is 0011000b (0x18) and of the gyro device
is 1101000b (0x68). It is used if the SDO1 (AM and G) pin is pulled to ´GND´. The alternative
accel address 0011001b (0x19) and/or the alternative gyro address 1101001b (0x69) is
selected by pulling the SDO2 (AM and/or G) pin to ´VDDIO´.

The default I2C address of the magnetic device is 0010000b (0x10). The five MSB are
hardwired to “00100”. Alternative addresses of the magnetic device can be selected fixing the
value of SDO or CSB lines. bit0 can be set to “1” by pulling the SDO1 pin to ´VDDIO´. bit1 can be
set to “1” by pulling the CSB3 line pin to ´VDDIO´.

For all I2C address combination of the BMX055, please refer to the following table.

Table 64 I2C address

SDO1 SDO2 CSB3 I²C- I²C- I²C-
Addr_Accel Addr_Gyro Addr_magnet
GND GND GND 0x18 0x68 0x10
GND GND Vddio 0x18 0x68 0x12
GND Vddio GND 0x18 0x69 0x10
GND Vddio Vddio 0x18 0x69 0x12
Vddio GND GND 0x19 0x68 0x11
Vddio GND Vddio 0x19 0x68 0x13
Vddio Vddio GND 0x19 0x69 0x11
Vddio Vddio Vddio 0x19 0x69 0x13

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The timing specification for I²C of the BMX055 is given in Table 64:

Table 64: I²C timings

Parameter Symbol Condition Min Max Units

Clock Frequency fSCL 400 kHz
SCL Low Period tLOW 1.3
SCL High Period tHIGH 0.6
SDA Setup Time tSUDAT 0.1
SDA Hold Time tHDDAT 0.0
Setup Time for a
repeated Start tSUSTA 0.6
Condition s
Hold Time for a Start
tHDSTA 0.6
Condition
Setup Time for a Stop
tSUSTO 0.6
Condition
Time before a new
Transmission can tBUF 1.3
start
Idle time between
write accesses,
tIDLE_wacc_n
normal mode, standby 2 µs
m
mode, low-power
mode 2
Idle time between
write accesses, tIDLE_wacc_s
450 µs
suspend mode, low- um
power mode 1

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

shows the definition of the I²C timings given in Table 64:

SDA

tBUF

tf
tLOW

SCL

tHIGH
tHDSTA tr tHDDAT
tSUDAT

SDA

tSUSTA
tSUSTO

Figure 31: I²C timing diagram

The I²C protocol works as follows:

START: Data transmission on the bus begins with a high to low transition on the SDA line while
SCL is held high (start condition (S) indicated by I²C bus master). Once the START signal is
transferred by the master, the bus is considered busy.

STOP: Each data transfer should be terminated by a Stop signal (P) generated by master. The
STOP condition is a low to HIGH transition on SDA line while SCL is held high.

ACK: Each byte of data transferred must be acknowledged. It is indicated by an acknowledge

bit sent by the receiver. The transmitter must release the SDA line (no pull down) during the
acknowledge pulse while the receiver must then pull the SDA line low so that it remains stable
low during the high period of the acknowledge clock cycle.

In the following diagrams these abbreviations are used:

S Start
P Stop
ACKS Acknowledge by slave
ACKM Acknowledge by master
NACKM Not acknowledge by master
RW Read / Write

A START immediately followed by a STOP (without SCL toggling from ´VDDIO´ to ´GND´) is not
supported. If such a combination occurs, the STOP is not recognized by the device.

I²C write access:

I²C write access can be used to write a data byte in one sequence.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The sequence begins with start condition generated by the master, followed by 7 bits slave
address and a write bit (RW = 0). The slave sends an acknowledge bit (ACK = 0) and releases
the bus. Then the master sends the one byte register address. The slave again acknowledges
the transmission and waits for the 8 bits of data which shall be written to the specified register
address. After the slave acknowledges the data byte, the master generates a stop signal and
terminates the writing protocol.

Example of an I²C write access to the accelerometer:

Control byte Data byte

Start Slave Adress RW ACKS Register adress (0x10) ACKS Data (0x09) ACKS Stop

S 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 X X X X X X X X P

Figure 32: I²C write

I²C read access:

I²C read access also can be used to read one or multiple data bytes in one sequence.

A read sequence consists of a one-byte I²C write phase followed by the I²C read phase. The
two parts of the transmission must be separated by a repeated start condition (Sr). The I²C write
phase addresses the slave and sends the register address to be read. After slave
acknowledges the transmission, the master generates again a start condition and sends the
slave address together with a read bit (RW = 1). Then the master releases the bus and waits for
the data bytes to be read out from slave. After each data byte the master has to generate an
acknowledge bit (ACK = 0) to enable further data transfer. A NACKM (ACK = 1) from the
master stops the data being transferred from the slave. The slave releases the bus so that the
master can generate a STOP condition and terminate the transmission.
The register address is automatically incremented and, therefore, more than one byte can be
sequentially read out. Once a new data read transmission starts, the start address will be set to
the register address specified in the latest I²C write command. By default the start address is
set at 0x00. In this way repetitive multi-bytes reads from the same starting address are possible.

In order to prevent the I²C slave of the device to lock-up the I²C bus, a watchdog timer (WDT) is
implemented. The WDT observes internal I²C signals and resets the I²C interface if the bus is
locked-up by the BMX055. The activity and the timer period of the WDT can be configured
through the bits (ACC 0x34) plus (GYR 0x34) i2c_wdt_en and (ACC 0x34) plus (GYR 0x34)
i2c_wdt_sel.

Writing ´1´ (´0´) to (ACC 0x34) i2c_wdt_en plus (GYR 0x34) i2c_wdt_en activates (de-activates)
the WDT. Writing ´0´ (´1´) to (ACC 0x34) i2c_wdt_en plus (GYR 0x34) i2c_wdt_se selects a
timer period of 1 ms (50 ms).

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Example of an I²C read access to the accelerometer:

Control byte

dummy
Start Slave Adress RW ACKS Register adress (0x02) ACKS

S 0 0 1 1 0 0 0 0 X 0 0 0 0 0 1 0

Data byte Data byte

Start Slave Adress RW ACKS Read Data (0x02) ACKM Read Data (0x03) ACKM

Sr 0 0 1 1 0 0 0 1 X X X X X X X X X X X X X X X X …

Data byte Data byte

Read Data (0x04) ACKM Read Data (0x05) ACKM

… X X X X X X X X X X X X X X X X …

Data byte Data byte

Read Data (0x06) ACKM Read Data (0x07) NACK Stop

… X X X X X X X X X X X X X X X X P

Figure 33: I²C multiple read

11.2.1 SPI and I²C Access Restrictions

In order to allow for the correct internal synchronisation of data written to the BMX055, certain
access restrictions apply for consecutive write accesses or a write/read sequence through the
SPI as well as I2C interface. The required waiting period depends on whether the device is
operating in normal mode or other modes according to chapters 5.1, 7.1, 9.1.

As illustrated in Figure 34, an interface idle time of at least 2 µs is required following a write
operation when the device operates in normal mode. In suspend mode an interface idle time of
least 450 µs is required.
X-after-Write

Write-Operation X-Operation

Register Update Period

(> 2us / 450us)

Figure 34: Post-Write Access Timing Constraints

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

12 FIFO Operation

12.1 FIFO Operating Modes

The BMX055 features 2 integrated FIFO memories capable of storing up to 32 frames of
accelerometer data and 100 frames of gyroscope data in FIFO mode. Conceptually each frame
consists of three 16 bit words corresponding to the x, y and z- axis of the accelerometer and the
gyro, which are sampled at the same point in time. The FIFO is a buffer memory, which can be
configured to operate in the following modes:

 FIFO Mode: In FIFO mode the X, Y and Z acceleration- and rate data of the selected
axes and sensors are stored in the buffer memory. If enabled, a watermark interrupt is
triggered when the buffer has filled up to a configurable level. The buffer will be
continuously filled until the fill level reaches 32 frames for the accelerometer and 100
frames for the gyroscope. When it is full the data collection is stopped, and all additional
samples are ignored. Once the buffer is full, a FIFO-full interrupt is generated if it has
been enabled.

 STREAM Mode: In STREAM mode the X, Y and Z acceleration- and rate data of the
selected axes are stored in the buffer until it is full. The buffer has a depth of 31 frames
of accelerometer data and 99 frames of gyro data. When the buffer is full the data
collection continues and oldest entry is discarded. If enabled, a watermark interrupt is
triggered when the buffer is filled to a configurable level. Once the buffer is full, a FIFO-
full interrupt is generated if it has been enabled.

 BYPASS Mode: In bypass mode, only the current sensor data can be read out from the
FIFO address. Essentially, the FIFO behaves like the STREAM mode with a depth of 1.
Compared to reading the data from the normal data registers, the advantage to the user
is that the packages X, Y, Z are from the same timestamp, while the data registers are
updated sequentially and hence mixing of data from different axes can occur.

The primary FIFO operating mode is selected with register (ACC 0x3E) <7:6> and (GYR 0x0E)
<7:6> according to Table 65. When reading register (ACC 0x3E) <7:6> and (GYR 0x0E) <7:6>
the current operating mode is given. Writing to (ACC 0x3E) <7:6> and (GYR 0x0E) <7:6> clears
and resets the buffer and resets the FIFO-full and watermark interrupt.

Table 65: FIFO operating mode selection

Address: 0x3E
FIFO
bits<7:6> Function
Mode
mode<1:0>
‘00’ (Default) BYPASS buffer depth of 1 frame; old data are discarded
‘01’ FIFO data collection stops when buffer is full
when buffer full: sampling continues, old data
‘10’ STREAM
discarded
‘11’ Reserved

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

12.2 FIFO Data Readout

The FIFO stores the data that are also available at the read-out registers (ACC 0x02) to (ACC
0x07) for the accelerometer and/or (GYR 0x02) to (GYR 0x07) for the gyroscope. Thus, all
configuration settings apply to the FIFO data as well as the data readout registers. The FIFO
read out is possible through register (ACC 0x3F) bits <7:0> and/or (GYR 0x3F) bits <7:0>. The
readout can be performed using burst mode since the read address counter is no longer
incremented, when it has reached address (0x3F). This implies that the trapping also occurs
when the burst read access starts below address (0x3F). A single burst can read out one or
more frames at a time. If a frame is not read completely due to an incomplete read operation,
the remaining part of the frame is lost. In this case the FIFO aligns to the next frame during the
next read operation. The address (ACC 0x3E) bits<1:0> (data_select) or (GYR 0x3E) bits<1:0>
(data_select) allows the user to select the data stored in the FIFO according to Table 66.
Writing to data_select<1:0> clears the FIFO buffer.

Table 66: FIFO data selection

Address: ACC 0x3E and GYR 0x3E

data of axis stored in FIFO
bits<1:0> data_select
‘00’ (Default) X,Y,Z (plus INT_status0,1 for GYRO)
‘01’ X only
‘10’ Y only
‘11’ Z only

Address: GYR 0x3D bit 7 tag Interrupt data stored in FIFO

‘0’ (Default) Do not collect Interrupts for Gyro
‘1’ Collect Interrupts for Gyro

12.2.1 Data readout Accelerometer

If all axes and tag are enabled, the format of the data read-out from (ACC 0x3F) fifo_data<7:0>
is as follows:

If all axes are enabled, the format of the data read-out from (ACC 0x3F) is as follows:

… X LSB X MSB Y LSB Y MSB Z LSB Z MSB …

Frame 1

If only one axis is enabled, the format of the data read-out from (ACC 0x3F) is as follows
(example shown: y-axis only, other axes are equivalent).

Y LSB YSB Y LSB Y MSB …

Frame 1 Frame 2

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

If a frame is not completely read due to an incomplete read operation, the remaining part of the
frame is discarded. In this case the FIFO aligns to the next frame during the next read
operation. In order for the discarding mechanism to operate correctly, there must be a delay of
at least 1.5 µs between the last data bit of the partially read frame and the first address bit of
the next FIFO read access. Otherwise frames must not be read out partially.

If the FIFO is read beyond the FIFO fill level zeroes (0) will be read. If the FIFO is read beyond
the FIFO fill level the read or burst read access time must not exceed the sampling time tSAMPLE.
Otherwise frames may be lost.
12.2.2 Data readout Gyroscope
If all axes and tag are enabled, the format of the data read-out from (GYR 0x3F) fifo_data<7:0>
is as follows:
Int. status Bits

X LSB X MSB Y LSB Y MSB Z LSB Z MSB Int_status 0 Int_status 1 …

Frame 1 ( 8 Bytes)

If only one axis is enabled (and tag is disabled), the format of the data read-out from register
fifo_data<7:0> is as follows (example shown: Y-axis only, other axis are equivalent). The buffer
depth of the FIFO is independent of the fact whether all or a single axis have been selected.

Y LSB Y MSB Y LSB Y MSB …

Frame 1 Frame 2

12.2.3 External FIFO synchronization (EFS) for the gyroscope

In addition to the explained data format for the angular rate and interrupt data, the FIFO of the
gyroscope features a mode that allows the precise synchronization of external event with the
gyroscope angular rate and gyroscope interrupts saved in the internal FIFO. This
synchronization can be used for example for image and video stabilization applications. The
EFS Mode can be used in the operating modes FIFO-Mode and STREAM-Mode but not in
BYPASS-Mode.

In order to use the EFS capability, any of the gyroscope interrupt pins (INT3 or INT4) can be
reconfigured to act as EFS-pin, but not both. In addition, the EFS-Mode has to be enabled. The
so configured interrupt pin will then behave as an input pin and not as an interrupt pin. The
working principle is shown in below figure:

EFS-pin

0
FIFO Z(0) 0 0 1 1 1 0

Figure 35: Timing diagram for external FIFO synchronization.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The EFS-pin depicted in Figure 35 is the Interrupt pin configured as EFS-Mode. FIFO z(0) is the
least significant bit of the z-axis gyro data stored in the FIFO.

In order to enable the EFS-Mode the register (GYR 0x34) bit<5> must be set to “1”. To select
the INT4 pin as EFS-pin, set the register (GYR 0x34) bit<4> to “1”. To select the INT3 pin as
EFS-pin, set the register (GYR 0x34) bit<4> to “0”.
In this Mode, the least significant bit of the z-axis is used as tag-bit, therefore losing its meaning
as gyroscope data bit. The remaining 15 bits of the z-axis gyroscope data keep the same
meaning as in standard mode.

Once the EFS-pin is set to high level, the next FIFO word will be marked with an EFS-tag (z-
axis LSB = 1). While the EFS-pin is kept at a High level, the corresponding FIFO words would
be always marked with an EFS-tag. After the EFS-pin is reset to low level, the immediate next
FIFO word could still be marked with the EFS-tag and only after this word, the next EFS-tag will
be reset (z-axis LSB=0). This is shown in the above diagram.

The EFS-tag synchronizes external events with the same time precision as the FIFO update
rate. Therefore update rate of the EFS-tag is determined by the output data rate and can be set
from 100Hz up to 2,000Hz. For more information consult the register (GYR 0x10) (BW) in the
register description.
[Link] Interface speed requirements for Gyroscope FIFO use
In order to use the FIFO effectively, larger blocks of data need to be read out quickly.
Depending on the output data rate of the sensor, this can impose requirements on the interface.

The output data rate of the gyroscope is determined by the filter configuration (see chapter 8.2).
What interface speed is required depends on the selected rate.

 For an I2C speed of 400 kHz, every filter mode can be used.
2
 For an I C speed of 200 kHz, only modes with an output data rate of 1 KHz and below
are recommended.
2
 For an I C speed of 100 kHz, only modes with an output data rate of 400 Hz and below
are recommended.
12.3 FIFO Frame Counter and Overrun Flag

The address ACC and GYR 0x0E bits<6:0> (frame_counter<6:0>) indicate the current fill level
of the buffer. If additional frames are written to the buffer although the FIFO is full, the address
ACC and GYR 0x0E bit 7 (overrun flag) is set. If the FIFO is reset, the FIFO fill level indicated in
the frame_counter<6:0> is set to ‘0’ and the overrun flag is reset each time a write operation
happens to the FIFO configuration registers. The overrun bit is not reset when the FIFO fill level
frame_counter<6:0> has decremented to ‘0’ due to reading from the fifo_data<7:0> register.

12.4 FIFO Interrupts

The FIFO controller has the capability to issue two different interrupt events, the FIFO-full and
the watermark event. Generally the FIFO-full and watermark interrupts are functional in all non-
composite modes, including BYPASS.
In order to enable (disable) the watermark and the FIFO-full- interrupt for the accelerometer the
(ACC 0x17) int_fwm_en bit, the int_ffull_en bit, as well as one or both of the int1_fwm or

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Int2_fwm and int1_ffull or Int2_ffull and bits must be set to ‘1’ (‘0’). For the gyroscope, the
fifo_wm_en bit, the fifo_en bit, as well as one or both of the int1_fifo or int2_fifo bits must be set.
Details are given in Table 67 and Table 68.
The watermark interrupt is asserted when the fill level in the buffer has reached the frame
number defined by the water mark level trigger (ACC 0x30) and/or (GYR 0x3D). The status of
the watermark interrupt for the accelerometer may be read back through the address (ACC
0x0A) bit 6 (fifo_wm_int) status bit. For the gyroscope it may be read back through the address
(GYR 0x0A) bit 4 (fifo_int) status bit. Writing to water mark level trigger (ACC 0x30) and/or
(GYR 0x3D) register clears the FIFO buffer.

The FIFO-full interrupt is the second interrupt capability associated with the FIFO. The FIFO-
full interrupt is asserted when the buffer has been fully filled with samples. In FIFO mode this
occurs:

 for the accelerometer 32 samples, in STREAM mode 31 samples, and in BYPASS mode
1 sample after the buffer has been cleared.

 for the gyroscope 100 samples, in STREAM mode 99 samples, and in BYPASS mode 1
sample after the buffer has been cleared.

The status of the FIFO-full interrupt for the accelerometer may be read back through the
address (ACC 0x0A) bit (fifo_full_int) status bit. For the gyroscope it may be read back through
the address (GYR 0x0A) bit 4 (fifo_int) status bit.

Table 67: Interrupt configuration bits relevant for the accelerometer FIFO controller

ACC Register ACC Address

fifo_water_mark_level_trigger_retain <5:0> 0x30 bits<5:0>
int_fwm_en 0x17 bit 6
int_ffull_en 0x17 bit 5
int1_fwm 0x1A bit 1
int2_fwm 0x1A bit 6
int1_ffull 0x1A bit 2
int2_ffull 0x1A bit 5

Table 68: Interrupt configuration bits relevant for the gyroscope FIFO controller

GYR Register GYR Address

h2o_mrk_lvl_trig_ret<6:0> 0x3D bits<6:0>
fifo_wm_en 0x1E bit 7
fifo_en 0x15 bit 6
int1_fifo 0x18 bit 2
int2_fifo 0x18 bit 5

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

13 Pin-out and connection diagram

13.1 Pin-out
The pin-out of the LGA package is shown in Figure 36.

Figure 36: Pin-out top view (left) and Pin-out bottom view (right)

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Table 69: Pin description

Pin# Name I/O Type Description Connect to

in SPI 4W In SPI 3W in I²C
1* INT2 Digital out Interrupt pin 2 (accel int #2) Accelerometer INT input (do not connect if unused)
2* DRDYM Digital out Data ready (magnet) Magnet sens. DRDY input (do not connect if unused)
3 VDD Supply Power supply VDD VDD VDD
analog & digital domain (2.4
- 3.6V)
4 GNDA Ground Ground GND GND GND
for analog domain
5 CSB2 Digital in SPI chip select gyro CSB2 CSB2 DNC (float) **
6 GNDIO Ground Ground for I/O GND GND GND

7 PS Digital in Protocol select GND GND VDDIO

(GND = SPI, VDDIO = I²C)
8 NC - Not connected Do not connect
9 SCx Digital in SPI: serial clock SCK SCK SCK SCL
I²C: serial clock SCL
10* INT5 Digital out Interrupt pin (magnet) Magnet INT input (do not connect if unused)
11 SDx Digital I/O I²C: SDA serial data I/O SDI SDA SDA
SPI 4W: SDI serial data I
SPI 3W: SDA serial data I/O
12 SDO2 Digital out SPI serial data out gyro SDO2 DNC (float) GND
Address select in I²C mode for default addr.
see chapter 11.2
13 VDDIO Supply Digital I/O supply voltage VDDIO VDDIO VDDIO
(1.2V … 3.6V)
14* INT3 Digital I/O Interrupt pin 3 (gyro int #1) Gyro INT1 input (do not connect if unused)
15* INT4 Digital I/O Interrupt pin 4 (gyro int #2) Gyro INT2 input (do not connect if unused)

16 CSB1 Digital in SPI chip select accel CSB1 CSB1 DNC (float) **
17 SDO1 Digital out SPI serial data out accel / SDO1 DNC (float) GND
magnet. sensor for default addr.
I²C-Address[0] of accel /
magnet. sensor in I²C mode
see chapter 11.2
18 NC - Not connected Do not connect
19* INT1 Digital out Interrupt pin 1 (accel int #1) Accelerometer INT1 input (do not connect if unused)
20 CSB3 Digital in SPI chip select magnet. CSB3 CSB3 GND
sensor for default addr.
I²C-Address[1] of magnet.
sensor in I²C mode
see chapter 11.2

* If INT are not used, please do not connect them (DNC)!

** connecting to VDDIO also allowed

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

13.2 Connection diagram 4-wire SPI

Accel INT 1
VDDIO VDD
(Do not connect if unused)

Do not connect __
Magnet CS
NC INT1 CSB3

18 19 20

SDO1 INT2 Accel INT 2

17 1 (Do not connect if unused)

__ CSB1 DRDYM Magnet Data ready

Accel CS 16 2 (Do not connect if unused)

Gyro INT 2 INT4 VDD

(Do not connect if unused) 15 3

Gyro INT 1 INT3

BMX055
14 4 GNDA
(Do not connect if unused) GND
TOP VIEW
(pads not visible)
VDDIO CSB2 __
13 5 Gyro CS
C1
SDO2 GNDIO
MISO 12 6
GND
SDx PS
MOSI 11 7
C2

Magnet INT
(Do not connect if unused) 10 9 8

INT5 SCx NC
Do not connect
SCK
GND GND

Figure 37: 4-wire SPI connection

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

13.3 Connection diagram 3-wire SPI

Accel INT 1
VDDIO VDD
(Do not connect if unused)

__
Do not connect Magnet CS
NC INT1 CSB3

18 19 20

SDO1 INT2 Accel INT 2

Do not connect 17 1 (Do not connect if unused)

__ CSB1 DRDYM Magnet Data ready

Accel CS 16 2 (Do not connect if unused)

Gyro INT 2 INT4 VDD

(Do not connect if unused) 15 3

Gyro INT 1 INT3

BMX055
14 4 GNDA
(Do not connect if unused) GND
TOP VIEW
(pads not visible)
VDDIO CSB2 __
13 5 Gyro CS
C1
SDO2 GNDIO
Do not connect 12 6
GND
SDx PS
SISO 11 7
C2

Magnet INT
(Do not connect if unused) 10 9 8

INT5 SCx NC
Do not connect
SCK
GND GND

Figure 38: 3-wire SPI connection

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

2
13.4 Connection diagram I C

Accel INT 1
VDDIO VDD VDDIO
(Do not connect if unused)

Do not connect I²C-Addr[1] - Magnet

NC INT1 CSB3

18 19 20

I²C-Addr_LSB (I²C-Addr[0]) SDO1 INT2 Accel INT 2

– Accel / Magnet 17 1 (Do not connect if unused)

CSB1 DRDYM Magnet Data ready

Do not connect 16 2 (Do not connect if unused)

Gyro INT 2 INT4 VDD

(Do not connect if unused) 15 3

Gyro INT 1 INT3

BMX055
14 4 GNDA
(Do not connect if unused) GND
TOP VIEW
(pads not visible)
VDDIO CSB2
13 5 Do not connect

R2 I²C-Addr_LSB SDO2 GNDIO

(I²C-Addr[0]) - Gyro 12 6
GND
SDx PS
SDA 11 7
C2

Magnet INT
(Do not connect if unused) 10 9 8 C1
R1

INT5 SCx NC
Do not connect
SCL
GND GND

Figure 39: I²C connection

Note: the recommended value for C1, C2 is 100 nF.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

14 Package

14.1 Outline dimensions

The sensor housing is a standard LGA package. Its dimensions are the following.
Unit is mm. Note: Unless otherwise specified tolerance = decimal ± 0.05 mm.

Figure 40: Package outline dimensions in mm

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

14.2 Sensing axes orientation

If the sensor is accelerated and/or rotated in the indicated directions, the corresponding
channels of the device will deliver a positive acceleration and/or yaw rate signal (dynamic
acceleration). If the sensor is at rest without any rotation and the force of gravity is acting
contrary to the indicated directions, the output of the corresponding acceleration channel will be
positive and the corresponding gyroscope channel will be “zero” (static acceleration).

Example: If the sensor is at rest or at uniform motion in a gravity field and a static magnetic field
according to the figure given below, the output signals are:

Table 70: Example sensor signal output

ACC GYR MAG

X channel ± 0g ± 0°/sec 0 µT
Y channel ± 0g ± 0°/sec 0 µT
Z channel + 1g ± 0°/sec -|B|

az, Bz
ωz N
ax, -By
B

ωy ωx

ay, Bx

force
S
of gravity

Figure 41: Orientation of sensor sensing axis

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

The following Table 71 lists all corresponding register output signals on aX, aY, aZ and ΩX, ΩY, ΩZ
and BX, BY, BZ while the sensor is at rest or at uniform motion in a gravity field and subjected to
a constant vertical magnetic field under assumption of a ±2g range setting and a top down
gravity vector as shown above.

Table 71: Output signals depending on device orientation

Sensor Orientation

o
(gravity vector  = o o upright upright
static acceleration vector ,
magnetic vector )
o
0g +1g 0g -1g 0g 0g
Output Signal aX 0LSB +1024LSB 0LSB -1024LSB 0LSB 0LSB

-1g 0g +1g 0g 0g 0g
Output Signal aY -1024LSB 0LSB +1024LSB 0LSB 0LSB 0LSB

0g 0g 0g 0g +1g -1g
Output Signal aZ 0LSB 0LSB 0LSB 0LSB +1024LSB -1024LSB

0°/sec 0°/sec 0°/sec 0°/sec 0°/sec 0°/sec

Output Signal ΩX 0LSB 0LSB 0LSB 0LSB 0LSB 0LSB

0°/sec 0°/sec 0°/sec 0°/sec 0°/sec 0°/sec

Output Signal ΩY 0LSB 0LSB 0LSB 0LSB 0LSB 0LSB

0°/sec 0°/sec 0°/sec 0°/sec 0°/sec 0°/sec

Output Signal ΩZ 0LSB 0LSB 0LSB 0LSB 0LSB 0LSB

Output Signal BX +|B| µT 0 µT -|B| µT 0 µT 0 µT 0 µT

Output Signal BY 0 µT +|B| µT 0 µT -|B| µT 0 µT 0 µT

Output Signal BZ 0 µT 0 µT 0 µT 0 µT -|B| µT +|B| µT

14.3 Android axes orientation

The Android coordinate system is shown in Figure 42. The origin is in the lower-left corner with
respect to the screen, with the X axis horizontal and pointing right, the Y axis vertical and
pointing up and the Z axis pointing outside the front face of the screen. In this system,
coordinates behind the screen have negative Z values.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Figure 42: Android coordinate system

Attitude terms are defined in the following way:

 Heading / Azimuth – angle between the magnetic north direction and the Y axis, around
the Z axis (0° to 360°). 0° = North, 90° = East, 180° = South, 270° = West.
 Pitch – rotation around X axis (-180° to 180°), with positive values when the z-axis
moves toward the y-axis.
 Roll – rotation around Y axis (-90° to 90°), with positive values when the x-axis moves
toward the z-axis.

Figure 43: Heading, pitch and roll in Android coordinate frame

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

14.4 Landing pattern recommendation

For the design of the landing patterns, we recommend the following dimensioning:
0.675 0.25

0.55
18 19 20
0.25

17 1
0.5

16 2

15 3
4.5

14 4

13 5

12 6 1.775

11 7

10 9 8

0.925

3.0

Figure 44: Landing patterns, dimensions are in mm

Same tolerances as given for the outline dimensions (chapter 14.1, Figure 40) should be
assumed.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

14.5 Marking

14.5.1 Mass production devices

Table 72: Marking of mass production parts

Labeling Name Symbol Remark

3 alphanumeric digits, fixed
Product number BMX to identify product type
1 alphanumeric digit, variable to identify
BMX Sub-con ID L sub-con (L = “A” or L = “U” or L = “P”

LYWW Date-Code YWW

3 numeric digits, fixed to identify
Y = “year” WW = “working week
CCC Lot counter CCC
3 alphanumeric digits, variable
to generate mass production trace-code

Pin 1 identifier • --

14.5.2 Engineering samples

Table 73: Marking of engineering samples

Labeling Name Symbol Remark

1 alphanumeric digit, fixed to identify
Eng. sample ID N engineering sample, N = “+” or “e” or “E”
1 alphanumeric digit (A) for trace-code
X55N Sample ID AYYWW 2 numeric digit (YY) for date-code
2 numeric digit (WW) for date-code
AYYWW 4 alphanumeric digits, variable
Counter ID CCCC
CCCC to generate trace-code

Pin 1 identifier • --

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

14.6 Soldering guidelines

The moisture sensitivity level of the BMX055 sensors corresponds to JEDEC Level 1, see also

- IPC/JEDEC J-STD-020C "Joint Industry Standard: Moisture/Reflow Sensitivity

Classification for non-hermetic Solid State Surface Mount Devices"
- IPC/JEDEC J-STD-033A "Joint Industry Standard: Handling, Packing, Shipping and Use of
Moisture/Reflow Sensitive Surface Mount Devices"

The sensor fulfils the lead-free soldering requirements of the above-mentioned IPC/JEDEC
standard, i.e. reflow soldering with a peak temperature up to 260°C.

Figure 45: Soldering profile recommendation

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

14.7 Handling instructions

Micromechanical sensors are designed to sense acceleration with high accuracy even at low
amplitudes and contain highly sensitive structures inside the sensor element. The MEMS
sensor can tolerate mechanical shocks up to several thousand g's. However, these limits might
be exceeded in conditions with extreme shock loads such as e.g. hammer blow on or next to
the sensor, dropping of the sensor onto hard surfaces etc.

We recommend to avoid g-forces beyond the specified limits during transport, handling and
mounting of the sensors in a defined and qualified installation process.

This device has built-in protections against high electrostatic discharges or electric fields (e.g.
2kV HBM); however, anti-static precautions should be taken as for any other CMOS
component. Unless otherwise specified, proper operation can only occur when all terminal
voltages are kept within the supply voltage range. Unused inputs must always be tied to a
defined logic voltage level.

For more details on recommended handling, soldering and mounting please contact your local
Bosch Sensortec sales representative and ask for the “Handling, soldering and mounting
instructions” document.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

14.8 Tape and reel specification

The BMX055 is shipped in a standard cardboard box.
The box dimension for 1 reel is: L x W x H = 35cm x 35cm x 6cm.
BMX055 quantity: 5,000pcs per reel, please handle with care.

A0 = 4.85
B0 = 3.35
K0 = 1.20
Figure 46: Tape and reel dimensions in mm

14.8.1 Orientation within the reel

 Processing direction 

Figure 47: Orientation of the BMX055 devices relative to the tape

14.9 Environmental safety

The BMX055 sensor meets the requirements of the EC restriction of hazardous substances
(RoHS and RoHS2) directive, see also:

Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003
on the restriction of the use of certain hazardous substances in electrical and electronic
equipment.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

14.9.1 Halogen content

The BMX055 is halogen-free. For more details on the analysis results please contact your
Bosch Sensortec representative.

14.9.2 Internal package structure

Within the scope of Bosch Sensortec’s ambition to improve its products and secure the mass
nd
product supply, Bosch Sensortec qualifies additional sources (e.g. 2 source) for the LGA
package of the BMX055.

While Bosch Sensortec took care that all of the technical packages parameters are described
above are 100% identical for all sources, there can be differences in the chemical content and
the internal structural between the different package sources.

However, as secured by the extensive product qualification process of Bosch Sensortec, this
has no impact to the usage or to the quality of the BMX055 product.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

15 Legal disclaimer

15.1 Engineering samples

Engineering Samples are marked with an plus (+) or (e) or (E) or (N). Samples may vary from
the valid technical specifications of the product series contained in this data sheet. They are
therefore not intended or fit for resale to third parties or for use in end products. Their sole
purpose is internal client testing. The testing of an engineering sample may in no way replace
the testing of a product series. Bosch Sensortec assumes no liability for the use of engineering
samples. The Purchaser shall indemnify Bosch Sensortec from all claims arising from the use of
engineering samples.

15.2 Product use

Bosch Sensortec products are developed for the consumer goods industry. They may only be
used within the parameters of this product data sheet. They are not fit for use in life-sustaining
or security sensitive systems. Security sensitive systems are those for which a malfunction is
expected to lead to bodily harm or significant property damage. In addition, they are not fit for
use in products which interact with motor vehicle systems.

The resale and/or use of products are at the purchaser’s own risk and his own responsibility.
The examination of fitness for the intended use is the sole responsibility of the Purchaser.

The purchaser shall indemnify Bosch Sensortec from all third party claims arising from any
product use not covered by the parameters of this product data sheet or not approved by Bosch
Sensortec and reimburse Bosch Sensortec for all costs in connection with such claims.

The purchaser must monitor the market for the purchased products, particularly with regard to
product safety, and inform Bosch Sensortec without delay of all security relevant incidents.

15.3 Application examples and hints

With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Bosch Sensortec hereby disclaims any and
all warranties and liabilities of any kind, including without limitation warranties of non-
infringement of intellectual property rights or copyrights of any third party. The information given
in this document shall in no event be regarded as a guarantee of conditions or characteristics.
They are provided for illustrative purposes only and no evaluation regarding infringement of
intellectual property rights or copyrights or regarding functionality, performance or error has
been made.

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

16 Document history and modification

Rev. No Chapter Description of modification/changes Date

20 30-March-
17 0.1 18 - 19 Initial release
2013

22 1.2 Table 2 updated

1.2 Table 3 updated
1.2 Table 4 updated
Recommendation for power up sequence
4
updated
Description of suspend mode and deep suspend
5.1
mode updated; equations for LMP2 updated
5.2.2 Description of temperature sensor added
Recommendation to use pull-up, pull-down
5.6.3
resistors added
[Link] Recommendation of single tap usage added
5.6.7 orient_hyst description updated
Comment added on clearance of interrupt when
5.6.10
acceleration is lower than threshold.
5.7 Description of accelerometer soft reset updated
Acc reg ACC Register 0x0F (PMU_RANGE) description
21 1.0 04 October 2013
0x0F updated
Acc reg ACC Register 0x10 (PMU_BW) description
0x10 updated
Acc reg ACC Register 0x12 (PMU_LOW_POWER)
0x12 renamed
Acc reg ACC Register 0x14 (BGW_SOFTRESET)
0x14 description updated
Acc reg
ACC Register 0x2B (INT_9) description updated
0x2B
Acc reg ACC Register 0x30 (FIFO_CONFIG_0)
0x30 description updated
Acc reg ACC Register 0x32 (PMU_SELF_TEST)
0x32 description updated
7.5.2 Description of fast offset compensation updated
7.7 Description of gyro interrupts updated
Recommendation to use pull-up, pull-down
7.7.3
resistors added
12.4 Description of FIFO interrupts updated
14.1 Outline dimensions updated
1.1 14.4 Landing pattern recommendation updated 07 Nov. 2014
14.5.1 Correct chip marking

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

Bosch Sensortec GmbH

Gerhard-Kindler-Strasse 8
72770 Reutlingen / Germany

contact@[Link]
[Link]

Modifications reserved | Printed in Germany

Specifications are preliminary and subject to change
without notice
Document number: BST-BMX055-DS000-01
Revision_1.1_102014

BST-BMX055-DS000-02 | Revision 1.1 | November 2014 Bosch Sensortec

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