Chapter01 – 8086 16-Bit Microprocessor

1. 8086 16-Bit Microprocessor

 8086 Microprocessor is an enhanced version of 8085 Microprocessor that was
designed by Intel in 1978. It is a 16-Bit Microprocessor having 20 address lines and 16
data lines that provides up to 1MB storage. It consists of powerful instruction set, which
provides operations like multiplication and division easily.
 It supports two modes of operation, i.e. Maximum mode and Minimum mode.
Maximum mode is suitable for system having multiple processors and Minimum
mode is suitable for system having a single processor.
2. Features of 8086

 16-Bit Architecture: The 8086 is a 16-Bit Microprocessor, meaning it processes data in

16-bit chunks. This allowed for more efficient data manipulation and arithmetic
operations compared to its 8-Bit processors.

 16-Bit Registers: The 8086 includes a set of sixteen 16-Bit registers, including general-
purpose registers, segment registers and special-purpose registers. These registers are
used for various operations, including arithmetic, logical and data manipulation.

 Clock Speed: The original 8086 microprocessor operated at a clock speed of 5MHz.
Subsequent variations with different clock speeds were introduced, providing flexibility
in performance.

 Address Bus: The 8086 features a 20-bit address bus, allowing it to address up to 1MB
of memory. The memory addressing is based on a segmentation model, combining a 16-
bit segment address with a 16-bit offset address.

 Instruction Set: The 8086 has a comprehensive instruction set that includes a wide
range of instruction for arithmetic logic, data transfer and control flow operations. It
supports both signed and unsigned arithmetic.

 Memory Segmentation: Memory addressing in the 8086 is based on a segmented

memory model. This allows for a flexible approach to memory management, but it also
introduces complexities, leading to later advancements in memory models.
 Modes of Operation: The 8086 supports two modes of operation: real mode and
protected mode. Real mode provides backward compatibility with 8-bit processors,
while protected mode offers features like memory protection, multitasking and
extended memory addressing.

 Compatibility: The 8086 architecture and instruction set served as the foundation for
the x86 architecture, which has evolved over the years. Compatibility with earlier
processors and a board software base contributed to the success and longevity of the
x86 architecture.

 Application: The 8086 microprocessor found widespread use in early personal

computers, such as the IBM PC and compatible systems. Its architecture laid the
 groundwork for subsequent x86 processors, which continue to dominate the desktop
and laptop computer market

3. Architecture of 8086

 The Architecture of the 8086 microprocessor is based on a complex instruction set

computer (CISC) architecture, which means that it supports a wide can perform multiple
operations in a single instruction.
 The 8086 microprocessor has a 20-bit address bus, which can address up to 1MB of
memory and a 16-bit data bus, which can transfer data between the microprocessor and
memory or I/O devices.
4. 8086 16 Bit Microprocessor

 8086 Microprocessor is an enhanced version of 8086 microprocessor that was designed

by Intel in 1976. It is a 16-bit Microprocessor having 20 address lines and 16 data lines
that provides up to 1MB storage. It consists of powerful instruction set, which provides
operations like multiplication and division easily.
 It supports two modes of operation, i.e. Maximum mode and Minimum mode.
Maximum mode is suitable for system having multiple processors and Minimum mode is
suitable for system having a single processor.

5. Architecture of 8086
Bus Interface Unit:

 It provides the interface of 8086 to external memory and I/O devices via the
System Bus. It performs various machine cycles such as memory read, I/O read,
etc. to transfer data between memory and I/O devices.

BIU performs the following functions are as follows:

 It generates the 20-bit physical address for memory access.
 It fetches instructions from the memory.
 It transfers data to and from the memory and I/O.
 Maintains the 6-byte pre-fetch instruction queue (supports pipelining).
Execution Unit:

The main components of the EU are General purpose register, the ALU, Special purpose
registers, the instruction Register and Instruction Decoder, and the Flag/Status Register.
 Fetches instructions from the Queue in BIU, decodes, and executes arithmetic
and logic operations using the AIU.
 Sends control signals for internal data transfer operations within the
microprocessor. (Control Unit).
 Sends request signals to the BIU to access the external module.
 It operates with respect to T-states (clock cycles) and not machine cycles.
6. Concept of Pipelining in 8086

Pipelining is a technique used in microprocessor design to enhance the performance of

instruction execution by overlapping the execution of multiple instructions.
The pipe line is nothing but a queue of 6 instruction pre fetched from the memory.
The first instruction of queue is going to execution unit as ALU then the queue move
forward and one new instruction come from memory so that the queue always field
from 6 instructions.
The ALU does it has to wait for the instruction come from memory.
The instruction already pre fetched and made available for the ALU.

7. Register Organization:
What is Register?

 In the context of the 8086 microprocessor, a register refers to a small, fast

storage location within the processor that is used to temporarily hold data
during program execution. The 8086 microprocessor has a set of general-
purpose registers, as well as special-purpose registers, each serving specific
functions in the execution of instructions.

 General Purpose
 Segment Register
 Flag Register
 Pointer & Index

General Purpose

 General-purpose registers are used to store temporary data within the

microprocessor. There are 8 general-purpose registers in the 8086
microprocessor.
I. AX: This is the accumulator. It is of 16 bits and is divided into two 8-bit
registers AH and AL to also perform 8-bit instructions. It is generally
used for arithmetical and logical instructions.

II. BX: This is the base register. It is of 16 bits and is divided into two 8-bit
registers BH and BL to also perform 8-bit instructions. It is used to store
the value of the offset.

III. CX: This is the counter register. It is of 16 bits and is divided into two 8-
bit registers CH and CL to also perform 8-bit instructions. It is used in
looping and rotation.

IV. DX: This is the data register. It is of 16 bits and is divided into two 8-bit
registers DH and DL to also perform 8-bit instructions. It is used in the
multiplication and input/output port addressing.
Segment Register

 Segmentation is the process in which the main memory of the computer is

logically divided into different segments and each segment has its own base
address. It is basically used to enhance the speed of execution of the computer
system, so that the processor is able to fetch and execute the data from the
memory easily and fast.

 Code Segment Register (CS): is used for addressing memory location in

the code segment of the memory, where the executable program is
stored.

 Data Segment Register (DS): points to the data segment of the memory
where the data is stored.

 Extra Segment Register (ES): also refers to a segment in the memory

which is another data segment in the memory.

 Stack Segment Register (SS): is used for addressing stack segment of the
memory. The stack segment is that segment of memory which is used to
store stack data.
Flag Register
 The flag register 16-bit register in the Intel 8086 microprocessor that contains
information about the state of the processor after executing an instruction. It is
sometimes referred to as the status register because it contains various status
flags that reflect the outcome of the last operation executed by the processor.

 The flag register is an important component of the 8086 microprocessor

because it is used to determine the behavior of many conditional jump and
branch instructions. The various flags in the flag register are set or cleared based
on the result of arithmetic, logic and other instructions executed by the
processor.

Different types of flag register

1) Zero Flag (ZF): Set if the result of an operation is zero.

2) Carry Flag (CF): Set if there is a carry-out from the most significant bit (MSB)
during arithmetic operations or a borrow during subtraction.

3) Sign Flag (SF): Reflects the sign of the result. Set if the result is negative.

4) Overflow Flag (OF): Indicates an overflow in signed arithmetic operations. For

example, if the result of adding two signed numbers is too large to be
represented, the overflow flag is set.

5) Parity Flag (PF): Set if the number of set bits in the result is even. This flag is
used for parity checking.

6) Auxiliary Carry Flag (AF): Used in binary-coded decimal (BCD) arithmetic to

indicate a carry-out from the low nibble (4 bits).
 7) Direction Flag (DF): Influences the direction of string operations. If set, string
operations decrement the index registers; if cleared they increment the index
registers.

8) Interrupt Enable Flag (IF): Controls the response to interrupts. If set, interrupts
are enabled; if cleared, interrupts are disabled.

9) Trap Flag (TF): Used for single-step debugging. If set, the processor enters a
single-step mode here it executes one instruction at a time.

10) Resume Flag (RF): Controls the response to debug exceptions. If set, the
processor enters

Pointer & Index

 In the context of the 8086 microprocessor, pointer and index registers are
general-purpose registers that have specific roles related to memory addressing.
These registers play a crucial role in facilitating access to data in memory.

Base Pointer (BP):

 Role: The Base Pointer is often used as a reference or base address when
accessing data in memory. It’s commonly employed in conjunction with the DS
(Data Segment) register to form effective addresses.

 Common Usage: BP is commonly used in stack-related operations. For instance,

it may point to the base of the stack frame in a function, facilitating local
variable access or parameter retrieval.