ANSWER KEY
PART A –– (10 x 1 = 10 Marks)
1 Field effect transistor is a ______________________
a) Temperature controlled device b) Voltage controlled Device
c) Current controlled device d)Voltage and current controlled device
2 In the feedback network of Colpitts oscillator consists of ________________
a) Two inductors and one capacitor b) Three capacitors and one inductor
c) Two capacitors and one inductor d) Two capacitors and two inductors
3 Voltage induced in the piezo electric crystals due to by applying
a) Heat b) Pressure
c) Force d) Velocity
4 Which meter consists of high resistance value to measure _____________
a) Ammeter b) Ohmmeter
c) Voltmeter d) Wattmeter
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Write the value for = -------------
a) b)
c) d)
6 Which one of the following is not a vectored interrupt?
a) TRAP b) INTR
c) RST 7.5 d) RST 3
7 16 bit registers in 8085 microprocessor ___________________
a) Register A & Programme counter b) Register A & Register C
c) Programme counter & Stack pointer d) Stack pointer & Register A
8 8085 microprocessor has how many pins _______
a) 36 b) 20
c) 48 d) 40
9 Microcontrollers often have __________
a) CPUs b) RAM
c) ROM d) All the Above
1 Which of the following instructions will move the contents of register 3 to the
0 accumulator?
a) MOV 3R, A b) MOV R3, A
c) MOV A,R3 d) MOV A,3R
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PART B –– (10 x 2 = 20 Marks)
1. What is pinch off voltage?
The drain current ID reaches a saturation level called Drain Source Saturation current
IDSS at one level of Gate Source voltage VGS called as pinch off voltage, Vp. The
channel appears to be pinched off at IDSS. This level of VGS is called pinch of voltage of
2. the channel.
State Barkhausen criterion.
The frequency of oscillation at which sinusoidal oscillator operates is the frequency
for which the total shift introduced, as the signal proceeds from the input terminals,
through the amplifier and feedback network, and back again to the input, is precisely
zero(or an integral multiple of 2*Π)
The total loop gain must be greater than one. Aβ >1.
3. Give the truth table & symbolic representation of NAND and NOR.
NOR gate
NAND Gate
4. Explain the flip-flop excitation tables for RS FF.
In RS flip-flop there are four possible transitions from the present state to the next
state. They are,
_ 0_0 transition: This can happen either when R=S=0 or when R=1 and S=0.
_ 0_1 transition: This can happen only when S=1 and R=0.
_ 1_0 transition: This can happen only when S=0 and R=1.
_ 1_1 transition: This can happen either when S=1 and R=0 or S=0 and R=0.
5. What are the various addressing modes in 8085?
Immediate addressing
Register addressing
Direct addressing
Indirect addressing
6. State the advantages of electronic measurements.
(i) An electrical signal or electronic signal can be amplified, filtered, multiplexed,
sampled and measured.
(ii) Many measurements can be carried either simultaneously or in rapid succession
(iii) The measurement can be obtained in or converted into digital form for automatic
analyzing and recording
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7. What are the elements in the electronic multimeter?
i. Balanced –bridge DC amplifier and Indicating meter
ii. Input attenuator or Range switch – It is used to limit the magnitude of the input voltage
to the desired value.
iii. Rectifier section-It is used to convert an ac input voltage to a proportional dc value.
iv. Internal battery and additional circuitry –It is used to provide the capability of resistance
measurement.
v. Function switch- This switch is used to select the various measurement functions of the
instrument such as voltage, current, or resistance.
8. Specify the output at port 1 if the following Arithmetic and Logic programme is
executed:
MVI B, 88H
MOV A,B
MOV C,A
MVI D, 73H
Out port 1
HLT
9. What is the significance of DPTR?
DPTR is a 16-bit register which is used as Data Pointer for external data memory. It
holds the 16-bit address of the data stored in the external data memory. This can also
be used as two numbers of 8-bit data pointers namely DPH and DPL. The 8-bit data
pointers are used for accessing internal RAM and SFR. The contents of data pointer
are programmable using instructions.
10.
PART C –– (5 x 14 = 70 Marks)
21. (a) Draw and explain the characteristics of a FET amplifier and discuss its merits 14
and demerits
Common Source JFET Amplifier
The amplifier circuit consists of an N-channel JFET, but the device could also be an
equivalent N-channel depletion-mode MOSFET as the circuit diagram would be the
same just a change in the FET, connected in a common source configuration. The
JFET gate voltage Vg is biased through the potential divider network set up by
resistors R1 andR2 and is biased to operate within its saturation region which is
equivalent to the active region of the bipolar junction transistor.
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As with the common emitter bipolar circuit, the DC load line for the common source
JFET amplifier produces a straight line equation whose gradient is given as: -1/(Rd +
Rs)and that it crosses the vertical Id axis at point A equal to Vdd/(Rd + Rs). The other
end of the load line crosses the horizontal axis at point B which is equal to the supply
voltage,Vdd. The actual position of the Q-point on the DC load line is generally
positioned at the mid center point of the load line (for class-A operation) and is
determined by the mean value of Vg which is biased negatively as the JFET is a
depletion-mode device. Like the bipolar common emitter amplifier the output of
the Common Source JFET Amplifier is 180o out of phase with the input signal. One of
the main disadvantages of using Depletion-mode JFET is that they need to be
negatively biased. Should this bias fail for any reason the gate-source voltage may rise
and become positive causing an increase in drain current resulting in failure of the
drain voltage, Vd.
(OR)
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(b) (i) With necessary circuit diagram explain the operation of Hartley oscillator. 10
Basic Hartley Oscillator Design
When the circuit is oscillating, the voltage at point X (collector), relative to
point Y(emitter), is 180o out-of-phase with the voltage at point Z (base) relative to
point Y. At the frequency of oscillation, the impedance of the Collector load is
resistive and an increase in Base voltage causes a decrease in the Collector voltage.
Then there is a 180o phase change in the voltage between the Base and Collector and
this along with the original 180o phase shift in the feedback loop provides the correct
phase relationship of positive feedback for oscillations to be maintained.
The amount of feedback depends upon the position of the “tapping point” of the
inductor. If this is moved nearer to the collector the amount of feedback is increased,
but the output taken between the Collector and earth is reduced and vice versa.
Resistors, R1 and R2 provide the usual stabilizing DC bias for the transistor in the
normal manner while the capacitors act as DC-blocking capacitors.
In this Hartley Oscillator circuit, the DC Collector current flows through part of the
coil and for this reason the circuit is said to be “Series-fed” with the frequency of
oscillation of the Hartley Oscillator being given as.
Note: LT is the total cumulatively coupled inductance if two separate coils are used
including their mutual inductance, M.
(ii) Draw the inverting and non-inverting amplifier 04
Non-inverting Operational Amplifier Configuration
For an ideal op-amp “No current flows into the input terminal” of the amplifier and
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that “V1 always equals V2”. This was because the junction of the input and feedback
signal ( V1 ) are at the same potential. In other words the junction is a “virtual earth”
summing point. Because of this virtual earth node the resistors, Rƒ and R2 form a
simple potential divider network across the non-inverting amplifier with the voltage
gain of the circuit being determined by the ratios of R2 and Rƒ
Inverting Operational Amplifier Configuration
In this Inverting Amplifier circuit the operational amplifier is connected with
feedback to produce a closed loop operation. When dealing with operational
amplifiers there are two very important rules to remember about inverting amplifiers,
these are: “No current flows into the input terminal” and that “V1 always equals V2”.
However, in real world op-amp circuits both of these rules are slightly broken.
22. (a) With suitable diagram explain the operation of voltmeter 14
Voltmeter:-
For measurement of voltage a series resistor or a multiplier is required for
extension of range.
Im = Deflection current of movement
Rm = Internal resistance of movement
Rs = Multiplier resistance
V = Full range voltage of instrument
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* For average value divide the reading by 1.11. For peak value multiply the voltage by
1.414. To get peak-to-peak ratio multiply the reading by 2.828.
** Thermocouple and hot wire instruments are used for measurement of true power
and rms value of voltage & current. Voltmeter & Ammeter by Moving Coil
Instrument:- Same process as applied in PMMC.
(OR)
(b) (i) Describe the working principles of strain gauges 10
Strain gauges
Strain gauges work on the principle that the resistance of a conductor or a
miconductor changes when strained. This property can be used for measurement of
displacement, force and pressure. The resistivity of materials also changes with
change of temperature thus causing a change of resistance. If a metal conductor is
stretched or compressed, its resistance changes on account of the fact that both length
and diameter of conductor change. Also there is a change in the value of resistivity of
the conductor when it is strained and this property is piezoresistive effect. Therefore,
resistance strain gauges are also known as piezoresistive gauges.
The strain gauges are used for measurement of strain and associated stress in
experimental stress analysis. Secondly, many other detectors and transducers, notably
the load cells, torque meters, diaphragm type pressure gauges, temperature sensors,
accelerometers and flow meters, employ strain gauges as secondary transducers.
Theory of Strain Gauges
The change in the value of resistance by straining the gauge may be partly explained
by the normal dimensional behaviour of elastic material. If a strip of elastic material is
subjected to tension, as shown in Fig.1 or in other words positively strained, its
longitudinal dimension will increase while there will be a reduction in the lateral
dimension
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(ii) List out the applications of thermistors 04
Some materials, such as carbon and germanium, have a negative temperature
coefficient of resistance that implies that the resistance decreases with an increase in
temperature.
Thermistors or thermal resistors are semiconductor devices that behave as resistors
with a high, usually negative temperature coefficient of resistance.
In some cases, the resistance of a thermistor at room temperature may decrease as
much as per cent for each 1oC rise in temperature. This high sensitivity to temperature
change make the thermistor extremely well suited to precision temperature
measurement, control. And compensation. Thermistors are widely used in
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applications, especially in the lower temperature range of -100'C to 300 C.
23. (a) (i) Explain the working of half adder and full adder with logic diagrams and 14
truth table.
An adder is a digital circuit that performs addition of numbers. The half adder adds
two binary digits called as augend and addend and produces two outputs as sum
and carry; XOR is applied to both inputs to produce sum and AND gate is applied
to both inputs to produce carry. The full adder adds 3 one bit numbers, where two
can be referred to as operands and one can be referred to as bit carried in. And
produces 2-bit output, and these can be referred to as output carry and sum.
This adder is difficult to implement than a half-adder. The difference between a
half-adder and a full-adder is that the full-adder has three inputs and two outputs,
whereas half adder has only two inputs and two outputs. The first two inputs are A
and B and the third input is an input carry as C-IN. When full-adder logic is
designed, you string eight of them together to create a byte-wide adder and cascade
the carry bit from one adder to the next.
(OR)
(b) (i) Explain about the universal logic gates with logic diagram and also implement 14
the exclusive OR gate operation with basic gate.
NAND GATE:
It is the NOT AND gate. The inverter bubble reverses the output of the AND gate
logic, giving a 0 output only when all inputs are 1.
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NOR GATE:
It is the NOT – OR gate. The inverter bubble reverses the output of the OR gate logic
giving 1 as the output only if all inputs are 0. It can have more than 1 input.
Universal Logic Gates:
A universal logic gate is one which can implement any Boolean function {0,1},
without the use of any other logic gate. Simply put, a logic gate which can serve the
function of ALL other logic gates, including itself.
The NAND and NOR gates are called universal logic gates because all the other gates
can be created using these two.
24. (a) (i) Describe the different addressing modes of 8085 microprocessor 14
Addressing Modes in 8085
These are the instructions used to transfer the data from one register to another
register, from the memory to the register, and from the register to the memory without
any alteration in the content. Addressing modes in 8085 is classified into 5 groups −
Immediate addressing mode
In this mode, the 8/16-bit data is specified in the instruction itself as one of its
operand. For example: MVI K, 20F: means 20F is copied into register K.
Register addressing mode
In this mode, the data is copied from one register to another. For example: MOV K,
B: means data in register B is copied to register K.
Direct addressing mode
In this mode, the data is directly copied from the given address to the register. For
example: LDB 5000K: means the data at address 5000K is copied to register B.
Indirect addressing mode
In this mode, the data is transferred from one register to another by using the address
pointed by the register. For example: MOV K, B: means data is transferred from the
memory address pointed by the register to the register K.
Implied addressing mode
This mode doesn’t require any operand; the data is specified by the opcode itself. For
example: CMP.
(OR)
(b) (i) Write a programme in 8085 to add two 16 bit data. 07
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(ii) Enumerate any five of logical instructions in 8085 microprocessor. 07
Op Operan
Meaning Explanation
code d
Compare the
The contents of the operand (register or
R register or
CMP memory) are M compared with the contents
M memory with the
of the accumulator.
accumulator
Compare
8-bit The second byte data is compared with the
CPI immediate with
data contents of the accumulator.
the accumulator
Logical AND The contents of the accumulator are
R register or logically AND with M the contents of the
ANA
M memory with the register or memory, and the result is placed
accumulator in the accumulator.
Logical AND The contents of the accumulator are
8-bit
ANI immediate with logically AND with the 8-bit data and the
data
the accumulator result is placed in the accumulator.
Exclusive OR The contents of the accumulator are
R register or Exclusive OR with M the contents of the
XRA
M memory with the register or memory, and the result is placed
accumulator in the accumulator.
Exclusive OR The contents of the accumulator are
8-bit
XRI immediate with Exclusive OR with the 8-bit data and the
data
the accumulator result is placed in the accumulator.
Logical OR The contents of the accumulator are
R register or logically OR with M the contents of the
ORA
M memory with the register or memory, and result is placed in
accumulator the accumulator.
Logical OR The contents of the accumulator are
8-bit
ORI immediate with logically OR with the 8-bit data and the
data
the accumulator result is placed in the accumulator.
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Each binary bit of the accumulator is rotated
Rotate the left by one position. Bit D7 is placed in the
RLC None
accumulator left position of D0 as well as in the Carry flag.
CY is modified according to bit D7.
Each binary bit of the accumulator is rotated
Rotate the right by one position. Bit D0 is placed in the
RRC None
accumulator right position of D7 as well as in the Carry flag.
CY is modified according to bit D0.
Each binary bit of the accumulator is rotated
left by one position through the Carry flag.
Rotate the
Bit D7 is placed in the Carry flag, and the
RAL None accumulator left
Carry flag is placed in the least significant
through carry
position D0. CY is modified according to
bit D7.
Each binary bit of the accumulator is rotated
right by one position through the Carry flag.
Rotate the
Bit D0 is placed in the Carry flag, and the
RAR None accumulator right
Carry flag is placed in the most significant
through carry
position D7. CY is modified according to
bit D0.
Complement The contents of the accumulator are
CMA None
accumulator complemented. No flags are affected.
Complement The Carry flag is complemented. No other
CMC None
carry flags are affected.
STC None Set Carry Set Carry
25. (a) (i) Compare Microprocessor and Microcontroller. 07
(ii) Discuss briefly about the LCD display 07
Liquid crystal Diodes (LCD)
Liquid crystal cell displays (LCDs) are used in similar applications where LEDs are
used. These applications are display of numeric and alphanumeric characters in dot
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matrix and segmental displays. The LCDs are of two types : Dynamic scattering type
and Field effect type.
The construction of a dynamic scattering liquid crystal cell
The liquid crystal material may be one of the several organic compounds which
exhibit optical properties of a crystal though they remain In liquid form. Liquid
crystal is layered between glass sheets with transparent electrodes deposited on the
inside faces. When a potential is applied across the cell, charge carriers flowing
through the liquid disrupt the molecular arrangement and produce turbulence. When
the liquid is not activated, it is transparent. When the liquid is activated the molecular
turbulence causes light to be scattered in all directions and the cell appears to be
bright. The phenomenon is called dynamic scattering.
The construction of a field effect liquid crystal display is similar to that of the
dynamic scattering type, with the exception that two thin polarizing optical filters
are placed at the inside of each glass sheet. The liquid crystal material in the field
effect cell is also of different type from that employed in the dynamic scattering
cell. The material used is twisted nematic type and actually twists the light passing
through the cell when the latter is not energized. This allows the light to pass through
the optical filters and the cell appears bright. When the cell is energized, no twisting
of light takes place and the cell appears dull
Liquid crystal cells are of two types.
(i) Transmittive type and (ii) Reflective type.
In the Transmittive type cell, both glass sheets are transparent, so that light from a
rear source is scattered in the forward direction when the cell is activated. The
reflective type cell has a reflecting surface on one side of glass sheets. The incident
light on the front surface of the cell is dynamically scattered by an activated cell. Both
types of cells appear quite bright when activated even under ambient light conditions.
The liquid crystals are light reflectors or transmitters and therefore they consume
small amounts of energy (unlike light generators). Unlike LEDs which can work on
d.c. the LCDs require a.c. voltage supply. A typical voltage supply to dynamic
scattering LCD is 30 V peak to peak with 50Hz.
(OR)
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(b) (i) Explain the architecture of 8051 microcontroller. 14
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