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MC3403 Quad Operational Amplifier Guide

Datasheet

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Warlley Castro
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0% found this document useful (0 votes)
14 views9 pages

MC3403 Quad Operational Amplifier Guide

Datasheet

Uploaded by

Warlley Castro
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

MC3403, MC3303

Single Supply Quad


Operational Amplifiers
The MC3403 is a low cost, quad operational amplifier with true
differential inputs. The device has electrical characteristics similar to
the popular MC1741C. However, the MC3403 has several distinct
advantages over standard operational amplifier types in single supply http://onsemi.com
applications. The quad amplifier can operate at supply voltages as low
as 3.0 V or as high as 36 V with quiescent currents about one third of MARKING
those associated with the MC1741C (on a per amplifier basis). The DIAGRAMS
common mode input range includes the negative supply, thereby
eliminating the necessity for external biasing components in many 14
applications. The output voltage range also includes the negative SOIC−14
14 MC3x03DG
power supply voltage. D SUFFIX AWLYWW
1 CASE 751A
Features 1
• Short Circuit Protected Outputs
• Class AB Output Stage for Minimal Crossover Distortion
14
• True Differential Input Stage
• Single Supply Operation: 3.0 V to 36 V PDIP−14
MC3x03P
P SUFFIX
• Split Supply Operation: ±1.5 V to ±18 V CASE 646
AWLYYWWG
14
• Low Input Bias Currents: 500 nA Max
1 1
• Four Amplifiers Per Package x = 3 or 4
• Internally Compensated A = Assembly Location
WL = Wafer Lot
• Similar Performance to Popular MC1741C YY, Y = Year
• Industry Standard Pin−outs WW = Work Week
• ESD Diodes Added for Increased Ruggedness G = Pb−Free Package

• Pb−Free Packages are Available

PIN CONNECTIONS

Single Supply Split Supplies Out 1 1 14 Out 4


3.0 V to 36 V VCC VCC
2 - - 13
1 1 1.5 V to 18 V Inputs 1 1 4 Inputs 4
3 + + 12
2 2
VCC 4 11 VEE/GND
3 3
1.5 V to 18 V 5 + 10
4 4
Inputs 2 2 3 + Inputs 3
- -
VEE, GND VEE 6 9

Out 2 7 8 Out 3

(Top View)

ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.

© Semiconductor Components Industries, LLC, 2012 1 Publication Order Number:


January, 2012 − Rev. 11 MC3403/D
MC3403, MC3303

ORDERING INFORMATION
Device Package Shipping†
MC3303D SOIC−14
MC3303DG SOIC−14 55 Units / Rail
(Pb−Free)

MC3303DR2 SOIC−14
MC3303DR2G SOIC−14 2500 Tape & Reel
(Pb−Free)

MC3303P PDIP−14
MC3303PG PDIP−14 25 Units / Rail
(Pb−Free)

MC3403D SOIC−14
MC3403DG SOIC−14 55 Units / Rail
(Pb−Free)

MC3403DR2 SOIC−14
MC3403DR2G SOIC−14 2500 Tape & Reel
(Pb−Free)

MC3403P PDIP−14
MC3403PG PDIP−14 25 Units / Rail
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply Voltages Vdc
Single Supply VCC 36
Split Supplies VCC, VEE ±18
Input Differential Voltage Range (Note 1) VIDR ±36 Vdc
Input Common Mode Voltage Range (Notes 1 and 2) VICR ±18 Vdc
Storage Temperature Range Tstg −55 to +125 °C
Operating Ambient Temperature Range TA °C
MC3303 −40 to +85
MC3403 0 to +70
Junction Temperature TJ 150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Split power supplies.
2. For supply voltages less than ±18 V, the absolute maximum input voltage is equal to the supply voltage.

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2
MC3403, MC3303

ELECTRICAL CHARACTERISTICS
(VCC = +15 V, VEE = −15 V for MC3403; VCC = +14 V, VEE = GND for MC3303 TA = 25°C, unless otherwise noted.)

MC3403 MC3303

Characteristic Symbol Min Typ Max Min Typ Max Unit


Input Offset Voltage VIO − 2.0 10 − 2.0 8.0 mV
TA = Thigh to Tlow (Note 3) − − 12 − − 10

Input Offset Current IIO − 30 50 − 30 75 nA


TA = Thigh to Tlow − − 200 − − 250

Large Signal Open Loop Voltage Gain AVOL V/mV


VO = ±10 V, RL = 2.0 k 20 200 − 20 200 −
TA = Thigh to Tlow 15 − − 15 − −
Input Bias Current IIB − −200 −500 − −200 −500 nA
TA = Thigh to Tlow − − −800 − − −1000

Output Impedance f = 20 Hz zo − 75 − − 75 − 
Input Impedance f = 20 Hz zi 0.3 1.0 − 0.3 1.0 − M
Output Voltage Range VO V
RL = 10 k ±12 ±13.5 − 12 12.5 −
RL = 2.0 k ±10 ±13 − 10 12 −
RL = 2.0 k, TA = Thigh to Tlow ±10 − − 10 − −
Input Common Mode Voltage Range VICR +13 V +13 V − +12 V +12.5 V − V
−VEE −VEE −VEE −VEE

Common Mode Rejection RS ≤ 10 k CMR 70 90 − 70 90 − dB


Power Supply Current (VO = 0) RL = ∞ ICC, IEE − 2.8 7.0 − 2.8 7.0 mA
Individual Output Short−Circuit Current (Note 4) ISC ±10 ±20 ±45 ±10 ±30 ±45 mA
Positive Power Supply Rejection Ratio PSRR+ − 30 150 − 30 150 V/V
Negative Power Supply Rejection Ratio PSRR− − 30 150 − 30 150 V/V
Average Temperature Coefficient of Input IIO/T − 50 − − 50 − pA/°C
Offset Current
TA = Thigh to Tlow
Average Temperature Coefficient of Input VIO/T − 10 − − 10 − V/°C
Offset Voltage
TA = Thigh to Tlow
Power Bandwidth BWp − 9.0 − − 9.0 − kHz
AV = 1, RL = 10 k VO = 20 V(p−p), THD = 5%
Small−Signal Bandwidth BW − 1.0 − − 1.0 − MHz
AV = 1, RL = 10 k VO = 50 mV
Slew Rate AV = 1, Vi = −10 V to +10 V SR − 0.6 − − 0.6 − V/s
Rise Time AV = 1, RL = 10 k VO = 50 mV tTLH − 0.35 − − 0.35 − s
Fall Time AV = 1, RL = 10 k VO = 50 mV tTLH − 0.35 − − 0.35 − s
Overshoot AV = 1, RL = 10 k VO = 50 mV os − 20 − − 20 − %
Phase Margin AV = 1, RL = 2.0 k, VO = 200 pF m − 60 − − 60 − °
Crossover Distortion − − 1.0 − − 1.0 − %
(Vin = 30 mVpp,Vout= 2.0 Vpp, f = 10 kHz)
3. MC3303: Tlow = −40°C, Thigh = +85°C, MC3403: Tlow = 0°C, Thigh = +70°C
4. Not to exceed maximum package power dissipation.

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3
MC3403, MC3303

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.)
MC3403 MC3303

Characteristic Symbol Min Typ Max Min Typ Max Unit


Input Offset Voltage VIO − 2.0 10 − − 10 mV
Input Offset Current IIO − 30 50 − − 75 nA
Input Bias Current IIB − −200 −500 − − −500 nA
Large Signal Open Loop Voltage Gain AVOL 10 200 − 10 200 − V/mV
RL = 2.0 k
Power Supply Rejection Ratio PSRR − − 150 − − 150 V/V
Output Voltage Range (Note 5) VOR Vpp
RL = 10 k, VCC = 5.0 V 3.3 3.5 − 3.3 3.5 −
RL = 10 k, 5.0 ≤ VCC ≤ 30 V VCC−2.0 VCC−1.7 − VCC−2.0 VCC−1.7 −
Power Supply Current ICC − 2.5 7.0 − 2.5 7.0 mA
Channel Separation CS − −120 − − −120 − dB
f = 1.0 kHz to 20 kHz
(Input Referenced)
5. Output will swing to ground with a 10 k pull down resistor.

Bias Circuitry
Common to Four
Output Amplifiers
VCC
Q19 Q18 Q27
Q20 Q17
Q16

Q23
40 k
5.0 pF Q29
31k Q28
Q1
+ Q15
Q22 Q24
2.0 k Q13
Inputs 25
Q9
37 k Q11
- Q21 Q25 Q12
Q6 Q30

Q2 Q5 2.4 k
Q7 Q10
Q3 Q4 60 k Q8
VEE (GND)

Figure 1. Representative Schematic Diagram


(1/4 of Circuit Shown)

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MC3403, MC3303

CIRCUIT DESCRIPTION

stage performs not only the first stage gain function but also
performs the level shifting and Transconductance reduction
functions. By reducing the Transconductance, a smaller
compensation capacitor (only 5.0 pF) can be employed, thus
5.0 V/DIV

saving chip area. The Transconductance reduction is


accomplished by splitting the collectors of Q24 and Q22.
Another feature of this input stage is that the input common
mode range can include the negative supply or ground, in
single supply operation, without saturating either the input
devices or the differential to single−ended converter. The
second stage consists of a standard current source load
20 s/DIV amplifier stage.
The output stage is unique because it allows the output to
Figure 2. Inverter Pulse Response swing to ground in single supply operation and yet does not
exhibit any crossover distortion in split supply operation.
The MC3403/3303 is made using four internally This is possible because Class AB operation is utilized.
compensated, two−stage operational amplifiers. The first Each amplifier is biased from an internal voltage regulator
stage of each consists of differential input device Q24 and which has a low temperature coefficient, thus giving each
Q22 with input buffer transistors Q25 and Q21 and the amplifier good temperature characteristics as well as
differential to single ended converter Q3 and Q4. The first excellent power supply rejection.

120
AV = 100 VCC = 15 V
VEE = -15 V
OPEN LOOP VOLTAGE GAIN (dB)
0.5 V/DIV

100
TA = 25°C
A VOL , LARGE SIGNAL

80

60

40

20
50 mV/DIV

*Note Class A B output stage produces distortion less sinewave. -20


1.0 10 100 1.0 k 10 k 100 k 1.0 M
50 s/DIV f, FREQUENCY (Hz)

Figure 3. Sine Wave Response Figure 4. Open Loop Frequency Response

30
TA = 25°C
30
VO, OUTPUT VOLTAGE RANGE (V pp)

25 +15 V
VO, OUTPUT VOLTAGE (Vpp )

-
20 VO
+
-15 V 10 k
20
15

10

5.0 10
TA = 25°C
0

-5.0 0
1.0 k 10 k 100 k 1.0 M 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20
f, FREQUENCY (Hz) VCC AND (VEE), POWER SUPPLY VOLTAGES (V)

Figure 5. Power Bandwidth Figure 6. Output Swing versus Supply Voltage

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5
MC3403, MC3303

300 VCC = 15 V
VEE = -15 V

I IB , INPUT BIAS CURRENT (nA)


I IB, INPUT BIAS CURRENT (nA)

TA = 25°C 170

200

160
100

150
-75 -55 -35 -15 5.0 25 45 65 85 105 125 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20
T, TEMPERATURE (°C) VCC AND (VEE), POWER SUPPLY VOLTAGES (V)

Figure 7. Input Bias Current Figure 8. Input Bias Current


versus Temperature versus Supply Voltage

VCC 50 k
1N914
VCC
10 k 5.0 k
R2 - 1N914
1/2 VCC
MC3403 VO 10 k
+ Vref -
1/2
MC3403 VO
+
10 k
R1 1 fo = 1
R1 Vref =  VCC 2RC
VO = R1 +R2 2
R C For: fo = 1.0 kHz
1 R C R = 16 k
VO = V
2 CC C = 0.01 F

Figure 9. Voltage Reference Figure 10. Wien Bridge Oscillator

1 R2 Hysteresis
e1 + R
C R VOH
1/2
MC3403
− R1
Vref - VO
1/2
MC3403 VO
a R1 - Vin + VOL
1/2
R1 eo
MC3403 VinL VinH
+ R1
b R1 VinL= (VOL -Vref) +Vref Vref
1 R1 +R2
R
- 1/2 C
R1
MC3403 VinH= (VOH -Vref) +Vref
R1 +R2
e2 +
R
R1
Vh= (VOH -VOL)
eo = C (1 +a +b) (e2 −e1) R1 +R2

Figure 11. High Impedance Differential Figure 12. Comparator with Hysteresis
Amplifier

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MC3403, MC3303

R fo = 1
R 2RC
100 k

C R1 = QR 1
C1 C Vref = V
R2 2 CC
Vin - R2 = R1
1/2 TBP R = 160 k
- 100 k
MC3403 1/2 R3 = TNR2 C = 0.001 F
-
+ MC3403 1/2 C1 = 10 C R1 = 1.6 M
+ MC3403 R2 = 1.6 M
Vref + R3 = 1.6 M
Vref
Vref Bandpass R3
Output
R1
R2
- C1
1/2
MC3403 Notch Output
For: fo = 1.0 kHz Where: TBP = center frequency gain
Q = 10 TN = passband notch gain +
TBP =1 Vref
TN =1
Figure 13. Bi−Quad Filter

VCC
C R3
R1 C
Vin - CO
1/2
MC3403 VO
+ CO = 10 C
1 R2
Vref = V
2 CC
Triangle Wave R2 1
Vref Vref = V
Vref Output 300 k 2 CC
Given: fo = center frequency
+ R3
1/2 A(fo) = gain at center frequency
MC3403 + Square Wave
75 k 1/2
- MC3403 Output Choose value fo, C
R1
100 k - Q R3 R1 R5
Then: R3 = R1 = R2 =
Vref  fo C 2 A(fo) 4Q2 R1 -R5
C
Oo fo
Rf For less than 10% error from operational amplifier < 0.1
BW
where fo and BW are expressed in Hz.
R1 +RC R2 R1
f= if R3 = If source impedance varies, filter may be preceded with
4 CRf R1 R2 +R1 voltage follower buffer to stabilize filter parameters.

Figure 14. Function Generator Figure 15. Multiple Feedback Bandpass Filter

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MC3403, MC3303

PACKAGE DIMENSIONS

SOIC−14
CASE 751A−03
ISSUE H

NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
−A− 2. CONTROLLING DIMENSION: MILLIMETER.
14 8 3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
−B− 5. DIMENSION D DOES NOT INCLUDE
P 7 PL DAMBAR PROTRUSION. ALLOWABLE
0.25 (0.010) M B M DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
1 7 CONDITION.

G MILLIMETERS INCHES
R X 45 _ F DIM MIN MAX MIN MAX
C A 8.55 8.75 0.337 0.344
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
−T− F 0.40 1.25 0.016 0.049
K M J
SEATING D 14 PL G 1.27 BSC 0.050 BSC
PLANE J 0.19 0.25 0.008 0.009
0.25 (0.010) M T B S A S K 0.10 0.25 0.004 0.009
M 0_ 7_ 0_ 7_
P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.019

SOLDERING FOOTPRINT*
7X
7.04 14X
1.52
1
14X
0.58

1.27
PITCH

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering


details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

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8
MC3403, MC3303

PACKAGE DIMENSIONS

PDIP−14
CASE 646−06
ISSUE P

NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14 8 2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
B FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
1 7 5. ROUNDED CORNERS OPTIONAL.

INCHES MILLIMETERS
A DIM MIN MAX MIN MAX
A 0.715 0.770 18.16 19.56
B 0.240 0.260 6.10 6.60
F L C 0.145 0.185 3.69 4.69
D 0.015 0.021 0.38 0.53
F 0.040 0.070 1.02 1.78
N C G 0.100 BSC 2.54 BSC
H 0.052 0.095 1.32 2.41
−T− J 0.008 0.015 0.20 0.38
K 0.115 0.135 2.92 3.43
SEATING L 0.290 0.310 7.37 7.87
PLANE
K J M −−− 10 _ −−− 10 _
H G D 14 PL N 0.015 0.039 0.38 1.01
M
0.13 (0.005) M

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION


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9

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