COMBINATIONAL CIRCUIT
MULTIPLEXERS AND
DEMULTIPLEXERS
Dwumfour Abdullai Aziz Slide 1
MULTIPLEXERS
² Multiplexing means transmitting large number of
information unit over a smaller number of channels or lines.
² The digital multiplexer, shortened to “MUX”, is a
combinational logic circuit that select a binary information
from one of many input lines and directs it to a single
output line.
² It has also data-select inputs or control signals that permit
digital data on any of the inputs to be switched to the output
line.
² A general multiplexer (MUX) has 2n-input signals, n- data
select inputs or control signals and one output signal
² Common multiplexers include 2:1, 4:1, 8:1 and 16:1
multiplexers
² Generally, the number of select input is given log 2n , where
n is the number of input lines Slide 2
Dwumfour Abdullai Aziz
MULTIPLEXERS
Benefits of Multiplexers
• It helps to reduce the number of connecting
wires
• Reduces the complexity of the logic circuit
• Reduce cost of implementing logic circuit
Uses of Multiplexers
• Telephone network
• Communication system
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MULTIPLEXERS BLOCK DIAGRAM
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2:1 MULTIPLEXERS
² A 2:1 multiplexer is a combinational circuit that uses one
control switch to connect one of two input data lines to a
single output.
² Only one of the input data lines can be aligned to the output
of the multiplexer at any given time
Dwumfour Abdullai Aziz Slide 7
2:1 MULTIPLEXERS
X
INPUT (X) OUPUT (Y)
0 A
Y 1 B
I. To determine the output we shall first find the minterms of all the
selector input.
II. We AND each minterms with its corresponding input selected
III. We find the sum of all the product terms obtained
min terms : m0 = X, m1 = X
product terms : m0 − > A. X, m1 − > B. X
Y = A. X + B. X
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2:1 MULTIPLEXERS
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WHAT IS THE FUNCTION Z???
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4:1 MULTIPLEXER
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I0
I1
I2
I3
Dwumfour Abdullai Aziz 4:1 MUX Slide 12
A.B’.C’.I4 + A.B’.C.I5 + A.B C’.I6 + A.B.C.I7
8:1 MUX
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GENERAL OUTPUT FUNCTION
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Mux
Demux
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DE-MULTIPLEXERS
q Demultiplexer function exactly in the reverse of a
multiplexer
q Demultiplexer accepts only one input and gives many
outputs.
q Generally multiplexer and Demultiplexer are used together,
because of the communication systems are bi directional.
q One(1) input Demultiplexer with n-input selector lines will
produce 2n-output lines
q Various types of Demux include: 1:2 , 1:4, 1:8, 1: 16, 1:32
Demultiplexers
Dwumfour Abdullai Aziz Slide 16
DE-MULTIPLEXERS
Dwumfour
DWUMFOUR Aziz Slide 17
AbdullaiABDUL-AZIZ
ABDULLAI
DE-MULTIPLEXERS
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DE-MULTIPLEXERS
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1:4: BLOCK DIAGRAM DEMULTIPLEXER
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TRUTH TABLE 1:4 DEMULTIPLEXER
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TRUTH TABLE 1:4 DEMULTIPLEXER
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S1 S0
TRUTH TABLE 1:4 DEMULTIPLEXER
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TRUTH TABLE 1:4 DEMULTIPLEXER
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COMBINATIONAL CIRCUIT
DECODERS AND ENCODERS
Dwumfour Abdullai Aziz Slide 25
ENCODERS
q An Encoder is a combinational logic circuit that generate n
output lines from 2n (or less) inputs.
q Thus, it takes 2n inputs lines and produces n-output lines
q performs the inverse operation of a decoder.
q At any point in time only one of the input lines is active.
q Encoders usually accept digit on its inputs, such as a
decimal or octal digit, and converts it to a coded output,
such as a binary or BCD.
q Similarly, we have 4-to-2, 8-to-3, and 16-to-4 line encoders
which corresponds to 2-to-4, 3-to-8 and 4-to-16 lines
decoders respectively, among others
Dwumfour Abdullai Aziz Slide 26
ENCODERS
WHY USE ENCODERS
q Store more information or data
q Transmit more data from source to destination
q Detect errors in data transmission easily
q Enhance speed of data transmission
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BLOCK DIAGRAM OF ENCODER
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4-to-2 ENCODER
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TRUTH TABLE FOR 4-TO-2 ENCODER
Boolean expression from the truth table:
B1=A2+A3 B0=A1+A3
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CIRCUIT DIAGRAM FOR 4-TO-2 ENCODER
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TYPES OF ENCODER
q Octal-to-Binary encoder
q Hex-to-Binary encoder
q Decimal-to-BCD encoder
q Priority encoder
Dwumfour Abdullai Aziz Slide 32
OCTAL-TO-BINARY ENCODER
²Octal numbers range from 0,1,2,3,4,5,6, and 7
²Let the octal number input be represented by:
D=[D0 D1 D2 D3 D4 D5 D6 D7]
²Where D0 =0 , D1 =1 , D2 =2 , D3 =3, D4 =4, D5 =5,
D6 =6 , D7=7
²The 3-bit binary outputs is denoted by y0, y1, y2
The block diagram and truth table is presented
below
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BLOCK DIAGRAM OCTAL –TO- BINARY
ENCODER
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OCTAL –TO-BINARY ENCODER
Dwumfour Abdullai Aziz
OCTAL –TO-BINARY ENCODER
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HEX-TO-BINARY ENCODER
² This encoder has 16 inputs and 4 outputs
² It takes a hexadecimal number which ranges from(0,1,..E, F)
² And produces 4-bit binary output
² Each time, only one input can be active.
² The truth table is presented below
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BLOCK DIAGRAME HEX-TO-BINARY ENCODER
0
1
2
4 D0
5
HEX-TO-
BINARY D1
. ENCODER
.
D2
.
.
D3
E
F
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TRUTH TABLE HEX-TO-BINARY ENCODER
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PRIORTY ENCODERS
q A priority encoder is an encoder circuit that
includes the priority function.
q The operation of the priority encoder is such that if
two or more inputs are equal to 1 at the same time,
the input having the highest priority will take
precedence.
q They are often used to control interrupt requests
by acting on the highest priority request.
q We could design 4-to-2 priority encoder, 8-to-3
priority encoder and 16-to-4 priority encoder
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OCTAL –TO-BINARY PRIORITY ENCODER
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OCTAL –TO-BINARY PRIORITY ENCODER
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OCTAL –TO-BINARY PRIORITY ENCODER
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OCTAL –TO-BINARY PRIORITY ENCODER
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DECIMAL TO BCD ENCODER
² The Decimal-to-BCD encoder have 10 inputs and 4
outputs.
² The 10 inputs are the decimal
numbers(0,1,2,3,4,5,6,7,8,9)
² The BCD is a 4-bit binary coded decimal
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DECIMAL–TO-BCD ENCODER
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DECIMAL TO BCD ENCODER
Dwumfour Abdullai Aziz
DECIMAL TO BCD ENCODER
A3 = D8 + D9
A2 = D4 + D5 + D6 + D7
A1 = D2 + D3 + D6 + D7
A0 = D1 + D3 + D5 + D7 +D9
Dwumfour Abdullai Aziz Slide 48
DECIMAL TO BCD ENCODER
D
D
D
D
D
D
D
D
D
D
Dwumfour Abdullai Aziz Slide 49
DECODERS
² Discrete quantities of information are represented in digital
systems with binary codes
² A binary code of n-bits is capable of representing up to 2n distinct
elements of coded information
² A decoder is a combinational circuit that convert binary
information from n-input lines to a maximum of 2n unique output
lines
² If n-bit decoded information has unused combinations, the
decoder output will have fewer than 2n outputs
² We shall consider n-to-m decoder here, where m<=2n. Their
purpose is to generate 2n (or fewer) minterms of n-input variables
² We shall look at the popular 2-to-4 line decoder, which decodes
two input into 4 output; each output representing one of the
minterms of the 2-input variable
Dwumfour Abdullai Aziz Slide 50
DECODERS
² A particular application of this decoder is binary-to-octal
conversion, which uses 3-to-8 decoder
² The input variable may represent a binary number, and the output
will then represent the eight digit in octal number system
² The output variables are mutually exclusive such that only one
output can be true at any point in time
² The output line whose value is 1 represent the Minterms
equivalent of the binary number presently available in the input
line
² Practical binary decoders include 2-to-4 decoder, 3-to-8 decoder
and 4-to-16 decoder
² We show the block diagram , truth table, circuit diagram of 2-to-4
line decoder
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BLOCK DIAGRAM OF 2-to-4 LINE DECODER
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TRUTH TABLE FOR 2-TO-4 DECODER
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CIRCUIT DIAGRAM FOR 2-TO-4 DECODER
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DECODER WITH ENABLED INPUT (EN)
² Some binary decoders have an additional input pin labeled
“Enable” that controls the outputs from the device.
² The Enable” input pin allows the decoded output to be
turned “ON” or “OFF” by applying a logic “1” or logic “0”
respectively to it.
² when the enable input is at logic level “0”, (EN = 0) all
outputs are “OFF” at logic “0” (for AND gates) regardless of
the state of the inputs A and B.
² Generally to implement this enabling function the 2-input
AND or NAND gates are replaced with 3-input AND or NAND
gates.
² The additional input pin represents the enable function.
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TRUTH TABLE OF 2-TO-4 LINE DECODER WITH
ENABLED INPUT Slide 56
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CIRCUIT DIAGRAM OF 2-TO-4 LINE DECODER WITH ENABLED
INPUT
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EXERCISE
Problem 1
Ø Construct a truth table for 3-to-8-line decoder.
Ø Design the appropriate circuit diagram for the
truth table constructed
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3-TO-8 DECODER
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BCD-TO-DECIMAL DECODER
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BCD-TO-DECIMAL DECODER TRUTH TABLE
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CIRCUIT DIAGRAM OF BCD-TO-DECIMAL DECODER
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BCD TO 7 SEGMENT DISPLAY
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INTRODUCTION TO
ASYNCHRONOUS SEQUENTIAL CIRCUIT
LATCHES
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