DESIGNS AND OUTCOMES OF TRANSCRANIAL MAGNETIC STIMULATION (TMS) AND REPETITIVE

TRANSCRANIAL MAGNETIC STIMULATION (rTMS) CIRCUITS

By

Daniel Senda

Bachelor of Science – Electrical Engineering

University of Nevada, Las Vegas
2020

A thesis submitted in partial fulfillment

of the requirements for the

Master of Science in Engineering – Electrical Engineering

Department of Electrical and Computer Engineering

Howard R. Hughes College of Engineering
The Graduate College

University of Nevada, Las Vegas

December 2021
Copyright by Daniel Senda, 2022

All Rights Reserved

 Thesis Approval
The Graduate College
The University of Nevada, Las Vegas

November 5, 2021

This thesis prepared by

Daniel Senda

entitled

Designs and Outcomes of Transcranial Magnetic Stimulation (TMS) and Repetitive

Transcranial Magnetic Stimulation (rTMS) Circuits

is approved in partial fulfillment of the requirements for the degree of

Master of Science in Engineering – Electrical Engineering

Department of Electrical and Computer Engineering

R. Jacob Baker, Ph.D. Kathryn Hausbeck Korgan, Ph.D.

Examination Committee Chair Vice Provost for Graduate Education &
Dean of the Graduate College
Sarah Harris, Ph.D.
Examination Committee Member

Grzegorz Chmaj, Ph.D.

Examination Committee Member

Dustin Hines, Ph.D.

Graduate College Faculty Representative

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 ABSTRACT
This thesis reports the design and outcomes of several circuits intended for transcranial

magnetic stimulation (TMS) and repetitive transcranial magnetic stimulation (rTMS) research. In simple

terms, TMS circuits are composed of four main blocks: high voltage power source, energy storage bank,

control switch, and coil. Each one of these blocks has characteristics that influence how well the circuit

will perform for TMS procedures. A successful TMS research circuit must have the ability to emit

controlled electromagnetic pulses through a coil connected to it. For the first block, voltages ranging

from 50 V to 2 kV were used. In the second block, capacitances ranging from 15 µF to 660 µF were used.

For the third block, four types of control switches were used, including power metal-oxide-

semiconductor field-effect transistors (Power MOSFETs), gas discharge tubes (GDTs), insulated-gate

bipolar transistors (IGBTs), and silicon-controlled rectifiers (SCRs). Lastly, for the coil block, different

types of coils with different parameters were used. All of the aforementioned block characteristics

influence the overall performance of the TMS circuit. Much was learned from each testing phase, and

the experience was used to improve the following designs. The latest design uses an external high

voltage power supply, has a capacitance of 660 µF, uses an IGBT device as the switching device, can

drive a wide variety of coils, and is successful enough to be used for TMS research.

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 ACKNOWLEDGEMENTS
The journey of working on the TMS project, writing this thesis, and pursuing my master's degree

has been exciting and rewarding. Numerous people helped me along the way, and I appreciate and

greatly thank all of them for it. First, I sincerely thank Dr. R. Jacob Baker, my advisory committee chair,

research professor, academic professor, and mentor. The first electrical engineering course I took was

Dr. Baker's EE 220, and it was then I realized I was on the right path to study something I have a passion

for. His dedication to ensuring students "get their money's worth" in class is invaluable, and his level of

responsibleness makes him a great role model. I appreciate the time Dr. Baker has taken to help me

with the TMS project and his help, in general, as I proceed through my academic journey with valuable

lessons and knowledge learned from him; thank you.

Secondly, I would like to thank Dr. Dustin Hines for allowing me to be a part of such a fantastic

project and for being the graduate college representative of my advisory committee. Working with Dr.

Hines has always been a pleasure, and I appreciate that he, too, has become a great mentor of mine. He

has a great sense of humor, makes time to talk about anything, and gives excellent advice. I am excited

to see how our work continues to grow as more research continues to be conducted with what has been

accomplished thus far. Thank you, Dr. Hines, for your time and dedication to your studies and students.

Additionally, I would like to thank Dr. Sarah Harris and Dr. Grzegorz Chmaj (Dr. Greg) for being

members of my advisory committee. Although I only took Dr. Harris' high-speed PCB design course

during my time at UNLV, she has had a lasting influence on me and is a great professor to learn from;

thank you for your dedication to teaching. I continue to use what I learned in her class to this day. Dr.

Greg is one of the professors that I have known the longest while attending UNLV. Dr. Greg has been of

great help over the years and has given me great advice; thank you.

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 I would also like to thank everyone who helped with the TMS project, including Haley Strong, Dr.

Rochelle Hines, April Contreras, Kendra McGlothen, Matthew Khumnark, and everyone associated with

the Hines group. In addition, I would like to thank Abraham Lopez, Francisco Mata, James Skelly, Sachin

Namboodiri, Angsuman Roy, Jazmine Boloor, David Santiago, and everyone else from Dr. Baker's group

who helped and encouraged me along the way.

I would like to thank my family and close friends for their support, including mom, dad, brother,

Miss Christian J Moreira, Edwin Hernandez, Jeiztin (Jett) Guerrero, and Zoyla Orellana. My family has

been an enormous source of encouragement and motivation to help me move forward with my goals

and life in general; they are the main thing that keeps me on the right path and keeps me moving

forward. Also, a big thank you goes out to my high school teacher, Miss Moreira, who gave me the initial

push to pursue electrical engineering and who is always willing to help me in anyway way she can. I

would also like to thank my closest friends, Edwin and Jett, who have been there since day one of my

college experience and are always there to listen and motivate me. Lastly, but equally as important,

thank you to Zoyla Orellana for all her love, support, and motivation she has given me and continues to

give me as I pursue my life goals.

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 TABLE OF CONTENTS
ABSTRACT..................................................................................................................................................... iii

ACKNOWLEDGEMENTS ................................................................................................................................ iv

TABLE OF CONTENTS.................................................................................................................................... vi

LIST OF FIGURES .......................................................................................................................................... vii

CHAPTER 1: INTRODUCTION ......................................................................................................................... 1

CHAPTER 2: POWER MOSFET TMS CIRCUIT (V1) .......................................................................................... 3

CHAPTER 3: GAS DISCHARGE TUBE (GDT) EXPERIMENTAL TMS CIRCUIT................................................... 16

CHAPTER 4: COMPREHENSIVE COIL TESTING BEGAN ................................................................................. 20

CHAPTER 5: STACKED MOSFET TMS CIRCUIT (V2) ...................................................................................... 22

CHAPTER 6: THREE PATH STACKED MOSFET TMS CIRCUIT (V3) ................................................................. 29

CHAPTER 7: PROTOTYPE IGBT TMS CIRCUIT ............................................................................................... 34

CHAPTER 8: OFFICIAL IGBT TMS CIRCUIT (V4) ............................................................................................ 38

CHAPTER 9: PROTOTYPE SCR TMS CIRCUIT ................................................................................................ 48

CHAPTER 10: IMPROVED DRIVER DESIGN FOR IGBT TMS CIRCUIT............................................................. 50

CHAPTER 11: IGBT TMS CIRCUIT (V5.1 AND V5.2) ...................................................................................... 53

CHAPTER 12: CONCLUSION ......................................................................................................................... 66

REFERENCES ................................................................................................................................................ 67

CURRICULUM VITAE .................................................................................................................................... 69

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 LIST OF FIGURES
Figure 2.1 – Schematic diagram for Power MOSFET TMS Circuit (V1) ......................................................... 4

Figure 2.2 – Front view of rendered PCB design (V1) ................................................................................... 4

Figure 2.3 – Back view of rendered PCB design (V1) .................................................................................... 5

Figure 2.4 – Front view of the assembled circuit board (V1) ........................................................................ 5

Figure 2.5 – Back view of the assembled circuit board (V1) ......................................................................... 6

Figure 2.6 – Plastic spool coil and measured inductance ............................................................................. 7

Figure 2.7 – Trial 1 of circuit 1 at 50V: (250 µs/div horizontal, and 25 V/div vertical) ................................. 7

Figure 2.8 – Trial 10 of circuit 1 at 500V: (250 µs/div horizontal, and 250 V/div vertical) ........................... 8

Figure 2.9 – Changed schematic diagram for Power MOSFET TMS Circuit (V1)......................................... 10

Figure 2.10 – Picture of the modified circuit board (V1) ............................................................................ 10

Figure 2.11 – Trial 1 at 100V: (250 µs/div horizontal, and 50 V/div vertical) ............................................. 11

Figure 2.12 – Trial 5 at 500V: (250 µs/div horizontal, and 250 V/div vertical) ........................................... 12

Figure 2.13 – Triangle wave input at 500V: (250 µs/div horizontal, and 250 V/div vertical) ..................... 13

Figure 3.1 – Schematic of experimental GDT circuit................................................................................... 17

Figure 3.2 – Finished experimental GDT circuit .......................................................................................... 17

Figure 3.3 – Air core coil (118 Ω and 87 mH). Max current flow is above 4 A (500 V/118 Ω) .................... 18

Figure 3.4 – Air core coil (23 Ω and 1.58 mH). Max current flow is around 20 A ....................................... 19

Figure 3.5 – Iron core coil (3.8 Ω and 1.55 mH). Max current flow, MOSFET has 1 Ω, is 100 A ................. 19

Figure 4.1 – Figure-eight coil (1.4 Ω and 52.6 µH) ...................................................................................... 20

Figure 4.2 – Iron core coil (4.7 Ω and 1.14 mH) .......................................................................................... 21

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Figure 5.1 – Schematic diagram for Stacked MOSFET TMS Circuit (V2) ..................................................... 22

Figure 5.2 – Front view of rendered PCB design (V2) ................................................................................. 24

Figure 5.3 – Back view of rendered PCB design (V2) .................................................................................. 24

Figure 6.1 – Schematic diagram for three-path stacked MOSFET TMS Circuit (V3) ................................... 29

Figure 6.2 – Front view of rendered PCB design (V3) ................................................................................. 30

Figure 6.3 – Back view of rendered PCB design (V3) .................................................................................. 31

Figure 6.4 – Picture of the fully assembled circuit board (V3).................................................................... 32

Figure 7.1 – Schematic diagram of IGBT TMS circuit prototype ................................................................. 35

Figure 7.2 – Connector diagram of IGBT TMS circuit prototype ................................................................. 35

Figure 7.3 – Top view of IGBT TMS circuit prototype ................................................................................. 36

Figure 7.4 – Inside view of IGBT TMS circuit prototype.............................................................................. 36

Figure 8.1 – Schematic diagram of official IGBT TMS Circuit (V4) .............................................................. 39

Figure 8.2 – Front view of rendered PCB design (V4) ................................................................................. 39

Figure 8.3 – Back view of rendered PCB design (V4) .................................................................................. 40

Figure 8.4 – Fully assembled circuit board (V4) .......................................................................................... 40

Figure 8.5 – Mistake in the design of official IGBT TMS Circuit (V4) .......................................................... 42

Figure 8.6 – IGBT datasheet table used to demonstrate the issue [4] ....................................................... 43

Figure 8.7 – Close-up of figure-eight coil showing burn mark .................................................................... 44

Figure 8.8 – Sparks created by the malfunctioning coil .............................................................................. 44

Figure 8.9 – Coil used for the interval robustness tests (insulating coating on magnet wire survived) ..... 46

Figure 8.10 – Coil that burnt the IGBT when the circuit was charged to 1.2 kV and pulsed ...................... 46

viii
Figure 8.11 – Side by side comparison between the two coils ................................................................... 47

Figure 9.1 – Schematic diagram of SCR TMS circuit.................................................................................... 48

Figure 9.2 – Fully assembled SCR circuit board .......................................................................................... 48

Figure 10.1 – Initial IGBT driver design ....................................................................................................... 50

Figure 10.2 – Improved and finalized IGBT driver design ........................................................................... 51

Figure 10.3 – Simulation results of finalized IGBT driver design ................................................................ 52

Figure 11.1 – Schematic diagram of IGBT TMS circuits (V5.1 and V5.2) [8] ............................................... 53

Figure 11.2 – Front view of rendered PCB design (V5.1) ............................................................................ 54

Figure 11.3 – Back view of rendered PCB design (V5.1) ............................................................................. 55

Figure 11.4 – Fully assembled circuit board (V5.1) ..................................................................................... 56

Figure 11.5 – Front view of rendered PCB design (V5.2) ............................................................................ 57

Figure 11.6 – Back view of rendered PCB design (V5.2) ............................................................................. 57

Figure 11.7 – Front and back pictures of the fully assembled circuit board (V5.2) .................................... 58

Figure 11.8 – Probing reference guide used to troubleshoot driver .......................................................... 59

Figure 11.9 – Schematic diagram showing where the mistake was made ................................................. 60

Figure 11.10 – Close-up of correction of the error ..................................................................................... 61

Figure 11.11 – Pictures of burnt diode and damage to the board ............................................................. 63

Figure 11.12 – Picture showing charring left on the desk from test .......................................................... 64

ix
 CHAPTER 1: INTRODUCTION
Transcranial magnetic stimulation (TMS) is a non-invasive way to stimulate neurons in the brain.

Neuron stimulation can be used as a form of therapy for people who have mental illnesses. There are

hopes that TMS may be a solution to effectively treat mental diseases like depression and Alzheimer's

disease; this is one of the many reasons why continuing to develop and research TMS is necessary.

High-power electromagnetic waves are required to perform non-invasive neuron stimulation on

a subject. These electromagnetic waves need to be strong enough to travel through the skull and into

the subject's brain. The characteristics of these waves can determine how effective they are at

stimulating neurons. The more control there is over these characteristics, the better chance of

conducting successful TMS trials. Special circuitry is required to generate high-power electromagnetic

waves that allow control of important circuit parameters which influence wave characteristics.

In a simplified manner, a TMS circuit is composed of a high voltage power source, energy

storage bank, control switch, and coil. Even though the simplified composition contains four main

blocks, some factors should be considered within each block, and each block can be its own intricate

sub-circuit. The following sections demonstrate what it takes to create a circuit that can be used to

conduct successful TMS trials on small animals and be robust enough to withstand the electrical stress

of high-power electromagnetic wave generation.

The idea of designing a TMS circuit for research purposes was proposed by Dr. Hines, a

professor of neuroscience in UNLV's psychology department. His expertise is in performing research that

focuses on brain function and topics associated with the central nervous and peripheral systems. Having

a TMS circuit that can perform well is advantageous to be able to carry out neuroscience research. The

work documented in this thesis was associated with the neuroscience research conducted by Dr. Hines

1
and his group; they will be referred to as the "Hines group" from this point forward. The goal of the

author and Dr. Baker was to explore different TMS circuit designs and determine what works best. Once

a circuit was designed and created, it would go through initial in-house testing and then be handed off

to the Hines group for further testing; the testing feedback was invaluable when finding ways to

improve the circuit's performance. Various design revisions led to the latest TMS circuit currently being

used by the Hines group for research.

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 CHAPTER 2: POWER MOSFET TMS CIRCUIT (V1)
The composition of this first circuit can be simplified by referring to the main blocks of a TMS

circuit. For the high voltage power source block, a high voltage power supply available in the lab was

used. As for the energy storage bank, it is composed of a single 100 µf electrolytic capacitor. An

additional capacitor slot was added to the PCB design to allow the ability to include another 100 µf

capacitor in the energy storage bank. When the second capacitor is added, the resulting equivalent

capacitance of the storage bank is 200 µf. The next block to describe is the control switch; a power

MOSFET was used in this first attempt of the circuit. The gate of the power MOSFET is triggered through

an external function generator. The parameters of the function generator determine how the switching

occurs when the circuit is triggered. Lastly, there is the coil connected to the circuit that emits the

electromagnetic waves needed for TMS. Note, a flyback diode was included in the design to prevent the

MOSFET from frying when it gets turned off; the left-over energy stored in the coil is dumped to ground

through the diode.

The following figures show the schematic diagram and PCB design of the first version of the TMS

circuit. Below is a description of the first design.

• There is a top and bottom ground plane that covers most of the board on both sides. The two

planes are connected through several vias.

• Vias heavily surrounded the source pin of the MOSFET to ensure a solid connection to the

ground plane, given that the planes provide the return path of the current to the capacitor.

• The high voltage traces were made extra wide since a big spike of current could run through

them depending on the testing situation.

• An input called Ext. HV+ was included, providing the ability to charge the capacitor bank instead

of using the onboard DC-DC converter.

3
• Banana jacks are used for high voltage and ground connections.

• For the signal in and out, SMA connectors were used.

• Euro-style headers were used to facilitate the connection of the coil to the circuit.

Figure 2.1 – Schematic diagram for Power MOSFET TMS Circuit (V1).

Figure 2.2 – Front view of rendered PCB design (V1).

4
 Figure 2.3 – Back view of rendered PCB design (V1).

Figure 2.4 – Front view of the assembled circuit board (V1).

5
 Figure 2.5 – Back view of the assembled circuit board (V1).

Something to note is that several of the components in this design were selected to help the

circuit withstand high amounts of power. A DC-to-DC converter was added to the PCB design to step up

the input voltage of an average power supply to the high voltages required for TMS procedures.

However, it was not used since the converter's output current was minimal, and charging the capacitor

bank would take too long. Having the external high voltage input made testing quicker and easier. It was

also easy to select various voltages using the high voltage power supply. Also included in the PCB design

was a 100:1 onboard attenuator for probing. As it turned out, the attenuator was not very useful, and a

high voltage differential probe was used during circuit testing instead.

Once the circuit was populated and soldered, in-house testing had to be conducted to ensure

the circuit functioned as intended. The test consisted of ten measurements. The high voltage part of the

circuit was powered using a Stanford Research PS350 high voltage power supply and was increased in

increments of 50 V (50 V – 500 V). A Rigol DG1022 function generator was used as the pulse signal

source to trigger the circuit. The signal used to switch the MOSFET gate was a single pulse that was 0.5

6
ms long and had an amplitude of 10 V. A coil with a plastic spool was used with an LCR meter inductance

measurement of 715 µH, as shown by the picture below.

Figure 2.6 – Plastic spool coil and measured inductance.

The following figures show a couple of the results from the test. The yellow trace is the input

signal, 10 V, that triggers the MOSFET/circuit. The blue trace is the drain voltage of the MOSFET; this

was measured with the differential probe. Note that the scale of the blue trace changes from picture to

picture to capture the entire signal.

Figure 2.7 – Trial 1 of circuit 1 at 50V: (250 µs/div horizontal, and 25 V/div vertical).

7
 Figure 2.8 – Trial 10 of circuit 1 at 500V: (250 µs/div horizontal, and 250 V/div vertical).

From the oscilloscope figures, it is noted that the input pulse time is small enough not to allow

the 100µF capacitor bank to discharge fully. Having a small input pulse could be helpful because it cuts

down on the recharging time of the capacitor. The blue trace measures the voltage at the drain of the

MOSFET, node "Vout." Take the last waveform picture, for example; before the input pulse goes high,

the blue trace is resting at the voltage of 500 V. After the input pulse goes high, the voltage at the

MOSFET's drain shoots down to about 0 V. Then, after the input pulse goes low again, the voltage at the

MOSFET's drain goes back up to about 400 V. The MOSFET was not kept on long enough to discharge the

capacitor fully. Eventually, this voltage does go back up to 500V again if given enough time to recharge.

The oscilloscope setup used for these tests was not able to capture when recharging happens. Also,

when the MOSFET is off, the voltage on both sides of the coil is the same as it should be.

After initial testing was completed, the board was handed off to the Hines group for further

testing. The purpose of the hand-off was to have the group test the circuit and give feedback on what

8
should be changed or improved based on research needs. Unfortunately, the Hines group was not able

to finish planned testing because the circuit failed. Upon initial inspection, it was easy to see that the

capacitors were not charging up because the current draw from the high voltage power supply was

constant. The circuit was further troubleshooted, and it was found that the power MOSFET had burned

out. The component was replaced and sent back to the group for testing once more. Again, the same

issue occurred. The weak point of this circuit was the power MOSFET. It turns out that when the input

pulse signal time is increased, it can quickly burn the MOSFET because it allows for a high current to flow

for a more extended period. This issue led to some experimentation with the circuit.

TMS circuits are known to emit a "click" when they are triggered. The clicking noise comes from

the coil when the circuit is triggered. There seems to be a correlation between the sound level and the

strength of the electromagnetic wave created when TMS circuits are triggered [5]. This led the Hines

group on a mission to get a louder click from the coil since the one being emitted using the 0.5 ms long

pulse was relatively soft. In an attempt to achieve a more audible click, the pulse length time was

increased. However, increasing the pulse length was leading to the demise of power MOSFETs. To try

and decrease the probability of burning MOSFETs, the 100k resistor in series with the gate of the

MOSFET was removed, and a short was added. The reasoning behind making the change was to turn the

MOSFET on/off much faster. By speeding up the switching times, the amount of time the device spends

in triode decreases, which could alleviate some stress and hopefully help increase the circuit life. In

addition, this change could maybe help increase the audible level of the click. Once the change was

made, more testing ensued.

For the next testing phase, the rest of the circuit was kept the same. The schematic diagram

below was updated to reflect the change to the TMS circuit. This test consisted of five trials. The high

voltage part of the circuit was powered using the high voltage power supply and was increased in

9
increments of 100 V (100 V – 500 V). Like the previous tests, the input signal used to switch the gate of

the MOSFET was a pulse that was 0.5 ms long and had an amplitude of 10 V.

Figure 2.9 – Changed schematic diagram for Power MOSFET TMS Circuit (V1).

Figure 2.10 – Picture of the modified circuit board (V1).

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 The following couple of pictures show some results from this testing phase. The yellow trace is

the input signal pulse that triggers the circuit. The blue trace is the drain voltage of the MOSFET. Note

that the scale of the blue trace changes throughout the trials to capture the entire signal.

Figure 2.11 – Trial 1 at 100V: (250 µs/div horizontal, and 50 V/div vertical)..

11
 Figure 2.12 – Trial 5 at 500V: (250 µs/div horizontal, and 250 V/div vertical).

As can be observed from the oscilloscope figures, the voltage at the drain of the MOSFET has a

steeper voltage change indicating that the MOSFET is switching faster. Unfortunately, the click of the

coil was not noticeably louder. Also, even if the MOSFETs were less likely to burn out, it would not help

when longer input pulses are used.

The first presented challenge was to determine what change to make in the design of the circuit

to get a louder click, which loosely correlates to the strength of the magnetic field emitted by the coil.

After going through a TMS article, it was noted that the authors of the piece were using air core and iron

core coils [9]. Up to this point, only air core coils had been used, and testing with an iron core coil would

be a change that could improve the results. The use of iron core coils was brought up to the Hines

group, and the group worked to create a few of these types of coils to test. In addition, the TMS article

used a modified triangle wave as the input pulse. The magnetic field output of the circuit closely

12
resembled the input waveform. A triangular waveform input was programmed into the function

generator for a quick run with the MOSFET circuit, but as expected, the output was not triangular. For

the most part, MOSFETs are either entirely on or off. However, there is the triode region where the

MOSFET is in the middle of both states. The time frame the MOSFET spends in the triode region is small

under these tests and is why the resulting output takes on a square form rather than a triangular form,

as seen in the figure below. The option to design a circuit where the output closely resembles the input

was added to the list of ideas that could be attempted at some point if other approaches did not meet

circuit performance requirements.

Figure 2.13 – Triangle wave input at 500V: (250 µs/div horizontal, and 250 V/div vertical).

A video found online by the Hines group sparked ideas on potentially modifying the current

circuit design to improve performance [6]. The video creator was using a bank of capacitors for his TMS

circuit, while the MOSFET circuit being tested by the Hines group only had one capacitor. As previously

mentioned, the PCB board was designed with an additional capacitor slot that made it simple to add

13
another 100µF capacitor in parallel with the current capacitor. Another notable observation from the

video was the person was using a silicon-controlled rectifier as the switching mechanism in his circuit.

The generated list of ideas was a good place to refer to when seeking out more changes that could

improve the circuit design.

The most straightforward changes to implement from the list were to use iron core coils and

add the additional capacitor to the circuit. One of the characteristics of iron core coils is that they usually

create stronger electromagnetic fields than an air core coil of the same size. By having a stronger

electromagnetic field, the click from the coil should be noticeably louder when the circuit is triggered.

Again, the strength of the electromagnetic wave and coil click loosely correlate, and at this initial stage

of testing, that was enough for the group to go by. The Hines group designed and created iron core coils

using 3D printed plastic coil spools with hollow centers filled with iron powder.

An important thing to note is there is a downside to having an iron core coil. Although the

electromagnetic field of an iron core coil will be stronger, the coil also loses focality [3]. Focality is the

ability of the coil to produce a narrow and focused wave that is more precise and accurate when it

comes to stimulating specific parts of the brain. It is essential only to stimulate the targeted area of the

brain when conducting TMS procedures on a subject, and good focality is necessary for accuracy. By

having a less focal wave, the risk of stimulating other parts of the brain not targeted by the operator of

the TMS device is increased. Although focality is vital for performing TMS procedures on subjects, it was

not strictly considered for these initial tests since no subjects were being used. The main goal was to

experiment with the circuit to get better ideas on how to improve it to meet the Hines group

requirements.

Once the changes were officially made to the MOSFET circuit, using an iron core coil and extra

capacitor, another test was performed following the same procedures as the previous test. However,

14
this time the oscilloscope was not used to get waveforms because the focus had shifted to the volume

level of the coil click. The coil click was not scientifically recorded; the operators' hearing was used to

note a noticeable difference in volume levels between the air core and iron core coil clicks.

Unfortunately, the coil clicks seemed to be about the same, so it was concluded that iron core coils did

not make a significant improvement in terms of coil click volume. The author placed a ring, made out of

a staple, on top of the coil before triggering the circuit when testing. When triggered, the ring would

jump off the spool. This helped give the author a visual confirmation that the coil was emitting an

electromagnetic wave. Still, it was not strong enough to meet the Hines group performance

requirements. Dr. Baker suggested creating a circuit that could handle higher voltages to see if that

would make a difference in the volume level of the coil clicks, leading to an unusual experimental circuit.

15
CHAPTER 3: GAS DISCHARGE TUBE (GDT) EXPERIMENTAL TMS CIRCUIT
The subsequent desired change was to increase the high voltage capability of the TMS circuit.

For this round, the goal was to at least be able to get up to a high voltage of 1.2 kV. Designing a circuit

that can operate at this voltage level can be challenging since it narrows down the components that can

be used in the circuit. Only a few components can handle this amount of high voltage, and ample

component research was required to generate an appropriate parts list. One of the highest voltage

ratings for power MOSFETs was 1.2 kV and initially seemed to be the perfect solution for the control

switch block. However, as the voltage rating for these MOSFETs increased, the amperage rating

decreased. The current rating on these high voltage power MOSFETs was too low to consider using in

this next circuit version. After conversing with other students in Dr. Baker's group, Angsuman Roy

suggested that a gas discharge tube (GDT) be used as the control switch. Angsuman did warn that it

would be an unorthodox way to use the GDTs, but it would meet the voltage and current requirements

for the test circuit, so it was decided that it was worth the attempt. The next challenge was to find

capacitors that had voltage ratings of at least 1.2 kV. The highest-rated electrolytic capacitor checked in

at 600 V. The only capacitors that could handle this amount of voltage were ceramic or film capacitors.

Still, the downside to these is that the capacitance values were low. Once the parts list was finalized, the

components were ordered. The circuit was then constructed when the parts arrived.

The GDT acquired had a discharge voltage of 2 kV, which exceeded the 1.2 kV goal. The

capacitor bank of this experimental circuit was composed of fifteen 1 µf film capacitors, rated to a DC

voltage of 2 kV, connected in parallel. The high voltage that fed the circuit came from the same Stanford

Research power supply previously used. Lastly, an air core coil with a plastic spool was used. The figure

below is a schematic diagram showing how everything was connected.

16
 Figure 3.1 – Schematic of experimental GDT circuit.

Figure 3.2 – Finished experimental GDT circuit.

As can be seen from the picture, the circuit was just put together without a PCB for

experimental purposes only. One thing to note is there is a significant disadvantage to using a GDT as

the control switch is that the precise time the GDT fires is not easy to control/predict. It is not like the

previous MOSFET-based design that fires when it is triggered through the input signal. In addition, the

17
circuit is very bulky because the film capacitors used are big, and fifteen are needed to get a higher

capacitance for the energy storage bank.

The way this circuit works is simple. The high voltage power supply is turned on at 2 kV, and the

operators wait until the capacitors charge up to that voltage. The GDT will automatically switch once the

capacitors reach a charge of 2 kV dumping the energy stored in the capacitor bank into the coil. This

straightforward procedure was followed a few times to test the circuit. The main goal of these tests was

to determine if the significant increase in high voltage would create a noticeably louder coil click. Once

the high voltage power supply was turned on, the operators waited for the circuit to fire. Eventually, it

did fire, but the results were not impressive. It seemed like the GDT component itself made a louder

noise than the coil. Three different types of coils with different characteristics were used with this setup,

as seen in the figures below. Again, none of them emitted a noticeably loud coil click. After some

pondering, the best explanation for the unfortunate results was that the capacitor bank was not large

enough to store enough charge to dump into the coil when triggered.

Figure 3.3 – Air core coil (118 Ω and 87 mH). Max current flow is above 4 A (500 V/118 Ω).

18
 Figure 3.4 – Air core coil (23 Ω and 1.58 mH). Max current flow is around 20 A..

Figure 3.5 – Iron core coil (3.8 Ω and 1.55 mH). Max current flow, MOSFET has 1 Ω, is 100 A.

At the end of the GDT circuit testing, it was decided that this circuit was not the way to go.

Again, the control over the circuit was small because of the nature of a GDT. As stated before in the

beginning, to have a high-performing TMS circuit, it is vital to control as many factors of the circuit as

possible. In addition, going up to a much higher voltage with a combination of a low-value capacitor

bank did not seem to make a significant difference in the coil click volume level. Therefore, the GDT

circuit was put to rest, and new developments were pursued.

19
 CHAPTER 4: COMPREHENSIVE COIL TESTING BEGAN
One of the following things explored that could have influenced the coil click volume level was

the coil design. An observation from the previous testing was that the coil's resistance was affecting how

much current was flowing through the circuit. These tests were conducted using coils with 36 gauge

magnet wire with roughly 270 turns. It was proposed to experiment with a variety of coils in future trials

to see how they perform. First, different gauge coils that went down to 28 gauge magnet wire were to

be used. In addition, using different shapes of coils was to be tested. Lastly, the polarity of the coil was

something to start paying closer attention to.

The Hines group made several different types of coils to experiment with in the following tests

and sent over various coils tested in-house using the MOSFET TMS circuit (V1). Among all tested, there

were a couple that stood out the most. After several tests, the two coils that seem to be noticeably

louder are the figure-8 coil that was epoxied and the iron core coil composed of smaller gauge wire, as

seen below.

Figure 4.1 – Figure-eight coil (1.4 Ω and 52.6 µH).

20
 Figure 4.2 – Iron core coil (4.7 Ω and 1.14 mH).

Given that the coils made a noticeably louder coil click when triggered, they and everything else

were handed off to the Hines group for further testing. Again, it was concluded that the circuit with the

louder clicking coils still did not meet envisioned performance. Therefore, a new TMS circuit design with

better performance parameters was needed. Dr. Baker suggested trying a stacked MOSFET TMS circuit

that could theoretically deliver 1.2 kV to the coil while withstanding higher currents.

21
 CHAPTER 5: STACKED MOSFET TMS CIRCUIT (V2)
The goal of the stacked MOSFET circuit was to create a circuit that could deliver 1.2 kV to the

coil, have good current capabilities, and have a larger sized capacitor bank than V1. In addition, the idea

of having control over the control switch, unlike the GDT, was essential. MOSFETs are used in this

design, like in V1, so control over the switching block was gained back. On another note, the unique

design of this circuit allows the use of power MOSFETs rated for 600 V. Given that the MOSFETs are

stacked, the voltage drop across each MOSFET would be 600 V when the circuit is operating at its 1.2 kV

limit [2]. The advantage of using power MOSFETs rated for 600 V versus 1.2 kV is that the current rating

for the 600 V MOSFETs is higher. The schematic diagram below shows the design of the stacked MOSFET

TMS circuit (V2).

Figure 5.1 – Schematic diagram for Stacked MOSFET TMS Circuit (V2).

The MOSFETs in this design saturate at 100 A and had to be kept in mind when testing; this

means that the voltage across the inductor could go to zero before the input signal shuts off the TMS

switching control. Therefore, special care is needed to use narrower trigger pulse lengths to prevent

22
burning the MOSFETs. The voltage across an inductor is related to the current flow in the inductor

through the equation V = L*di/dt. If the voltage is 1.2 kV, then for an inductance of 1 mH, the di/dt is

1200V/1e-3H or 1.2A/µs. So for a 100 µs time frame, the current in the inductor changes linearly from 0

to 120 A. This rapid rise in current is something essential to consider when setting the input pulse

length. During the testing of V1, a 500 µs pulse length was used, and if that burned the MOSFETs, then a

shorter time was used. When the current in the MOSFETs saturates, that is stops going up, so too does

the current in the inductor (the same current flows in the MOSFETs as in the inductor). If the current

stops increasing, then di/dt = 0, and thus the voltage across the inductor goes to zero. The drain voltages

of the MOSFETs will shoot back up to 1.2 kV while they are still pulling 70 A, which will blow up the

MOSFETs. So, starting with narrower pulse widths when testing should be done.

After the schematic design, the next step in the process was to find all of the components used

in the circuit. Once all the components were found, the proceeding step was to design the PCB for TMS

V2. Below are some highlights of the PCB design.

• There is a top and bottom ground plane, and they are connected with several vias.

• Banana jacks are used for the high voltage and ground inputs.

• An SMA connector is used for the signal-in utilized to trigger the MOSFETs.

• A euro-style header is used to connect the coil to the circuit.

• The current limiting factor is power MOSFET

o Continuous drain current: 46 A at 25 degrees Celsius

o Pulsed drain current: 212 A at 25 degrees Celsius

23
Figure 5.2 – Front view of rendered PCB design (V2).

Figure 5.3 – Back view of rendered PCB design (V2).

24
 The PCB design was then sent to be manufactured, and the components needed to populate it

were ordered. Once everything was received, the board was assembled. The initial testing focused solely

on the MOSFETs to make sure they were switching correctly, based on the input signal. The testing was

started by inputting 25 V into the HV input and connecting the function generator to the signal-in input.

The function generator was set to send a pulse of 500 µs. When the energy storage bank reached a

voltage of 25 V, the circuit was triggered through the function generator. By probing this setup while

repeating the previous steps, it was noticed that only MOSFET M1 (the one with the gate connected

straight to the function generator) was switching. After pondering why this behavior was occurring, it

was realized that having a high voltage input of 25 V was not enough to cause MOSFET M2 to switch.

The resulting VGS in MOSFET M2 was too low and did not go above the threshold voltage.

Therefore, it was decided to test at higher voltages and observe the minimum high voltage

needed to get MOSFET M2 to switch when the circuit is triggered. The procedure used to get a ballpark

of the minimum high voltage was to start the high voltage input at 50 V and go up in increments of 50 V

until MOSFET M2 starts switching. Note, since there was going to be higher voltage input, the function

generator pulse length was shortened from 500 µs to 100 µs to reduce the possibility of a MOSFET

failure. Once this testing started, MOSFET M2 did not start switching until the 400 V step was reached.

Thus, the circuit needs to have a minimum high voltage of around 400 V for the stacked MOSFETs to

switch as designed to operate. In other words, the 400 V input could create a large enough VGS to

surpass the threshold voltage of the MOSFET.

Now that the switching of the stacked MOSFET design was confirmed to work with a minimum

high voltage of 400 V, more official testing was planned. The following procedure consisted of testing

the high voltage limits of the circuit, going from 400 V to 1.2 kV in 100 V increments. In addition, the

pulse length was kept at 100 µs for the MOSFETs sake, and a round spool coil was used. The procedure

25
had the author test the MOSFETs after each increment and confirm if they survived. Also, the author

was listening to the volume of the coil clicks and determining if they got louder. The circuit made it up to

1.2 kV with no issues. It is believed that having a small pulse length helped increase the survivability of

the MOSFETs by a significant amount. Lastly, the click of the coil did get louder at the 1.2k kV step, but it

still was not significantly louder as hoped for.

The interest in performing rTMS was still present, so another test was planned to test whether it

could perform rTMS successfully. Repetitive Transcranial Stimulation (rTMS) is a handy feature to

experiment with for neuroscientists, the Hines group in this situation. So, it was one of the desired

features wanted by the group. The function generator was programmed to send a cycle of five 100 µs

pulses, which was used to begin testing. The high voltage input was set to the max of 1.2 kV, and once

the circuit fully charged, it was triggered. The results were interesting; the click of the coil seemed to be

a bit louder with rTMS than regular TMS. However, the circuit stopped working after the test.

Unfortunately, The MOSFETs could not handle the stress caused by an rTMS input signal.

After looking more into why the circuit stopped working when using rTMS, it was realized that

the rTMS process would not work with the stacked MOSFET circuit design. While the MOSFETs can

quickly turn on together when triggered, the turn-off speed is limited. This will cause one of the

MOSFETs to burn out, and then the other will follow. So, it was concluded that for this circuit design, the

traditional TMS technique, which is a single pulse at a time, would be executed when conducting further

tests. The dead MOSFETs were replaced, and the circuit was returned to normal operating conditions.

The subsequent interest was to observe how using different types of coils would influence the

performance of this circuit. The previous few tests were conducted using the round spool coil, which

had a higher resistance and inductance than the others. It was decided to use the figure-eight coil for

this following test, which had a lower resistance and inductance. This test was similar to one conducted

26
before, where the high voltage started at 400 V and was incremented by 100 V up to 1.2 kV. The

function generator was programmed to send a single 100 µs pulse when triggered. The results of this

test were a bit different in that the MOSFETs burned up after going over the 700 V step. It seems that

the reduction in resistance and inductance caused the current flowing through the MOSFETs to increase

significantly, to the point where the circuit could no longer handle a voltage higher than 700 V. This was

an important observation to make because it helped map out the limitations and shortfalls of this

stacked MOSFET design. The circuit was repaired again and was brought back to a fully functional status.

The round spool coil was used again for the next set of trials conducted, but this time with

varying pulse lengths. First off, the circuit successfully handled pulse lengths ranging from 25 µs to 500

µs. Also, it seemed like the coil click volume peaked at about 100 µs, anything below sounded softer,

and anything above sounded similar. Through testing and brainstorming, the idea of placing the coil on

top of a metal plate to observe if the coil would jump due to the magnetic field it created came to

fruition.

At 100 µs, the coil jumped about an inch off the plate due to the magnetic field it created.

However, at 500 µs, the coil shot off the plate due to the stronger magnetic field produced. The pulse

length influenced the magnetic force that acted to lift the coil from the metal plate. From this

observation, it was firmly concluded that pulse width could also be another vital factor that should be

considered, rather than just the coil click emitted by the coil.

At this point, the stacked MOSFET circuit was tested enough to be able to know its limitations.

The circuit was handed off to the Hines group, along with the results from the in-house testing. More

tests were conducted, and during the testing, MOSFETs were burned a few times, and the circuit was

promptly repaired each time to allow for more testing time. It was concluded that this design was a bit

27
closer to meeting requirements, but it still had significant downfalls, mainly that the MOSFETs were

burning out too often, causing the circuit not to work until repaired.

The author and Dr. Baker went over some options on what could be done to make the circuit

design better. The stacked MOSFETs could handle the highest voltage of 1.2 kV as long as the coil being

used had a relatively large resistance and inductance. In other words, if the coil resistance and

inductance were too low, the circuit would fail at the higher voltages because the stacked MOSFETs

would burn out. One of the ideas that came across sounded like it could help alleviate the MOSFET

burning issues, and the proposed solution was to increase the number of stacked MOSFET paths. The

following section goes into more detail about what this design change means.

28
 CHAPTER 6: THREE PATH STACKED MOSFET TMS CIRCUIT (V3)
The next TMS circuit design that was created was the three-path stacked MOSFET TMS circuit

(V3). The main change with this design was two additional paths for current to flow through were

added, so instead of having one path like the previous design, this design has three. The idea is that the

current will now be divided amongst the three paths, which would, in theory, allow the circuit to handle

more significant amounts of current flow. The main problem that the previous circuit had was that the

stacked MOSFETs kept on burning out because of high current flow. The hope with this new design is

that it should take three times as much current because there are three equal paths. This should allow

more testing with a broader range of coils and without fear of breaking the circuit. The following image

is the schematic design for the third attempt at creating a TMS circuit to meet the needs of the Hines

group.

Figure 6.1 – Schematic diagram for three-path stacked MOSFET TMS Circuit (V3).

The next step in the process was to design a PCB with the circuit seen above. Fortunately, the

design was very similar to the previous one, so this step was easy to execute. The design was finalized,

and below are a few comments about it.

• There is a top and bottom ground plane, and they are connected with several vias.

• Banana jacks are used for the high voltage input, 5 V input, and ground.

29
• An SMA connector is used for the signal-in input to trigger the onboard MOSFET driver, which

then controls the switching of the MOSFETs.

• This version has three double-stacked MOSFETs in parallel to increase the amperage handling

capabilities of the circuit.

• A euro-style header was used to connect the coil to the circuit.

• The current limiting factor is power MOSFET

o Continuous drain current: 46 A at 25 degrees Celsius

o Pulsed drain current: 212 A at 25 degrees Celsius

Figure 6.2 – Front view of rendered PCB design (V3).

30
 Figure 6.3 – Back view of rendered PCB design (V3).

Once the PCB was designed, the next step was to send the design files to a PCB manufacturer to

create the PCB. As soon as the files were sent, more parts were ordered to populate the board. The

figure below shows the fully soldered board ready to be tested.

31
 Figure 6.4 – Picture of the fully assembled circuit board (V3).

The initial testing of this new TMS circuit design was very similar to the testing of the previous

stacked MOSFET design. The testing procedures were planned to test the high voltage handling

capabilities of the circuit, so the high voltage input was started at 400 V and went up to 1.2 kV in 100 V

increments. Note, the starting voltage was set to 400 V. The MOSFETs will not switch appropriately until

the high voltage input is around 400V or higher, just like the previous design. The pulse length was kept

at 100 µs, and several different coils were used during the tests.

The results were close in comparison to V2 results when using a coil with a 20-ohm resistance.

An advantage of this V3 design is that testing lower resistance coils resulted in fewer issues. A coil with a

resistance as low as 3.8 ohms was used, and the circuit held up well. The author was able to charge up

to 1.2kV, and the circuit kept working (sending single 100 µs pulses with plenty of time between pulses)

using this coil. Although, when in the process of discharging the circuit from 1.2 kV, by repeatedly

32
pressing the trigger button within a small-time frame, one of the MOSFETs gave out. These tests

concluded that V3 is more robust than V2, but MOSFETs can still fail when in a close range of 1.2kV and

using low resistance coils.

After this in-house testing, the circuit V3 was handed off to the Hines group for further testing.

One of the coils of best interest to the group had resistance and inductance on the lower end of the

spectrum. It was managed to expose the weak point of the circuit through testing, resulting in a few

burned MOSFETs throughout the testing process. Although TMS V3 was more robust than V2, it still had

issues when testing at high voltages with specific coils. In addition, experimenting with different trigger

pulse lengths (usually longer than 100 µs) was pursued, and the MOSFETs did not handle well during

these tests. The reason is that the longer the pulse length, the more current flows through the

MOSFETs. Even though three paths equally divide the current flow, it is still not enough to keep it alive

when using longer pulses in combination with low resistance coils. Although this design was a bit more

robust than V2, it still did not meet the full expectations of the Hines group, so a change to the design

was imminent.

33
 CHAPTER 7: PROTOTYPE IGBT TMS CIRCUIT
Version three of the TMS circuit still seemed to have downfalls even with the improvements,

which led back to the drawing board. The author and Dr. Baker decided that an attempt to make a

prototype TMS circuit using an IGBT as the switching device was an excellent path to follow next. An

IGBT is an insulated gate bipolar transistor that can handle high voltage and high current by design.

However, driving an IGBT can be challenging because the gate tends to have high capacitance. If the

IGBT gate is not driven appropriately, it can damage it and lead to circuit failure. The goal was to create

a working prototype as soon as possible to test if a design using an IGBT would be promising. Therefore,

a more rudimentary process was taken to design and assemble the circuit quickly and speed up the

process of testing.

The construction of this circuit was promptly completed and included a driving circuit, IGBT,

capacitors, and coil. The circuit was connected with a thick gauge wire to help it withstand high current,

which occurs when low resistance coils are connected to the circuit. The circuit was then put in an

appropriately sized cardboard box to close off the high voltage connections. Putting it in a box was a

safety measure, so when it came to testing the prototype, there was an additional layer between the

operator and the high voltage/current running through the circuit.

34
Figure 7.1 – Schematic diagram of IGBT TMS circuit prototype.

Figure 7.2 – Connector diagram of IGBT TMS circuit prototype.

35
 Figure 7.3 – Top view of IGBT TMS circuit prototype.

Figure 7.4 – Inside view of IGBT TMS circuit prototype.

The IGBT TMS prototype circuit was tested using the usual circular spool coil, and it worked well.

The next step was to continue pushing the prototype to see how well it performs when using different

36
coils and to test the robustness of this design. Therefore, like the previous versions, the circuit was

tested with different coils, and the high voltage incremented from 100 V to 1.2 kV in 100 V steps. A side

note about this prototype circuit is that the high voltage tests can begin at lower voltages since there is

no lower voltage limit like the stacked MOSFET design. However, since the interest is higher than 100 V

voltages, the lower limit did not matter. One of the nice things about this design is that the IGBT was

able to survive higher voltage tests because of the electrical characteristics of the IGBT.

The box prototype was given to the Hines group for testing. Again, one of the focuses was

determining how well the circuit would hold up when using different types of coils. The same conclusion

as in-house testing was arrived at; the circuit was more robust than previous versions. Due to the

promising results of the testing, the Hines group wanted to move forward and have the author create a

more official version of the circuit by designing an actual PCB. The nice thing about designing the PCB is

that the parts list was already made, and the components that were to be used were known because

they were needed for the box prototype.

37
 CHAPTER 8: OFFICIAL IGBT TMS CIRCUIT (V4)
The design of the official IGBT TMS circuit was straightforward. The box prototype and PCB are

pretty much the same circuit but with a few changes. The main difference was the addition of four

additional capacitor slots that could be populated to increase the size of the energy storage bank. By

implementing this change, the circuit now could increase the capacitance by three times of the last two

versions. This gave the Hines group another variable to play with that could potentially help achieve the

testing goals. Below are some comments about the PCB design.

• There is a top and bottom ground plane that are connected with several vias.

• Banana jacks are used for the high voltage input and ground.

• An SMA connector is used for the signal-in input used to trigger the circuit.

• V4 uses an IGBT (no more MOSFETs) that can handle a higher amount of current and voltage.

• A euro-style header is used to connect the coil to the circuit.

• The current limiting factor is IGBT

o Continuous drain current: 900 A

o Pulsed drain current: 1800 A

38
Figure 8.1 – Schematic diagram of official IGBT TMS Circuit (V4).

Figure 8.2 – Front view of rendered PCB design (V4).

39
Figure 8.3 – Back view of rendered PCB design (V4).

Figure 8.4 – Fully assembled circuit board (V4).

40
 Once the PCB was received from the manufacturer, the board was populated and soldered. The

finished board went through some quick in-house tests to ensure it worked like the box prototype

circuit. After it was confirmed that it operated as intended, it was handed off to the Hines group for

more testing. After conducting some tests, the board, unfortunately, stopped working. After some initial

troubleshooting, the problem seemed to be the IGBT device. Although it was hard to believe at first, it

was confirmed that the IGBT had stopped working.

The IGBT was replaced, and all the capacitor slots were populated, increasing the capacitance of

the capacitor bank three times, as requested by the Hines group. This change was requested to observe

how it affected the performance of the circuit. When the updated circuit underwent testing, it worked

for four triggers but then stopped working again. The initial thought was that the increase of

capacitance in the capacitor bank was overloading the IGBT. Still, Dr. Baker suggested it was likely that

the capacitor on the collector of the BJT was too big and causing the gate of the IGBT to burn out. It was

recommended to lower the capacitor on the collector of the BJT to one-fourth of the original value.

The original capacitance value on the BJT collector was 22 nF, so it was decreased to 5 nF. When

the circuit was tested for functionality, it would not do anything when the input pulse used to trigger the

circuit was sent. It seemed that the smaller capacitance did not store enough energy to trigger the gate

of the IGBT. Next, a 10 nF capacitor (half of the original value) was soldered to the collector of the BJT.

With this new change, the circuit started to work correctly again when triggered. A test was planned

where the high voltage began at 200 and went up to 1.2 kV in 200 V increments to determine if this

change helped increase the survivability of the BJT. The circuit survived a high voltage of 1 kV, but when

1.2 kV was tested, the circuit pulsed once and then stopped working. Unfortunately, another IGBT was

burned.

41
 Either the circuit was not working as well as hoped, or there was a mistake somewhere in the

circuit. More testing and investigating were conducted, and upon a closer inspection of the schematic

diagram of the circuit, Dr. Baker was able to catch a mistake. When testing the avalanche transistor

driver by itself during the box prototype phase, a capacitor was added to it to simulate the load that the

IGBT gate would have [1]. The author got caught up in making the PCB the same as the box prototype

and forgot those were in the circuit to simulate the gate. So, this caused an issue with the driver because

it was driving a bigger load. Those unnecessary capacitors reduce the drive strength and cause the IGBT

to turn on slower, which is bad for the component. The desire is to have the IGBT be fully-off or fully-on

so that the voltage across its collector to emitter is zero when conducting the big current. The good

thing is that this was an easy fix, the capacitors were removed, and the circuit was good to go.

Figure 8.5 – Mistake in the design of official IGBT TMS Circuit (V4).

In addition to finding a mistake, some calculations were conducted to better understand the

exact load the driver must drive. The input capacitance of the IGBT is 56 nF, and the reverse transfer

capacitance is 2.2 nF (with Miller effect say 1200/10*2.2nF, this is roughly 250 nF). Therefore, the total

capacitance the avalanche driver must drive is approximately 300 nF (56 nF + 250 nF). So, the VGE

driving the IGBT is (assuming the avalanche transistor breaks down at 120V) VGS = 120*22/(300 + 22) =

8.19 V. This is marginal; see the figure below. Based on this, it was decided to use something a little

42
bigger in place of the 22 nF to boost the VGE to 15V. It was assumed that the IGBTs were burning out

because they were not driven hard enough (opposite what was thought before).

Figure 8.6 – IGBT datasheet table used to demonstrate the issue [4].

Once the new changes were made (no added capacitors at the gate of the IGBT, and 47 nF

capacitor at the collector of the BJT), testing of the board resumed. The high voltage was started at 800

V for these tests, and a 1 ms pulse length was used to trigger. On the first trial, the coil jumped up off

the table; it was a powerful reaction. The coil was sitting directly over the metal cross member under

the table, and it is believed that the electromagnetic field was large enough to use the cross member to

jump. A second trial at 800 V was conducted while recording with a phone. The coil jumped again, but

this time also emitted sparks and burned the coil, as seen in the figures below. One of the initial

thoughts was that if higher voltages were to be tested, it would burn up the coils to be used. On the

43
bright side, however, the IGBT was still alive, and the results looked promising. Thus, further testing of

the circuit continued.

Figure 8.7 – Close-up of figure-eight coil showing burn mark.

Figure 8.8 – Sparks created by the malfunctioning coil.

Upon wanting to conduct further testing, the circuit would not do anything when triggered. This

time it was the BJT from the avalanche transistor driver that had burned out. It was suggested to add a

3.3 ohm resistor in series with the IGBT gate in hopes that it could help the survivability of the BJT. After

this modification was done, more tests were conducted, concluding that 600 V was the max voltage the

44
BJT could handle before it died. Fortunately, even at 600 V, the coil click being emitted was noticeably

louder than in previous versions of the circuit. It was assumed that this was a good indicator that the

electromagnetic wave created was more powerful and good enough for the Hines group.

The board was delivered to the Hines group, and the group pulsed the board a few times at 600

V. The initial impression based on the coil click was that it would probably meet most of the

requirements. Different types of coils were tested, and in the process, another BJT burned out. This

time, the voltage did not go above 600 V when testing, so now the thought was that even 600 V was too

much for the circuit to handle reliably. The added 3.3-ohm resistor in series with the IGBT gate was

replaced with a 50-ohm to try and alleviate this issue. Although it did seem to help a bit, it was not a

game-changing difference when it came to the survivability of the BJT. Another downside to this design

is that rTMS would probably overwork the BJT in a small-time frame and keep burning out. Even so, the

Hines group thought that maybe it could be good enough for more in-depth testing based on the good

results observed when the circuit was working.

Based on the positive feedback, more intensive in-house circuit testing was planned to

determine just how effective the 50-ohm resistor change was. The process involved pulsing the circuit

twenty times at set intervals. The high voltage was started at 400 V and went up in increments of 50 V

up to 1.2 kV (a total of 320 pulses). Surprisingly, the circuit survived this robustness testing, and nothing

burned out. A coil with a smaller gauge magnet wire was used (it seemed to have a thicker insulation

coating). From so many pulses, the coil got compacted and took a spherical shape, as seen in the

following figures.

After finishing the robustness testing, a different coil was used to observe if the outcome would

be different. A coil with the same magnet wire but fewer turns was used and tested with the high

voltage at 1.2 kV. During this test, the IGBT burned out and was replaced with a new one. Based on the

45
results of these and previous tests, it was concluded that the coil must not be too small in terms of

inductance and resistance. It is believed that the large current caused by a small/shorted coil at close to

1200 V will cause the IGBT to burn out.

The smaller gauge magnet wire coating was durable enough to survive 320 pulses. However, in

earlier tests, a coil with a larger gauge magnet wire was used, which was susceptible to shorting because

it seems to have a weaker coating that wears out during more prolonged use. It is believed that the

shorting from the larger gauge coil (which caused the spark show) caused the IGBT to die. Therefore, it

would be wise to keep these limits in mind when continuing further tests with this circuit. If larger gauge

coils are to be used, it is suggested only to use them a few times to reduce the possibility of shorting.

Alternatively, the operator should not be too ambitious in setting the high voltage input and use lower

voltages.

Figure 8.9 – Coil used for the interval robustness tests (insulating coating on magnet wire survived).

Figure 8.10 – Coil that burnt the IGBT when the circuit was charged to 1.2 kV and pulsed.

46
 Figure 8.11 – Side by side comparison between the two coils.

Although the circuit seemed to be working well enough for the Hines group, Dr. Baker and the

author did not feel fully confident in the design due to the downfalls and wanted to improve it. Based on

the failures, the improvement would have to occur in how the IGBT is driven. The reason the avalanche

transistor driver was used was in the first place is because it cuts down on the need for another power

supply. The avalanche transistor driver works directly off the high voltage applied to the circuit. It was

decided that the downfall of needing another power supply to operate a better-designed driver would

outweigh the reliability issues.

47
 CHAPTER 9: PROTOTYPE SCR TMS CIRCUIT
During the time frame of designing a better driver for the IGBT, it was decided to experiment

with replacing the IGBT with an SCR (silicon-controlled rectifier) on the V4 TMS board and observe the

outcomes. It was relatively simple to retrofit the IGBT board to accept an SCR in its place. The resulting

circuit can be seen in the schematic circuit below.

Figure 9.1 – Schematic diagram of SCR TMS circuit.

Figure 9.2 – Fully assembled SCR circuit board.

48
 The SCR circuit is a simpler design than the IGBT circuit. The convenient thing about using an

SCR versus an IGBT is that there is no large load, large gate capacitance to drive. An SCR is a type of

thyristor and is triggered through its gate. Once an SCR is triggered, the internal switching closes the

circuit and remains closed until all of the energy in the circuit is dissipated, and both sides of the SCR are

at equilibrium. Once equilibrium is reached, the SCR will reset itself and will open the circuit.

To operate the SCR TMS circuit seen in figure 9.1, the first thing that needs to be done is to turn

on the high voltage power source to charge the energy storage bank. Once the energy storage bank

reaches the desired level of charge, the power source is turned off. A function generator is connected to

the gate of the SCR through a diode, which is used to mitigate function generator damage in case the

SCR fails, used to trigger the SCR. The function generator is set up to send a pulse to trigger the circuit

when the operator is ready. All the energy stored in the capacitor bank is dumped across the coil when

the circuit is triggered. The circuit remains active until all the energy is dissipated through the coil and

parasitics of the circuit. When equilibrium is reached, the SCR resets, and the circuit is no longer active.

At this point, the circuit is ready to be charged up again to repeat the process.

This circuit worked well when performing in-house testing. However, the downside to using an

SCR as the control switch is that there is no control over when to shut off the device. When the circuit

was triggered, the SCR would remain closed until all the energy from the capacitor bank was depleted.

Then, once everything stabilizes, the SCR resets itself and opens, allowing it to recharge and pulse again.

As stated before, having the most control possible over the switching is desirable for the Hines group.

Since this device cannot be switched off, no more tests were pursued with it, given that the IGBT circuit

was showing promising results.

49
 CHAPTER 10: IMPROVED DRIVER DESIGN FOR IGBT TMS CIRCUIT
The best place for improvement for the IGBT TMS circuit was to redesign the driver circuit. The

previous versions used an avalanche transistor circuit to drive the IGBT and ran off the high voltage

input. Although this method of driving the IGBT worked, it was unreliable and would stop working for

the most part. There are too many factors to account for to predict when the avalanche transistor driver

would give out accurately. So, it was decided to create a new driver design that was much more reliable

and could handle driving any IGBT connected to the circuit.

The design started with a simple inverting topology driver to start simulating with. It was also

decided that it would be good to simulate driving a capacitive load of 1 µF. The capacitive load is used to

simulate the input capacitance of an IGBT. The IGBT used in the previous design has an input

capacitance of 56 nF, so designing a driver that can successfully drive a 1 µF input capacitance was a

worthy goal. This would, in theory, help the circuit drive just about any IGBT without issues.

Figure 10.1 – Initial IGBT driver design.

50
 The initial driver design was tested through simulations, and changes were made to chase a

better design. The first change made was to go from an inverting topology to a non-inverting topology.

This change was made to make it more intuitive to switch the IGBT and increase the drivability. An

additional stage was added to the driver design to get this desired change. Also, more research was

conducted into what MOSFETs to use in the design. The idea was to start with smaller MOSFETs that are

easy to drive in the first two stages of the driver. The MOSFETs in the third stage were increased in size

to increase the drivability. Finally, the MOSFETs in the fourth stage were further increased in size to get

a strong drive signal to the IGBT gate. The idea is that as the signal propagates through the driver, it gets

faster and stronger, given that the stages size up. Another thing that was kept in mind when selecting

the MOSFETs is to have NMOS and PMOS of each stage have characteristics that will allow them to have

a middle switching point. Lastly, the design includes a set of three decoupling capacitors that help keep

the driver voltage steady when triggering.

Figure 10.2 – Improved and finalized IGBT driver design.

51
 Figure 10.3 – Simulation results of finalized IGBT driver design.

As can be seen from the simulation results above, the driver design performed well at driving a 1

µF input capacitance load. One last thing to mention was that the components were selected to be small

surface mount components, so it would not increase the size of the PCB board. As previously stated, the

one downside is that the driver needs a 15 V input to power it. This means that the new PCB design

containing this driver will have an additional input that requires 15 V. Therefore, an additional power

supply is needed to power the redesigned onboard driver. It was considered to include a DC-to-DC

converter to convert the high voltage to 15 V, but since the high voltage varies too much, it was not

worth pursuing. Overall, the purpose of this design was to have a reliable driver that could handle any

IGBT connected to it.

52
 CHAPTER 11: IGBT TMS CIRCUIT (V5.1 AND V5.2)
Now with a new driver that can drive the IGBT successfully, the IGBT should survive more

aggressive testing. This got the author thinking that the size of the PCB could potentially be cut down by

replacing the massive IGBT with a smaller and less expensive one. After some research, a smaller IGBT

was found that could handle 1.2 kV that was seven times cheaper. However, this IGBT could not take as

much peak current as the big one. The large Infineon IGBT can handle a peak current of 1800 A, while

the newly found one could take a peak current of 700 A. When designing the TMS circuits, one of the

goals was to keep the PCB footprint small, if possible. Therefore, it was decided to create two versions

of this next revision, one with the large Infineon IGBT and one with the smaller IXYS IGBT.

Figure 11.1 – Schematic diagram of IGBT TMS circuits (V5.1 and V5.2) [8].

Below are a few comments about each design.

TMS V5.1

• There is a top and bottom ground plane that are connected with several vias.

• Banana jacks are used for the high voltage input, 15 V input, and ground.

• An SMA connector is used for the signal-in input used to trigger the circuit.

• V5.1 makes use of the big IGBT that can handle a high amount of current.

53
 • A MOSFET driver was added to allow for more control over the triggering of the IGBT.

• A new high voltage euro-style header was used to connect the coil to the circuit (it has higher

current/voltage ratings and should also be more mechanically stable).

• The current limiting factor is IGBT

o Continuous drain current: 900 A

o Pulsed drain current: 1800 A

The following pictures show the rendered board.

Figure 11.2 – Front view of rendered PCB design (V5.1).

54
Figure 11.3 – Back view of rendered PCB design (V5.1).

55
 Figure 11.4 – Fully assembled circuit board (V5.1).

TMS V5.2

• There is a top and bottom ground plane connected with several vias.

• Banana jacks are used for the high voltage input, 15 V input, and ground.

• An SMA connector is used for the signal-in input used to trigger the circuit.

• V5.2 makes use of a smaller IGBT that helps reduce PCB footprint size.

• It also has a MOSFET driver to allow for more control over the triggering of the IGBT.

• It uses a new high voltage euro-style header to connect the coil to the circuit.

• The current limiting factor is IGBT

o Terminal current limit: 900 A

o Pulsed current limit: 700 A, 1ms at 25 degrees Celsius

56
The following pictures show the rendered board.

Figure 11.5 – Front view of rendered PCB design (V5.2).

Figure 11.6 – Back view of rendered PCB design (V5.2).

57
 Figure 11.7 – Front and back pictures of the fully assembled circuit board (V5.2).

Once the PCBs were received from manufacturing, the first board that was assembled was V5.2.

The reason is that this is the board that contains the smaller IGBT and the thought was to test its limits

and see if it can stack up to the bigger IGBT. To test this new board, the same procedure to test the first

IGBT circuit was used. Unfortunately, the circuit had issues right at the start. When the 15 V power

supply would be powered on for the MOSFET driver, the power supply voltage would go to almost zero

and draw the max current. The power supply was quickly turned off to prevent damage to the supply.

From the observation, it was assumed that something was shorting out, and it was not noticeable. Quick

troubleshooting was conducted, but it was not enough to determine the issue, and more in-depth

troubleshooting was needed.

One sure thing was that the problem was in the driver part of the circuit, so the focus was put

there. First off, the signal input was set to constant ground, so the driver should be resting in the off

state when power is applied. The circuit was not powered during this test, just the driver using 5 V to

begin troubleshooting. If everything was working correctly, the red voltage values shown below should

be seen when probing.

58
 Figure 11.8 – Probing reference guide used to troubleshoot driver.

As soon as 5 V was applied to the driver, the voltage would drop, and the max current would be

drawn. The highest voltage that did not draw max current was 2.8 V. The input voltage was left at 2.8 V,

and the nodes in red above were tested. N1 had 2.8 V, so that node was good. However, N2 was at

about 2 V and not 0 V. It was believed that the voltage at N1 was not high enough to entirely turn off the

PMOS in the second stage of the driver (which would make sense why N2 was not 0 V). The problem

with going up to a higher voltage to observe if the proper voltages are seen is that it shorts out the

power supply. The MOSFETs were replaced to see if that was causing the issue, but that did not make

any difference. The best thought at this point of testing was that something had to be shorted on the

PCB.

Dr. Baker started helping investigate further into the issue by resorting to looking at the PCB

design files and ended up finding the problem; the PMOS devices were put backward in the PCB

software. Due to the nature of the software, the author first creates a schematic with all of the

components that will be on the PCB board. Then it is double-checked to make sure everything is wired

up correctly on the schematic. After the author confirms that everything looks correct, the PCB layout

design takes place, and the schematic becomes the reference to how everything is connected.

59
Unfortunately, the author overlooked the orientation of the PMOS devices in the driver subcircuit and

connected the drains to VDD when the sources should be connected to VDD. This was a silly mistake

that was not so obvious to see. Thankfully because of Dr. Baker's experience and expertise, the issue

was spotted in the schematic diagram, as seen below.

Figure 11.9 – Schematic diagram showing where the mistake was made.

Initially, it was thought that it would be as easy as flipping the PMOS devices upside down and

swapping the drain and source pins. However, after further investigation of the PMOS devices, it was

not that easy due to how the pins connections were designed, so some jerry-rigging would be required

to make the change successfully. The PMOS components were flipped upside-down and then rotated to

where the drain and source leads lined up with the corresponding PCB pads. The gate pins were left

floating away from the gate pad connection on the PCB. So, a small wire was soldered from the gate pin

of the PMOS to the gate pad of the PCB for the first two PMOS devices. The third PMOS device was

slightly different and required the author to bend the gate pin far enough to solder directly to the gate

60
pad on the PCB. These connections were double-checked using the continuity function on a multimeter

to ensure everything had a solid connection.

Figure 11.10 – Close-up of correction of the error.

Once everything was soldered correctly, as seen in the figures above, every stage of the driver

was tested, and all of them worked. Now the real testing could be continued involving the high voltage

and signal-in inputs. As a quick test, the circuit was charged up to 200 V, and a 1 ms pulse was used to

trigger the circuit, and the circuit worked as intended. The voltage in the capacitor bank almost dropped

to zero with a 1ms pulse, so the pulse length was reduced to 10 µs to observe how the performance

changed. The results were great; a charge of 200 V lasted a good number of pulses before the charge of

the capacitor bank ran out. Lastly, a test to observe how well this circuit could handle rTMS was devised.

61
A train of five, 10 µs pulses were programmed onto the function generator to see if the circuit could

take it. The circuit held up and worked as theorized. The next step in the process would be to test using

testing procedures with more structure.

Two main tests were conducted, and both consisted of testing the high voltage limits of the

circuit. The procedure was to start the high voltage input at 200 V and increment by 100 V up to 1.2 kV.

The only difference between the two tests is the characteristics of the coil being used. Both tests had

the same pulse parameters set on the function generator, which are the following:

Pulse parameters:

• Period - 1ms

• Amplitude - 10Vpp

• Offset - 5V

• Impedance - High Z

• Duty Cycle - 50%

• Ton - 0.5ms

• Number of pulses - 1 (In burst mode)

The first coil used was made from a smaller gauge wire, and it had no spool and had an air core.

This coil had a resistance of 0.1 ohms and an inductance of 1.57 µH (these parameters are so small that

they can almost be considered a wire/short). When going through the first experiment, the circuit held

up to 500 V. On the following trigger, which was at 600 V, the circuit stopped working. After

troubleshooting to figure out the issue, it was confirmed that the IGBT burned out. It was noted that

these results are surprisingly good for the new, smaller IGBT. The reasoning behind the note is that the

coil used for this test could pretty much be considered a short (which means high current flows through

62
the IGBT during pulses). The burnt IGBT was replaced with a new one to continue with the second

experiment.

The second coil used for this experiment was made from the larger gauge magnet wire, and it

had the usual cylindrical plastic spool. The coil had a resistance of 24 ohms and an inductance of 1.62

mH. When starting the second experiment, the circuit was not functioning correctly. At 200 V, the circuit

was arcing when pulsed. It took some time to figure out what was wrong with the circuit, given that the

arcing seemed to come from the coil connector. After further troubleshooting, it was figured out that

the diode had also burned out along with the IGBT from the first experiment. The arcing created a hole

in the diode, and it started eating away at the pad on the board as well. The damage can be seen in the

figures below.

Figure 11.11 – Pictures of burnt diode and damage to the board.

The circuit board was fixed, and the second experiment was continued. Again, the procedure

was the same as the first experiment, and the high voltage input was to be tested from 200 V to 1.2 kV

in 100 V increments. Fortunately, the circuit held up to 1.2 kV with no issues. These test results gave the

author a better outlook on the capabilities of the circuit. It should handle most coils with higher

resistance and inductance (note that the tests were conducted using a pulse length of 0.5 ms).

63
 An additional test was conducted to recheck the rTMS capabilities of the circuit. The function

generator was set to send a 0.5 ms pulse every 10 ms continuously. The circuit was then charged to 1

kV, and soon after, the function generator was turned on, sending the continuous 0.5 ms pulses to

trigger the circuit. Once again, the circuit operated the way it was intended and survived the ambitious

test. This high-stress experiment created so much heat that it caused the magnet wire coating of the coil

to start smoking and can be noted in the figure below by the smoke charring left on the desk after

testing.

Figure 11.12 – Picture showing charring left on the desk from test.

Based on the excellent results of the tests, the circuit was ready for the Hines group to test. A

note of advice was given to the group for testing: if the coil resistance is on the smaller side, try not to

go all the way up to 1.2 kV to reduce the chances of frying the IGBT. Either way, if it turned out that the

new IGBT was still not good enough for the envisioned testing, there was the option to solder up IGBT

V5.1 with the large Infineon IGBT.

64
 The Hines group started further testing with this updated board version, and it went very well.

The primary type of signal focused on was two trains of four pulses (pulse lengths of 100 µs) that were

200 ms apart, which are considered rTMS signals. In addition, different types of coils were used

successfully. The one that seemed to work best based on the testing was the coils with the larger gauge

magnetic wire. Something appreciated with this design was that by having more control over the

switching of the IGBT, the capacitor bank remained charged enough for multiple pulses before needing a

recharge. One of the coils used for a test had a resistance on the higher end, and the group was able to

get a little over twenty triggers before the voltage in the capacitor bank got too low and needed

recharging (with pulse lengths of 50 µs).

65
 CHAPTER 12: CONCLUSION
Transcranial Magnetic Stimulation (TMS) is a type of non-invasive neuron stimulation. A device

that generates high-power electromagnetic waves is required to perform this type of procedure. TMS is

an evolving technology, and the probability of advancements increases as more research is conducted

[7]. Exploring different ways to create and improve the TMS devices used for this research helps

facilitate technology growth. The work documented here analyzes different TMS circuit designs created

for TMS research. Generally, TMS circuits are composed of four main blocks: high voltage power source,

energy storage bank, control switch, and coil. Every block has distinct characteristics that influence how

well the TMS circuit will perform. Based on the outcomes of testing and experimentation, avenues were

found to improve the performance of specific blocks and the circuit design overall. Arguably, the block

that had the most noticeable effect on circuit performance was the control switch. Four control switches

were tested, including power metal-oxide-semiconductor field-effect transistors (Power MOSFETs), gas

discharge tubes (GDTs), insulated-gate bipolar transistors (IGBTs), and silicon-controlled rectifiers (SCRs).

Fortunately, a neuroscientist and his team currently use the latest circuit design (V5.1) to help drive the

advancements and understanding of transcranial magnetic stimulation.

66
 REFERENCES
[1] Baker, R. J. (1998, June 4). High voltage pulse generation using current mode second breakdown in a

bipolar junction transistor. Retrieved from [Link]

[2] Baker, R. J., & Johnson, B. P. (1998, June 4). Stacking power MOSFETs for use in high speed

instrumentation. Retrieved from [Link]

[3] Deng, Z., Lisanby, S. H., & Peterchev, A. V. (2014, June). Coil design considerations for deep

transcranial magnetic stimulation. Retrieved from

[Link]

[4] K, M., & Infineon. (2013, November 4). Infineon FZ900R12KE4-DS-V02_03 - Infineon Technologies.

Retrieved from [Link]

en_de.pdf?fileId=db3a30431f848401011fb7c00c74594e

[5] Koponen, L., Goetz, S., Tucci, D., & Peterchev, A. (2020, March 12). Sound comparison of seven TMS

coils at matched stimulation strength. Retrieved from

[Link]

[6] Krasnow, B. (2011, July 16). Transcranial Magnetic Stimulation project - part 1. Retrieved from

[Link]

[7] Matheson, N., Shemmell, J., De Ridder, D., & Reynolds, J. (2016, August 23). Understanding the

effects of repetitive transcranial magnetic stimulation on neuronal circuits. Retrieved from

[Link]

[8] Senda, D., Strong, H., Hines, D., Hines, R., & Baker, R. (2021, August 01). A Compact 1200 V, 700 A,

IGBT-based pulse generator for repetitive transcranial magnetic stimulation in vivo laboratory

experiments on small animals. Retrieved from [Link]

67
[9] Tang, A., Lowe, A., Garrett, A., Woodward, R., Bennett, W., Canty, A., . . . Rodger, J. (2016, June 30).

Construction and evaluation of rodent-specific RTMS coils. Retrieved from

[Link]

68
 CURRICULUM VITAE

Daniel Senda

Contact Information:

Email: danielsenda95@[Link]

Education:

University of Nevada, Las Vegas

MS, Electrical Engineering, December 2021

University of Nevada, Las Vegas

BS, Electrical Engineering, May 2020

Thesis Title:

Designs and Outcomes of Transcranial Magnetic Stimulation (TMS) and Repetitive Transcranial

Magnetic Stimulation (rTMS) Circuits

Thesis Advisory Committee:

Dr. R. Jacob Baker, Advisory Committee Chair

Dr. Sarah Harris, Advisory Committee Member

Dr. Grzegorz Chmaj, Advisory Committee Member

Dr. Dustin Hines, Graduate College Representative

69