Solid-State Electronics 220 (2024) 108989

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Solid State Electronics

journal homepage: www.elsevier.com/locate/sse

A versatile compact model of resistive random-access memory (RRAM)

Chien-Ting Tung *, Chetan Kumar Dabhi , Sayeef Salahuddin , Chenming Hu
University of California, Berkeley, Berkeley, CA 94720, USA

A R T I C L E I N F O A B S T R A C T

The review of this paper was arranged by We present a versatile compact model for resistive random-access memory (RRAM) that can model different
“Kuniyuki Kakushima” types of RRAM devices such as oxide-RRAM (OxRAM) and conducting-bridge-RRAM (CBRAM). The model
unifies the switching mechanisms of these RRAMs into a single framework. We showcase the model’s accuracy in
Keywords: reproducing published experimental device DC and transient characteristics of various RRAM structures. We also
Compact model
demonstrate the model’s efficacy in capturing RRAM variability and conducting 1T1R circuit simulations.
Memory
RRAM
OxRAM
CBRAM
Memristor
BSIM

1. Introduction robust and flexible enough to model the common characteristics of all
these cases but simple and very fast for simulating large integrated cir-
Resistive memory is a promising technology for future nonvolatile cuits (IC).
RAM, in-memory and analog computing, and neuromorphic applica- There are many studies on the compact modeling of RRAM. Most of
tions, RRAM has the capability to increase computing power by breaking them focus on OxRAMs. Most models [9–13] model a filament growth in
the performance bottleneck of traditional architectures and therefore it the thickness direction of the OxRAM. Empirical functions are intro-
reduces overall cost for large computing systems. It has the potential for duced to fit the RESET process in different OxRAMs such as bilayer
offering high density, fast speed, and low energy consumption [1–4]. RRAM and Al-doped HfOX − based RRAM. The models in [14–16]
Very general structure of RRAM is the dielectric sandwiched between explicitly calculate the growth in both length and width of the filament,
two electrodes, and the commonly used dielectrics in RRAM include vacancy generation, ions hopping, recombination, and other physical
hafnium oxide (HfO2), titanium oxide (TiO2), aluminum oxide (Al2O3), phenomena. For instance, [14] provides a comprehensive model
zinc oxide (ZnO), silicon oxide (SiO2), tantalum oxide (Ta2O5), niobium addressing both DC and AC operations of metal-oxide-based RRAM.
oxide (Nb2O5), and yttrium oxide (Y2O3). These materials are chosen for Their model incorporates detailed physics-based mechanisms such as
their high dielectric constants, stability, and compatibility with existing filament growth dynamics and ion transport, significantly increasing
semiconductor manufacturing processes. Each offers unique advantages, computational complexity and parameter extraction time. Similarly,
such as HfO2’s good switching characteristics, TiO2’s ease of integration, [15] focuses on the variability and reliability aspects of RRAM design,
Al2O3’s dielectric strength, and ZnO’s transparency. The selection of considering factors like filament growth variations, stochastic vacancy
dielectric is critical for ensuring reliable and repeatable resistive generation, and ion hopping mechanisms. This comprehensive approach
switching behavior, which is essential for the performance and scal- results in increased computational overhead and a more cumbersome
ability of RRAM devices [5]. The switching mechanism of RRAM can be parameter extraction process. Furthermore, [16] presents an analytical
generally described as the growth and regression of a conductive path of model for bipolar resistive memories and complementary resistive
metal or oxygen vacancies. The former is the switching mechanism of switches, including detailed calculations of vacancy generation,
conducting-bridge RAM (CBRAM) [6] and the latter is that of oxide- recombination processes, and filament dynamics. This model, although
based RAM (OxRAM) [7]. An RRAM can have both mechanisms work- analytically rigorous, involves significant complexity for SPICE imple-
ing at the same time [8]. Ideally, an RRAM compact model should be mentation, which is crucial for robust SPICE simulation.

* Corresponding author.
E-mail address: [email protected] (C.-T. Tung).

https://doi.org/10.1016/j.sse.2024.108989
Received 7 April 2024; Received in revised form 2 July 2024; Accepted 10 July 2024
Available online 15 July 2024
0038-1101/© 2024 Elsevier Ltd. All rights are reserved, including those for text and data mining, AI training, and similar technologies.
C.-T. Tung et al. Solid State Electronics 220 (2024) 108989

Fig. 2. Model validation of a HfOx/AlOx bilayer RRAM [7]. The symbols are
experimental data. The lines are model simulations.

Fig. 1. The schematic diagram and equivalent circuit of the conducting path in
a resistive memory.

Different from OxRAM, CBRAM’s conduction path is mainly con-

ducted through the metal filament [17,18], and a few studies have been
done to empirically describe the different stages of the switching process
[19,20]. The “S. Yu and H.S.P Wong” in [21] has developed a physics-
based model specific to CBRAM using the dependence of ion migra-
tion velocity on the electric field along with the vertical and lateral
growth/dissolution dynamics of the metallic filament. This model con-
siders both time-dependent transient and quasi-static switching char-
acteristics of the Conductive Bridging RAM (CBRAM).
In this work, we develop an RRAM compact model with the goal of
high flexibility and accuracy to fit different types of RRAMs with special
attention paid to ease of parameter extraction, simulation efficiency,
robustness, and convergence in commercial simulators.
Fig. 3. Model validation with a transient measurement of a HfOx/AlOx bilayer
2. Model RRAM [7]. Black and red lines are the experimental data. The blue line is the
model simulation with Cth. The green dash line is the model simulation
Fig. 1 shows the schematic diagram of our RRAM model, including without Cth.
parasitics (Rs & Cp). We simplify the complex 3D conducting profile by
consolidating these conducting paths into a single column described by vS is a velocity factor, αS is a field factor for SET, q is the elementary
LH. The device is divided into a low-resistance region (LRR) and a high- charge, VH is the voltage across LH, EAS is the activation energy for LRR
resistance region (HRR). The LRR may contain high densities of metal growth, kB is the Boltzmann constant, and T is the temperature of the
ions or oxygen vacancies, while the HRR typically consists of metal- filament including the self-heating effect. (1) describes that when the
oxide or insulator. This general representation encompasses various given energy is above the potential barrier the ions will move to reduce
types of RRAMs such as OxRAM and CBRAM due to their resemblances LH. As voltage, current, and T increase, the resistance suddenly drops
in the switching dynamics. when the electric field across LH reaches a threshold.
During the SET, or turn-on, process, the decrease in the length of the
HRR, which is also the growth of the LRR, can be described as (1) where

Table 1
Comparison of RRAM Compact Models.
Types of RRAM Decoupled SET & RESET Separate HRR & LRR Dynamic Self-heating Parasitic RC

This work OxRAM & CBRAM ✓ ✓ ✓ ✓

[9][12] OxRAM × × × ×
[13] OxRAM ✓ × ✓ ×
[14][15] OxRAM ✓ ✓ × ✓
[16] OxRAM ✓ ✓ × ×
[21] CBRAM × ✓ × ×
[23] OxRAM ✓ ✓ × ×

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C.-T. Tung et al. Solid State Electronics 220 (2024) 108989

Fig. 7. Model validation of a TiN/TiOX /HfOX/Pt planar RRAM [9] at different

Fig. 4. Model simulated dynamics of temperature corresponding to Fig. 3. ICOMP. The symbols are the experimental data. The lines are the model
simulations.

Fig. 5. Model simulations using current ramps to several different

maximum current.
Fig. 8. Model validation of Al-doped HfOX RRAMs [9] with different AlOX
concentrations. The symbols are the experimental data. The lines are the model
simulations.

Fig. 6. Model validation with a TiN/TiOX /HfOX/Pt planar RRAM [9] being
reset to several VRESET.
Fig. 9. Model validation of a CBRAM [6]. The symbols are the experimental
data. The lines are the model simulations.

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C.-T. Tung et al. Solid State Electronics 220 (2024) 108989

⃒ ( )
dLH ⃒⃒ αS qVH (t)/LH − EAS
= − v S exp , (1)
dt ⃒S kB T

During the RESET or HRR growth process, LH is modeled with (2a) with
a similar form as (1), where vR is a velocity factor, αR is the field factor
for RESET, and EAR is the activation energy for RESET. Veff is an
empirical function (2b) that serves as an effective voltage applied in the
RESET process (2a) that models several switching mechanisms
happening in the RESET. These different mechanisms [14] can be
viewed as voltage-driven switching that depends on a combination of VR
(=VL+VH) and VH’(=VH+Voff). Parameters a, b, and Voff are fitting
parameters.
⃒ ( )
dLH ⃒⃒ − αR qVeff (t)/LH − EAR
= vR exp , (2a)
dt R⃒ kB T

bVR (t)VʹH (t)

VR (t) + aVʹH (t) +
Veff (t) = 1V
, (2b)
1+a+b
Fig. 10. Model validation of a Ag/Ta2O5/Pt RRAM which experienced both
Self-heating plays an important role in the switching of RRAMs [22]
metal ion and oxygen vacancy switching [8]. The symbols are the experimental
because the filament temperature T accelerates the SET/RESET mech-
data. The lines are the model simulations.
anisms. T can be modeled with a first-order differential equation with a
thermal capacitance Cth and a thermal resistance Rth. (3) can be solved
by the circuit simulator. The temperatures in (1) and (2) are updated by
(3) during each time step and self-consistent iterations by SPICE simu-
lators (Fig. 3 inset). All our results consider the self-heating including DC
and transient.
dT
Cth Rth = − T + Tamb + Rth VR I, (3)
dt

RRAM is also known for its statistical switching behavior due to the
random location and movements of the ions and vacancies. This model is
compatible with the published variation models. For example, users can
add a random noise term to dLH/dt such that dLH/dt = dLH/dt + Noise to
perform stochastic simulations [9–11,15].
The total resistance is the sum of HRR resistance and the LRR
resistance. The conduction mechanism in RRAMs can be complicated. It
Fig. 11. Model validation of RRAM variation and disturbance [2]. may include direct tunneling, trap-assisted tunneling, electron hopping,
Fowler–Nordheim tunneling, and so on. We model the HRR resistance
with an empirical tunneling resistance equation (5) where rH is the
resistance factor, and L0, VH0, nH, nVH are model-fitting parameters. (5)
keeps the general physics understanding that tunneling current has an
exponential dependence on distance and the resistance will be shorted
when LH becomes zero. nH is introduced because the filament may not be
an exact straight line. It is used to empirically capture those effects.

rH LnHH exp(LH /L0 )

RH = , (5)
1 + (VH /VH0 )2nVH

The LRR resistance is commonly assumed to be an ohmic resistance.

However, from the experimental data, we found that the RESET state IV
characteristics could be nonlinear (e.g., Fig. 10). Therefore, we include
the observed nonlinearity in the LRR resistance, (6), where rL is the
resistance factor, VL is the voltage across the low-resistance region, and
VL0, nL, and nVL are model fitting parameters. nL is the same as nH, which
is used to increase fitting flexibility.

rL (L − LH )nL
RL = , (6)
1 + (VL /VL0 )2nVL

To model the asymmetric IV characteristics seen in the experimental

Fig. 12. 1T1R multilevel READ/WRITE simulation of a RRAM. This is 1T1R data [9], the RL and RH are allowed to be different in positive and
cells simulation for 40 ns with a maximum time step of 1 ps on an Intel Xeon negative voltage regions.
Platinum 8260 processor. The simulation took 7.62 s.
3. Model validations

This model is coded into Verilog-A and verified with published

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C.-T. Tung et al. Solid State Electronics 220 (2024) 108989

Fig. A1. Step 1 – Tuning the HRR parameters.

Fig. A2. Step 2 – Tuning the LRR parameters.

Fig. A3. Step 3 – Tuning the SET process parameters.

experimental data using commercial SPICE simulators. During the time delay as shown in Fig. 3. In addition, we simulate the case if the
simulation, SPICE solves the equivalent circuit (Fig. 1) (with any pe- RRAM is SET using current ramping as shown in Fig. 5 using the same
ripheral circuits such as a drive transistor) to find out LH and current at parameter set as Figs. 2 & 3. Instead of abrupt switching under voltage
each time point. A comparison of this model with other models is shown ramping, the model predicts a negative conductivity region during
in Table 1. Fig. 2 shows model calibration with a HfOx/AlOx bilayer current ramping, which is experimentally observed in [24].
RRAM [7]. The RRAM was operated under multilevel switching using In Fig. 6, the model is tested on TiN/TiOX /HfOX/Pt planar RRAMs at
several VRESET (the maximum negative voltage sweep) and, after each several RESET voltages. Different from Fig. 2, the device is not SET back
RESET, it was set with a positive voltage ramp to 2.5 V. after partial RESET. The corner of the RESET curve is fitted well by
Fig. 3 is the same device under transient pulse measurement with a tuning (extracting) the a, and b parameters in Eq. (2b). Fig. 7 shows
− 2V pulse for 500 ns and a − 2.3 V for 50 ns [23] where the model also switching at several ICOMP. Using ICOMP, we can achieve multilevel
delivers an excellent match. The dynamic of the self-heating (3), and switching in SET. To further demonstrate the model’s flexibility, we
Fig. 4 can be important in impacting the peak transient current and the verify the model on Al-doped HfOX RRAMs with different AlOX

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C.-T. Tung et al. Solid State Electronics 220 (2024) 108989

Fig. A4. Step 4 – Tuning the RESET process parameters.

concentrations [9] in Fig. 8. The model fits the different shapes of RESET Supervision, Resources.
curves and the IV characteristics in the LR state and HR state.
The model can not only be applied to OxRAMs but also CBRAMs.
Declaration of competing interest
Fig. 9 shows the fit of the model to a CBRAM [6] with very good accu-
racy. We further demonstrate that it can also simulate the device that
The authors declare that they have no known competing financial
exhibits both ion and oxygen vacancy switching as shown in Fig. 10 [8]
interests or personal relationships that could have appeared to influence
where the sharp switching in the RESET is evidence of the ion type
the work reported in this paper.
switching coexisting with smooth oxygen vacancy switching.
Users can add a noise source into the differential equations to
Data availability
simulate the variation in RRAM [9–11,15]. Specifically, by adding a
noise term to the equations (1) and (2), such that dLH/dt = dLH/dt +
No data was used for the research described in the article.
Noise, random fluctuations in the length of the filament are introduced.
This approach allows for the generation of random noise in the filament
growth dynamics. The simulation results are validated by fitting the Acknowledgment
model to experimental data from [2], as illustrated in Fig. 11. The in-
clusion of the noise source effectively captures the RRAM resistance This work was supported by the Berkeley Device Modeling Center,
variations, demonstrating the robustness and accuracy of our model in University of California at Berkeley, Berkeley, CA, USA.
accounting for real-world variability of RRAM devices. It shows that this
model is compatible with the variation modeling method in [9–11,15]. Appendix
Finally, we perform a 1T1R simulation of the calibrated RRAM
model in Figs. 2 & 3 with a 7 nm FinFET Verilog-A BSIM-CMG model To extract the parameters of this model, it is recommended to begin
[25]. A multilevel READ/WRITE operation of SET is presented in Fig. 12 with a DC sweep using a slow voltage ramp. First, fit the resistance
showing the model can be integrated with the standard FET model for IC parameters for RL and RH (Figs. A1 and A2). The shape of the current will
simulations. also impact the RESET voltage, as depicted in the figures. The length, L,
can be defined based on the device structure.
4. Conclusion Once the resistance fitting is completed, users should proceed to fit
the SET voltage (Fig A3) and RESET voltage (Fig A4) by tuning the
We have developed a versatile, computationally efficient and robust corresponding parameters. Fitting the RESET IV shape requires iterative
compact model of RRAMs. It is shown to fit many published OxRAM and adjustments of EAR, αR, a, and b to achieve the desired profile. While
CBRAM devices using different material systems. The model applies to fitting the RESET voltage, it may also affect the SET voltage, and occa-
multilevel SET and RESET operations driven by voltage and current. It sionally, adjustments to the resistance parameters are necessary. These
also contains the capability to do variation simulations and IC simula- parameters should be iteratively tuned to obtain the final fitting results
tions with transistors and memory circuits. along with other minor parameters. The following figures demonstrate
the impact of key parameters on the IV characteristics. After fitting the
CRediT authorship contribution statement DC sweep, in some cases, the transient characteristics can be automat-
ically fitted. If not, users should attempt to use thermal capacitance to
Chien-Ting Tung: Writing – review & editing, Writing – original adjust the transient fitting.
draft, Methodology, Formal analysis, Conceptualization. Chetan Kumar To set the compliance current in the simulation, it is recommended to
Dabhi: Writing – review & editing. Sayeef Salahuddin: Writing – re- include a current control resistance or a transistor in series to limit the
view & editing, Supervision. Chenming Hu: Writing – review & editing, voltage across the RRAM. The effects of the parameters are shown in the
below figures.

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C.-T. Tung et al. Solid State Electronics 220 (2024) 108989

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