Chapter -5

Basic computer organization and design

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 Outlines
 Instructional Code

Computer Registers

Computer Instructions

Timing and Control

Instruction cycle

Design of Basic Computer

 Design of accumulator Logic

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 Introduction
 Every different processor type has its own design (different
registers, buses, microoperations, machine instructions, etc)
 Modern processor is a very complex device

 It contains
 Many registers

 Multiple arithmetic units, for both integer and floating point

calculations
 The ability to pipeline several consecutive instructions to speed
execution
 Etc.
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 Introduction…..
 However, to understand how processors work, we will start with

a simplified processor model

 This is similar to what real processors were like ~25 years ago

 M. Morris Mano introduces a simple processor model he calls

the Basic Computer

 We will use this to introduce processor organization and the

relationship of the RTL model to the higher level computer

processor
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 Basic computer
 The Basic Computer has two components, a processor and memory

 The memory has 4096 words in it –4096 = 212, so it takes 12 bits to select

a word in memory

 Each word is 16 bits long

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 Instructional Codes
 The Internal organization of a digital system is defined by the
sequence of microoperations it performs on data stored in its
registers
 The user of a computer can control the process by means of a
program
 A program is a set of instructions that specify the operations,
operands, and the processing sequence
 A computer instruction is a binary code that specifies a sequence of
micro-operations for the computer
 Each computer has its unique instruction set
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 Instructional Codes….
 Instruction codes and data are stored in memory

 The computer reads each instruction from memory and places it in a

control register

 The control unit interprets the binary code of the instruction and

proceeds to execute it by issuing a sequence of micro-operations

 An Instruction code is a group of bits that instructs the computer to

perform a specific operation

 It is divided into parts (basic part is the operation part)

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 Instructional Codes….
 The operation code of an instruction is a group of bits that

defines certain operations such as add, subtract, shift, and

complement

 The number of bits required for the operation code depends on

the total number of operations available in the computer

 2n (or little less) distinct operations → n bit operation code

 Sometimes called a microoperation because it specifies a set of

microoperations
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 Instructional Codes….
 An operation must be performed on some data stored in processor

registers or in memory

 An instruction code must therefore specify not only the operation,

but also the location of the operands (in registers or in the memory),
and where the result will be stored (registers/memory)

 Memory words can be specified in instruction codes by their address

 Processor registers can be specified by assigning to the instruction

another binary code of k bits that specifies one of 2k registers

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 Instructional Codes….
 Each computer has its own particular instruction code format

 Instruction code formats are conceived by computer designers

who specify the architecture of the computer

Stored Program Organization

 An instruction code is usually divided into operation code, operand
address, addressing mode etc.
 The simplest way to organize a computer is to have one
processor register (accumulator AC) and an instruction code
format with two parts (op code, address)
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 Instructional Codes….

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 Instructional Codes….
Indirect Address
 There are three Addressing Modes used for address
portion of the instruction code:
 Immediate: the operand is given in the address portion (constant)

 Direct: the address points to the operand stored in the memory

 Indirect: the address points to the pointer (another address)

stored in the memory that references the operand in memory
 One bit of the instruction code can be used to distinguish
between direct & indirect addresses
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 Instruction codes….
Indirect Address
Instruction Format Effective address
15 14 12 11 0
I Opcode Address

Direct Address Indirect address

22 0 ADD 457 35 1 ADD 300

300 1350

457 Operand

1350 Operand

+ +
AC AC

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 Instructional Codes….

 Effective address: the address of the operand in a

computation-type instruction or the target address in a

branch-type instruction

 The pointer can be placed in a processor register instead of

memory as done in commercial computers

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 Computer registers
 Computer instructions are normally stored in consecutive memory
locations and executed sequentially one at a time
 The control reads an instruction from a specific address in memory and
executes it, and so on
 This type of sequencing needs a counter to calculate the address of the
next instruction after execution of the current instruction is completed
 It is also necessary to provide a register in the control unit for storing the
instruction code after it is read from memory
 The computer needs processor registers for manipulating data and a
register for holding a memory address
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 Computer registers……
 These requirement dictate the following requirement

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 Computer registers….
 Data Register(DR) : hold the operand(Data) read from memory

 Accumulator Register(AC) : general purpose processing register

 Instruction Register(IR) : hold the instruction read from memory

 Temporary Register(TR) : hold a temporary data during processing

 Address Register(AR) : hold a memory address, 12 bit width

 Program Counter(PC) : hold the address of the next instruction to be read

from memory after the current instruction is executed

 Input Register(INPR) : receive an 8-bit character from an input device

 Output Register(OUTR) : hold an 8-bit character for an output device

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 Computer registers….
Common Bus System

 The basic computer has 8 registers, a memory unit, and a control unit

 Paths must be provided to transfer information from one register to

another and between memory and registers

 A more efficient scheme for transferring information in a system with

many registers is to use a common bus

 The outputs of 8 registers and memory are connected to the common bus

 Control Input : LD, INC, CLR, Write, Read

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 Computer registers….

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 Computer Instructions
 The basic computer has three instruction codes formats

 Each formats has 16 bits

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 Computer Instructions…

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 Computer Instructions…
Instruction Set Completeness
 The set of instructions are said to be complete if the computer
includes a sufficient number of instructions in each of the
following categories
 Arithmetic, Logical, and shift : CMA, INC, ..

 Moving information to and from memory and AC : STA,

LDA
 Program control : BUN, BSA, ISZ

22  Input/Output : INP, OUT

 Timing and Control
 Control unit (CU) of a processor translates from machine instructions to

the control signals for the microoperations that implement them

Clock pulses

 The timing for all registers in the basic computer is controlled by a master

clock generator

 The clock pulses do not change the state of register unless the register is

enabled by a control signal

 The control signals are generated in the control unit

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 Timing and Control….
Major types of control organization

✓ Hardwired control

 The control logic is implemented with gates, flip-flops, decoders, and

other digital circuits

 Fast mode of operation: Wiring change(if the design has to be

modified)

✓ Microprogrammed control

 The control information is stored in a control memory

 Easy to change: Any required change can be done by updating the

24 microprograming control memory
 Timing and Control…..
Basic computer control unit

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 Timing and Control….
Example: Register transfer statement: T0: AR ←PC

A transfer of the content of PC into AR if timing signal T0 is active

1) During T0 active, the content of PC is placed onto the bus

2) LD(load) input of AR is enabled, the actual transfer occurs at the next

positive transition of the clock(T0 rising edge clock)

3) SC(sequence counter) is incremented

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 Instruction cycle
 In Basic Computer, a machine instruction is executed in the following

cycle:
1. Fetch an instruction from memory
2. Decode the instruction
3. Read the effective address from memory if the instruction has an
indirect address
4. Execute the instruction

 After an instruction is executed, the cycle starts again at step 1, for the

next instruction

 Every different processor has its own (different) instruction cycle

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 Instruction cycle….
Instruction fetch
 Initially, PC is loaded with the address of the first instruction and SC is
cleared to 0
 T0: AR PC
 Place the content of PC onto the bus by making the bus selection
inputs
Transfer the content of the bus to AR by enabling the LD input of AR
 T1: IR M [AR], PC PC + 1
) Enable the read input memory
 Place the content of memory onto the bus by making S2S1S0= 111
 Transfer the content of the bus to IR by enable the LD input of IR
 Increment PC by enabling the INR input of PC
Decode Instruction
28 T : D0, . . . , D7 Decode IR(12-14), AR IR(0-11) , I IR(15)
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 Instruction cycle….

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Instruction fetch
 Instruction cycle….
 Decode IR(12-14)
D7=1: regester or Input/output instruction
D7=0: memory reference instruction

I IR(15)
Register or input/output instruction
I=0: register instruction:
I=1: input/output instruction

Memory reference instruction

I=1: indirect address mode
I=0: direct mode address
 AR IR(0-11)
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 Instruction cycle….
Instruction execution: T3, T4, T5, T6
 Register reference instruction
 Execution starts with timing signal T3 if D 7= 1, I = 0
 Register Ref. Instr. is specified in b0~ b11of IR
 D7I'T3
 Input/output instruction
 D7IT3, D 7= 1, I = 1
 Memory reference instruction
 The effective address of the instruction in AR and was placed there
during:
o timing signal T2when I = 0, for direct addressing mode
• D'7I'T3:Nothing
o timing signal T3when I = 1 for indirect addressing mode
• D'7IT3:AR M[AR]
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 The execution of MR instruction starts with T4
 Instruction cycle….

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Flow chart for instruction cycle
 Design of Basic Computer
ϗ The basic computer consists of the following components

1. A memory unit with 4096 words of 16 bits each

2. Nine registers : AR, PC, DR, AC, IR, TR, OUTR, INPR, SC

3. Seven flip-flops : I, S, E, R, IEN, FGI, and FGO

4. Two decoders: a 3x8 operation decoder and 4x16 timing decoder

5. A 16-bit common bus

6. Control logic gates

7. Adder and logic circuit connected to the input of A

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 Design of Basic Computer…..
Control Logic Gates

ϗ The output of the control logic circuit

ϗ Signals to control the inputs of the nine registers

ϗ Signals to control the read and write inputs of memory

ϗ Signals to set, clear, or complement the flip-flops

ϗ Signals for S2, S1, and S0 to select a register for the bus

ϗ Signals to control the AC adder and logic circuit

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 Design of Accumulator logic

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 Design of Accumulator logic
• Find the statement that change the AC:AC ?

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AC(Accumulator) control
 Design of ALU

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Adder and logic circuit
 ?
Many thanks!!!
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