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Ericsson M-MGw/MRS Hardware Guide

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Luis A. Andueza
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100% found this document useful (1 vote)
277 views58 pages

Ericsson M-MGw/MRS Hardware Guide

Uploaded by

Luis A. Andueza
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 58

Chapter Modified by Jordana

02: M-Mgw/MRS
hardware and CPP
functions
M-MGw Operation and
Configuration
Chapter 2 Objectives
After this chapter the participants will be able to:

Describe the Media Resource Platform (MRP) concepts


– Describe the M-Mgw GMP (Generic Media Gateway Package)
Hardware Architecture
› Describe the GMP cabinet, subrack configurations for M-MGw
– Describe the MRS MRP hardware Architecture
› Describe the MRP cabinet and Subrack configurations for MRS
– List the M-MGw/ MRS boards and their function
– Understand CPP concepts such as Reliable Programs, Filesystem
and the Database
– Explain Error recovery function, Supervision and the Escalation
staircase
– Understand the Configuration Version (CV) concept

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-1
CPP Modular Platform
Application
WCDMA RNC/RBS,TD-SCDMA RNC/RBS, CDMA2000 BSC/RBS,GSM BSC/RBS, LTE RBS, M-MGw, MRS

SS7
(MTP3, MTP2, M3UA, ATM Transport
SCCP,
SCCP,
SCTP,
... ... (ATM, AAL2, AAL5,
IP
SAAL, SDH, PDH, TDM)
Transport
(IP, Ethernet, UDP,
TCP, SCTP, RSTP, ...)
Internal Transport
(Network synch, ATM
switch, ETH switch)

Control
(Equipment mgmt, SW loading, System Upgrade, O&M,
Tracing, Restarts, File system, Operative system)

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1A | Figure 2-2
Cabinet - M-Mgw and MRS
1 2
M-MGw MRS
GMP V4 MRP V1
double depth cabinet single depth cabinet
Up to 6 subracks Up to 3 subracks

0.48 m2

0.24 m2

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-3
Backplane connection for a CPP
node (ATM based)

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1A | Figure 2-4
CPP Subrack Interconnection
(example)
› Hub structure
Extension subrack 1
– One main subrack ISL SCB
Main subrack
Extension subrack 2ET
– 0 - n extension subracks SCB
SCB MP
ET
› Inter Subrack Links (ISLs) Extension subrack 3ET
SXB
SXB SCB DEV
SCB MP
– Up to 15 m with electrical MP DEV Extension subrack 4ET
SCB DEV
SCB MP
twisted pair SCB ET
DEV
MPSCB
– 1 + 1 or 2 + 2 or 4 + 4
redundancy on ISL SCB DEV

– 4 ISL connections on SCB and


SXB Extension subrack n
SCB
– ISL cables include external ET

references from incoming line MP

rates and system clock SCB DEV

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1A | Figure 2-5
High Capacity Subrack

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1A | Figure 2-6
Cabling example
Ext Subrack 2 (optional)

S C E E C S Note:
C M T T M C
X I I X Power cables and cables
B B B
B for fan control are not
P P
C G G C
shown

Ext Subrack 1 (optional)

S C C S
C M M C
X X
B B B
B
C C

Main Subrack (mandatory hub) Mandatory ESL cable / star topology


S C C S (10G Ethernet)
C M M C
X X Mandatory ISL
B B B
B
C C cable
(330 Mbit/s AMAX)

ECF + O/E converters

2 x 10 GE

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1A | Figure 2-7
Boards in a CPP node

– Switch Core Board – Triple Feed (SCB-TF)


– Common Main Switch Board (CMXB)
– Switch eXtension Board (SXB)
– General purpose Processor Board (GPB)
– Timing Unit Board (TUB)
– Exchange Terminal Board (ETB)
› ET-MC1, ET-C41 and ET-IPG
› M-Mgw only: ET-MF4 (155 ATM only)/ET-MF41(155 ATM/TDM)
– Media Stream Board (MSB) – application board
› MSB3 and MSB4 with DSP, DSP2, VPP or X86 AMC (Advanced
Mezzanine Card)

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-8
SCB-TF and SXB

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-9
CMXB – Common Main Switching
Board

Port Front Connector

I Management RS232 and 1000 Base-T for port I


(used for authorized user internal debugging only)

H Ethernet connector for port H

G Ethernet connector for port G

F Ethernet connector for port F

E Ethernet connector for port E

D Ethernet connector for port D

C Ethernet connector for port C

B Ethernet connector for port B

A Ethernet connector for port A

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1A | Figure 2-10
General Purpose Processor Board (GPB)
and Timing Unit Board (TUB)

Not supported

Not supported
Port C is missing
in earlier releases
of the GPB
© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-11
ETB (ATM Boards): ET-MF4/1, ET-
MF4/2 and ET-MF41 – M-Mgw only

AUG Link = Link between ATM/TDM boards working with optical ports - for MSP (Multiplex Section
Protection) 1+1 protection
© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-12
MSP 1+1 Link Protection
Inital State After Link Switch

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-13
MSP 1+1 Equipment Protection
State after Equipment Switch

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-14
ETB (TDM Boards) : ET-C41/2, ET-
C41/3 and ET-MC1

AUG Link = Link between ATM/TDM boards working with optical ports - for
MSP (Multiplex Section Protection) 1+1 protection
ET-MC1 board can also be used for ATM transport
© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-15
ETB (IP Board): ET-IPG

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-16
IP transmission to ET-IPG via
frontport or backplane port

1 GE
1 GE or
or 10 GE
10 GE
1 GE
ET-IPG CMXB ET-IPG CMXB

10 Gbit/s
10 Gbit/s
CMXB ET-IPG ET-IPG ET-IPG ET-IPG CMXB

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-17
Media Streaming Board: MSB3 and MSB4

MSB4 allows use of following AMCs types:


• DSP (Digital Signal Processor) AMCs for
media stream processing: DSP and DSP2
MSB3 required fro services: CSD
• Virtual Pipeline Processor AMC (VPP
DIGITAL, CSD GSM FAX, CSD GSM
AMC) - for the BGF User Plane
MFH (Media Frame Handler) and
• AMC x86 for video processing
CSD MODEM
• AMC Dummy: Unused slots on the MSB
AMC Carriers must be filled with AMC
Dummy cards.
© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-18
M-MGw GMP V4 Overview

GMP (Generic Media Gateway Package)


© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-19
GMP V4 BC 4001- within a single
depth cabinet

Fan

BC4001 Subrack

Fan

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-20
GMP V4 BC 4010

Fan Fan

Control Subrack Main Subrack

Fan
Fan Fan

Fan

MSE Subrack

Fan

Front view Rear view

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-21
GMP V4 BC 4020

Fan

MSE Subrack

Fan Fan

Control Subrack Main Subrack

Fan Fan

Fan

MSE Subrack

Fan

Rear view
Front view

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-22
GMP V4 BC 4030

Fan Fan

MSE Subrack MSE Subrack

Fan Fan

Fan Fan

Control Subrack Main Subrack

Fan Fan

Fan

MSE Subrack

Fan

Rear view
Front view

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-23
GMP V4 BC 4040

Fan Fan

MSE Subrack MSE Subrack

Fan Fan

Fan Fan

Control Subrack Main Subrack

Fan Fan

Fan
Fan

MSE Subrack
MSE Subrack

Fan
Fan

Rear view
Front view

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-24
GMP V4 BC 4001 (BC 4002 uses CMXB
boards)

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-25
GMP V4 Main Subrack
Main subrack is the ISL hub and
the number of SXB boards
depends on the base
configuration.
The optional GPB boards are
expansion options for the call
arrival rate capacity [calls/s]

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-26
GMP V4 Control Subrack
The control subrack is the ESL hub. Also
IP connectivity options (ET-IPG)
boards are located in the control
subrack
Optional GPB boards are expansion
options for the call arrival rate capacity
[calls/s] and for signaling capacity.

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-27
GMP V4 Media Stream Extension
Subrack

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-28
MRS Cabinet
Fan

3rd
subrack

• Cabinets designed by applications Fan

• Made for footprint 600 × 400 mm Fan

• 1 - 3 subracks in each cabinet. 2nd


• Connection Field: subrack
• Optical/Electrical converters
• Ethernet Connection Field Fan space)
(Airguide

Fan

1st
subrack

Fan
Electrical connection
O/E converter

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1A | Figure 2-29
Media Resource Platform (MRP) V1
example

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1A | Figure 2-30
CPP Execution Platform

The control part of the CPP execution platform consists of:


– A number of processors and communication between them
– A distributed real-time OS, supporting robust application
design
– O&M support for applications
– A fault-tolerant real-time database
– A robust, fault-tolerant file system
– Java Virtual Machine (for management applications)
– A space switch

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-31
Processor Hierarchy

BP

BP BP

MP
BP MPC MP BP

MP

DSP
SP BP
DSP BP
SP
DSP
BP
MSB

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-32
Device Board Module (DBM)

Common function on all CPP boards


SW and HW included
Space switch Interface Circuit (SPIC)
– Up to 64 independent users
– Buffering in 4 QoS classes
– 8,000 cells buffering
– 622 Mbps throughput

Board Processor Module, BPM


– DBM3: PowerPC processor
– 16 MB Flash and 16-128 MB RAM
– AAL5 termination
– Front LEDs

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-33
MSB4, Multi core DSP structure on AMC

• MSB4 internal SP2612 SP2612 SP2603 SP2603


transport is Ethernet
based SP2612 SP2612
• Each ARM is seen SP2603 SP2603
as root device. SP2612 SP2612
• ARM is handling the
device control and
the DSS performs
DSS
the payload
processing AMC ARM11 SC3400

DSS DSS DSS


SC3400 SC3400 SC3400

• AMC DSP has 24 root devices


• AMC DSP2 has 16 root devices, but with higher capacity
• X86 has a 4th generation Intel Core i7 processor for video processing
© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-34
Sharing of call handling resources
Extra
– MGw, BGF and MRF require call handling resources for
H.248 signaling termination and for their control application.
Call handling is executed on GPB boards, which can be
shared by all of them.
– To reach maximum capacity, MRF and BGF should be
configured to use own dedicated call handling GPBs.
– MGw will be active on all call handling GPBs by default and
it has built in load balancing function. When MRF or BGF
functions require more resources from the GPB, then MGw
traffic will automatically move to other less loaded call
handling GPBs.

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-35
Sharing media stream resources
Extra
– Media stream processing resources are provided by DSP
AMC and DSP2 AMC boards for MGw, MRF and BGF to
manipulate audio and video streams. BGF can utilize the
same resource pool for voice transcoding and DTMF as MGw
and MRF.
– By pooling all the media stream processing resources, MRS
enables efficient HW utilization without manual
configuration when the traffic profile experiences daily or
seasonal changes.
– Audio resource pool is fully shared between BGF, MRF and
MGw, while video resource pool is separate and utilized by
MRF only.
© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-36
MPC Services

MPC provides the following services to facilitate fault


tolerant execution:
– Fault tolerant Core support
› 2 MP in Main = Core MP
– Scalable execution and control of reliable programs
– Cluster Interface (CLI)
– State data storage
– Database
– File system

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-37
MPC Services: Fault tolerant Core support – Core MP
Core Managers after a node restart

CA CA
CA CA CA CA

A A P P
A P

CM CM

CA – Core Application
CM – Core Manager
A – Active
P – Passive
– meta channel

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-38
MPC Services: Scalable execution and control of reliable programs
Reliable Programs
Active and passive Reliable Program

MP 1 MP 2
Active Passive
Reliable Reliable
Program Program
CLI CLI

CLI server CLI server

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-39
› MPC Services:
– Cluster Interface (CLI)
– State data storage

CLI and support for State Data Storage


MP1 MP2
Client Client
1 1
3 7 4
5
CLI CLI
2 4 6 8
2 3 5

Replicate
a a
CPP b b CPP
c c
(CLI server) (CLI server)
Active program on MP1 Passive program on MP2 that becomes active
after switchover
1. Registrate 1. Registrate
2. Activate 2. Passivate
3. Fetch container … (switchover)
4. Acknowledge 3. Activate
5. If no container, then create container 4. Fetch Container
6. Acknowledge 5. Acknowledge
7. Save data Now the application is able to read the state data stored
8. Acknowledge (optional) in the replicated container

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-40
MPC Services: Database
Database and Database Manager

MP A (active) MP B (passive)

DB Manager DB Manager

Services

DB DB

RAM RAM

Persistant Data Persistant Data

Flash Disk Flash Disk

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-41
MPC Services: File system

CPP File system

lnh = link handler


Flashdisk /c /c /plnh
4GB

/d /d /d
GPB GPB GPB
Active Passive All other GPBs
Core GPB Core GPB

Global partitions (available from all boards)


BP
• /c
Flash
16 MB
• /plnh (ex. /p002000)
/f Local partitions (only available from the
Board with DBM same board)
• /d
• /f

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-42
CPP File system – Core GPB
/c
• commandlog/
• configuration/
• java/
• loadmodules/
• loadmodules_norepl/
/d • logfiles/
• loadmodules/ • public_html/
• configuration/ /c • security/
• cv/ • tmp/
• rollback.lst • up/
/d • oei
• rollback.cnt GPB
• cv.ptr • aue/
• systemfiles/
• node_id/
• license/
• pm_data/
• pmd/
• usr/
• pi_data/

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-43
Error Recovery

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1A | Figure 2-44
Node Supervision and Error
Recovery Functions

Node Supervision (Error Detection)


– SM, SMA, BM
Error recovery
– Try to solve problem with restarts of programs and
processors through escalation staircase
Fault Isolation
– Isolate PIU if error recovery does not work
Reporting
– Write to Trace & Error log

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-45
Supervision
Error Event

Passive
Passive
Active Passive
Active
System Manager
– Supervises all processors of a node SM
SM SM
– Inter-processor recovery
Core
Core Core
– Centralised in MPC
MP
MP MP
Supervision Timing out
System Manager Agent
Error Event Escalation Supervision
– Supervises MPC consistency Error Event

– Assists in recovery of reliable programs


– One instance on each MP
BM
BP SMA
BP
BP
BP
Board Manager MP
BM
MP
MP
– Supervises programs within a processor
– Processor local recovery
– program – processor
– One instance on each processor

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-46
Error recovery staircase of a
Reliable Program
-No hardware error
-No hardware error
-Possibly no program error
-Program error
-Error in the CLI data

Restart Program A1 Restart Program A2


A0
(remember (forget CLI
(Normal)
CLI data) data)

Restart Processor Conclusion:


- Hardware error
- Activate the passive processor and
restart this processor
Timeout
Hardware error or a program error that
cannot be solved without a restart

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-47
Error reporting in T&E log

Log event Trace and


Process
Error

Log event

T&E log
in RAM

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-48
Start / Restart of a CPP node

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1A | Figure 2-49
Start/Restart of a CPP Node

Definitions
– Domain, Rank, Configuration
Load and Start
– Principles for loading
Configuration files
– CVs
– How is the CV files used when starting up the node?

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-50
Restart Parameters
Domain Configuration
– Node – New / old configuration
– Board (PIU) This is only applicable for node
– Processor restart.
– Program
Rank
– Cold Restart with HW test (forced reload and test. Used when HW
faults are suspected)
– Cold Restart (forced reload and test)
– Refresh Restart (forced reload, less test than cold restart)
– Warm Restart (conditional reload, processor restart)
– Hot Restart (MP program only, MPC containers are preserved) –
Note! Can only be initiated by the system, not the Operator!
© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-51
Restart Ranks
CLI
Rank HW reset HW tests SW loaded T&E log
container

Cold with HW All HW All tests From persistent


Deleted Deleted
test restart reseted executed memory
All HW Limited tests From persistent
Cold restart Deleted Deleted
reseted executed memory
Depends on No tests From persistent
Refresh restart Deleted Preserved
board design executed memory
From persistent
memory plus
No tests conditional
Warm restart No HW reset Deleted Preserved
executed reload if
checksum is
wrong
Programs
No tests restarted from
Hot restart No HW reset Preserved Preserved
executed own memory
segment

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-52
CV files in CPP Node File System
/

d
Startable CV
rollback.cnt cv.ptr
rollback.lst configuration

cv

<cv name>
Loading Server for LMs

LLP.LMID
Links LMs with Plugin Unit
Restart ARMAMENT
counter Stores the MIB
db.dat

ok Indicates if CV is ok

attribute CV attributes
CVs to roll
back to
md5checksum Used for CV FTP transfers
© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-53
Armament file
$ cat ARMAMENT
0,1,ROJ1192108/2,R6,0,1,CXC1321451_R7JC01,10,0,0 (SCB)
0,1,ROJ1192108/2,R6,0,2,CXC1322025_R5A01,50,0,0 (SCB)
0,1,ROJ1192108/2,R6,0,3,CXC1322166_R6J01,200,0,0 (SCB)
0,10,ROJ1192106/3,R2,1,1,CXC1321447_R7JD01,10,0,0 (GPB)
0,10,ROJ1192106/3,R2,1,2,CXC1322812_R5A01,50,0,0 (GPB)
0,10,ROJ1192106/3,R2,1,3,CXC1320785_R10M01,100,0,400000 (GPB)
0,10,ROJ1192106/3,R2,1,4,CXC1321314_R6M01,200,0,0 (GPB)
0,10,ROJ1192106/3,R2,1,5,CXC1321316_R6M01,200,0,0 (GPB)
0,10,ROJ1192106/3,R2,1,6,CXC1321341_R7S01,200,0,0 (GPB)
0,12,ROJ1192106/3,R2,1,1,CXC1321447_R7JD01,10,0,0 (GPB)
0,12,ROJ1192106/3,R2,1,2,CXC1322812_R5A01,50,0,0 (GPB)
0,12,ROJ1192106/3,R2,1,3,CXC1321314_R6M01,200,0,0 (GPB)
0,12,ROJ1192106/3,R2,1,4,CXC1321316_R6M01,200,0,0 (GPB)
0,2,ROJ1192109/1,R2,0,1,CXC1321451_R7JC01,10,0,0 (SXB)
0,2,ROJ1192109/1,R2,0,2,CXC1322025_R5A01,50,0,0 (SXB)
0,3,ROJ1192109/1,R2,0,1,CXC1321451_R7JC01,10,0,0 (SXB)
0,3,ROJ1192109/1,R2,0,2,CXC1322025_R5A01,50,0,0 (SXB)
0,0,ROJ1192108/2,R6,0,1,CXC1321451_R7JC01,10,0,0 (SCB)
0,0,ROJ1192108/2,R6,0,2,CXC1322025_R5A01,50,0,0 (SCB)
: : : : : : : : : :

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-54
Format of an Armament file

Load Module Identification

Board Revision
Switch Module

Load Phase
Number (LMID) and Revision
Number (Subrack)

Pool Size
Board Product
Number Load Class

0, 8, ROJ1192106/3, R2, 1, 1, CXC1321447_R4Y03, 10, 0, 0

CPU type: Heap Size


ASCC Port 0=BP, 1=MP
Number

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1A | Figure 2-55
Chapter 2 Objectives
After this chapter the participants are able to:
Describe the Media Resource Platform (MRP) concepts
– Describe the M-Mgw GMP (Generic Media Gateway Package)
Hardware Architecture
› Describe the GMP cabinet, subrack configurations for M-MGw
– Describe the MRS MRP hardware Architecture
› Describe the MRP cabinet and Subrack configurations for MRS
– List the M-MGw/ MRS boards and their function
– Understand CPP concepts such as Reliable Programs, Filesystem
and the Database
– Explain Error recovery function, Supervision and the Escalation
staircase
– Understand the Configuration Version (CV) concep

© Ericsson AB 2015 | MRS hardware and CPP functions | LZU1082255 R1B | Figure 1-56

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