SHREEYASH PRATISHTHAN’S

SHREEYASH COLLEGE OF ENGINEERING AND TECHNOLOGY

(POLYTECHNIC), CHH. SAMBHAJINAGAR

MICRO-PROJECT REPORT

NAME OF DEPARTMENT:-COMPUTER SCIENCE ENGENEERING

ACADEMIC YEAR:- 2024-25

SEMESTER:-THIRD

COURSE NAME:- DIGITAL TECHNIQE

COURSE CODE:-313303

MICRO-PROJECT TITLE:- EX-NOR GATE

PREPARED BY:-

DURGA YEWALE EN.NO:23511510282

SANJIVANI CHAVAN EN.NO:23511510283

VAISHNAVI KORDE EN.NO:23511510284

TUSHAR MULE EN.NO: 23511510285

UNDER THE GUIDANCE OF:- Prof. V.S.JOSHI

 MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION,
MUMBAI
CERTIFICATE

This is to certify that Mr./ Ms.VAISHNAVI DAMU KORDE of THIRD Semester of Diploma in
COMPUTER SCIENCE ENGINEERING of Institute SHREEYASH COLLEGE OF
ENGINEERING AND TECHNOLOGY has successfully completed Micro-Project Work in Course of
X-NOR GATE for the academic year 2024-25 as prescribed in the I-Scheme Curriculum.

Date:- Enrollment No:-23511510284

Place:-CHH.SAMBHAJINAGAR Exam Seat No.:-

Signature Signature Signature

Guide HOD Principal

Seal Of Institute
 ACKNOWLEDGEMENT

We wish to express our professer gratitude to our guide Prof. V.S.JOSHI who guided us endlessly
in framing and completion of Micro-Project. He / She guided us on all the main points in that
Micro-Project. We are indebted to his / her constant encouragement, cooperation and help. It was
his / her enthusiastic support that helped us in overcoming of various obstacles in the Micro-
Project. We are also thankful to our Principal, HOD, Faculty Members and classmates for
extending their support and motivation in the completion of this Micro-Project.

INDEX
contents

Micro-project proposal

1 Aims/benefits/micro project

Course-outcome addressed
Proposed methodology

4 Action plan

5 Resources required
Microproject report

1 rationale
2 Aims/benefits/micro project
3 Course-outcome addressed

4 Literature review

5 Actual resourse used

6 Skill devloped /learning outcome of this micro project

7 Applications of this micro project

 Micro-Project Proposal
(Format or Micro-Project Proposal about1-2pages)

Title of Micro-Project: X-NOR GATE

Aims/Benefits of the Micro-Project

1. Logical Equality: The primary function is to determine if two binary inputs are equal. It
outputs a high signal when both inputs are the same (both 0 or both 1).
2. Building Complex Circuits: X-NOR gates can be used in more complex logical circuits, such as
arithmetic operations, error detection, and digital comparators.
3. Parity Checking: It helps in applications requiring parity checking, which is useful in error
detection in data transmission.
4. Control Systems: Used in control logic for decision-making based on multiple conditions.

1.0 Course Outcomes Addressed

• Understanding of Fundamental Concepts:

• Students will be able to explain the principles of digital logic and the role of X-NOR gates within the
broader context of logic design.

• Truth Table and Logic Expression:

• Students will be able to construct and interpret the truth table for an X-NOR gate and derive its
corresponding logical expression.

• Circuit Design and Implementation:

• Students will demonstrate the ability to design and implement digital circuits using XNOR gates,
including combinational logic circuits.
2.0 Proposed Methodology :The methodology involves designing the EX-NOR gate circuit using logic gates,
testing functionality, and analyzing output for accuracy

3.1 Action Plan

Name of
Sr. Details of activity Planned Responsible
No. Week Planned Finish Team Members
Start date date
1 1 &2 Discussion & Finalization of Sanjivani chavan
Topic Durga Yewale

2 3 Preparation of the Abstract Vaishnavi Korde

3 4 Literature Review
Tushar Mule

4 5 Submission of Microproject Sanjivani chavan

Proposal ( Annexure-I)

5 6 Collection of information about Vaishnavi Korde , Durga

Topic yewale

6 7 Collection of relevant Tushar mule

content / materials for the
execution of Microproject.

7 8 Discussion and submission of Tushar mule

outline of the Microproject.

8 9 Analysis / execution of Tushar mule

Collected data / information
and preparation of Prototypes
/ drawings / photos / charts /
graphs / tables / circuits /
Models / programs etc.

9 10 Completion of Contents Vaishnavi Korde

of
Project Report
10 11 Completion of Weekly progress Vaishnavi Korde
Report

11 12 Completion of Project Report ( Durga Yewale

Annexure-II)

12 13 Viva voce / Delivery of Durga Yewale

Presentation
4.0 Resources Required (major resources such asraw material, some machining facility,
software etc.)

Sr. Name of Resources / Materials Specification Qty Remarks

No.
1 Battery 1

2 LED Lites 1

3 Wiring 1

Names of Team Members with En. Nos.

DURGA YEWALE EN.NO:23511510282

SANJIVNI CHAVAN EN. NO: 23511510283
VAISHNAVI KORDE EN. NO: 23511510284
TUSHAR MULE EN.NO: 23511510285
 Micro-Project Report
Format for Micro-Project Report (Minimum 4 pages)

Title of Micro-Project:-

1.0 Rationale (Importance of the project, in about 30 to 50words.This is a modified version of

the earlier one written after the work)

This project explores the X-NOR gate's functionality and applications, emphasizing its critical role in
digital logic design. By implementing a practical circuit, we enhance our understanding of equality
checking and error detection, essential for developing reliable electronic systems in modern
technology.

2.0 Aims/Benefits of the Micro-Project:-

1. Practical Understanding: To provide hands-on experience with X-NOR gates, reinforcing

theoretical knowledge through practical application.
2. Circuit Design Skills: To develop skills in designing and implementing digital circuits,
fostering creativity and problem-solving abilities.
3. Error Detection Insight: To demonstrate the importance of X-NOR gates in error detection
and data validation, crucial for reliable communication systems.
4. Collaborative Learning: To encourage teamwork and collaborative skills by working in
groups, enhancing communication and project management abilities.
5. Real-World Applications: To explore the relevance of X-NOR gates in various technological
applications, preparing students for future challenges in electronics and engineering.

3.0 Course Outcomes Achieved :-

• Fundamental Concept Mastery: Students demonstrated a clear understanding of digital logic

principles, specifically the function and significance of X-NOR gates.

• Truth Table Construction: Students successfully constructed and interpreted truth tables for
X-NOR gates, translating logical conditions into corresponding outputs.

• Circuit Design Proficiency: Students designed and implemented circuits using X-NOR gates,
showcasing their ability to apply theoretical knowledge in practical scenarios.

• Application in Comparators: Students analyzed and created circuits for equality comparison,
effectively utilizing X-NOR gates for real-world applications like parity checking.

• Integration with Other Gates: Students effectively combined X-NOR gates with other logic
gates, demonstrating their capability to create complex logical functions.

• Error Detection Understanding: Students explained the role of X-NOR gates in error
detection and correction, recognizing their importance in data integrity.

• Simulation Skills: Students utilized simulation software to model X-NOR gate circuits,
analyzing performance and functionality, and developing a deeper understanding of digital design.
4.0 Literature Review:-
1. Basic Functionality and Characteristics
2. Applications in Digital Circuits

5.0 Actual Methodology Followed

Implementation in Processors

1. Logic Level Design: The X-NOR gate can be implemented using basic logic gates (AND,
OR, NOT) or using specific integrated circuits designed for multi-input logic operations.
2. Circuit Design: In an actual processor, the X-NOR operation might be realized using
combinations of other gates. For instance, A X-NOR B can be expressed as:

(A∧B)∨(¬A∧¬B)(A \land B) \lor (\neg A \land \neg B)(A∧B)∨(¬A∧¬B)

3. Transistor Level: At the transistor level, the gate can be built using NMOS and PMOS
transistors in CMOS technology, which is commonly used in modern processors.
4. Functionality: The X-NOR gate can be used in various applications within processors,
including: o Parity checkers o Error detection circuits o Comparators for equality checks
5. Integration: In modern microprocessors, these gates may be integrated into larger circuits on
a chip, often as part of arithmetic logic units (ALUs) or other computational units.
6. Performance Considerations: The design must consider factors such as propagation delay,
power consumption, and area when integrating X-NOR gates in a processor.

Objectives:

• Understand the Logic Functionality:

• Comprehend the truth table and logical behavior of the X-NOR gate.
• Identify the conditions under which the gate outputs a high signal.

• Circuit Design:

• Design the X-NOR gate using basic logic gates (AND, OR, NOT).
• Create a schematic representation of the X-NOR gate.

Importance of DTE in the project:

• Communication Interface:

• DTE serves as the endpoint for data communication, allowing for the transmission and reception
of data between devices.
• It provides a standard interface for connecting with Data Communication Equipment (DCE),
facilitating interoperability.
 XNOR Gate

In digital electronics, the XNOR gate is a type of logic gate used to perform an exclusive NOR gate. It is
a special type of logic gate used in digital circuits. An XNOR gate, also known as an equivalence gate
or an EX-NOR gate, is a digital logic gate that outputs true (1) when an even number of true inputs
are present. It produces a true output if both of its inputs are the same (either both true or both
false). It is also known as the material biconditional. This logic gate is denoted by this sign “ ”.

What is an XNOR Gate?

An XNOR gate is a specially designed logic gate having only two inputs and one output. The output of
the XNOR gate is logic 1 when both the inputs are logic 1 or logic 0. In other words, the output of the
XNOR gate is logic 1 when both the inputs are the same. For different inputs, the output of the XNOR
gate is logic 0. Hence, the XNOR gate is used to implement similarity checker circuits.

We can design an XNOR gate by combining two logic gates namely, the XOR gate and the NOT gate.
Hence, we can state that

XNOR Gate = XOR Gate + NOT Gate

I. e., an XNOR gate is an XOR gate followed by a NOT gate.

The most important point to note about the XNOR gate is that it can have only two inputs. We cannot
design an XNOR gate having three or more inputs. If we need an XNOR gate with three or more
inputs, then we combine multiple two-input XNOR gates together to implement a circuit that can
take three or more inputs and perform XNOR operation on them.

XNOR Gate Logic Symbol

The logic symbol of an XNOR gate is depicted in the following figure. It has two inputs represented by
A and B, and one output line represented by Y.

XNOR GATE

Truth Table of XNOR Gate

The truth table is a logical table that shows the relationship between inputs and output of an XNOR
gate and provides information about the operation of the gate. In XNOR gate the Output is high (1)
when both inputs are same (either both 0 or both 1), and low (0) when the inputs are different.
Inputs Output

A B Y

0 0 1

0 1 0

1 0 0

1 1 1

Operation of XNOR Gate

The following is the Boolean expression of the XNOR gate,

Y=A⊙B

Here, A and B are the input variables and Y is the output variable.

This expression can also be written as follows,

Y = AB + A’B’

We can also express the operation of an XNOR gate using XOR gate logic as follows:

Y = (A ⊕ B)’

Equivalent Gates

Now we will see how we can form XNOR gate using Different Logic gate and Transistors

XNOR Gate using Basic Logic Gates

The following figure shows the circuit diagram of an XNOR gate using basic logic gates i.e., AND, OR,
and NOT gates.
Logic Diagram of 2-Input XNOR Gate

This circuit operates as an XNOR gate and produces a logic 1 or logic 0 output depending on the
inputs applied to it.

Implementation of XNOR Gate using Transistor

We can implement the XNOR gate using bipolar junction transistors. The schematic circuit diagram of
the XNOR gate using transistors is shown in the following figure.

XNOR Gate Representation in Terms of Transistor

The circuit depicted above presents an efficient approach to constructing an XNOR gate using only
five transistors. There are some other ways to create it using 10 transistors, which is not suggested.
So here we will create an XNOR gate using 5 transistors.

The initial pair of transistors on the left serves the function of a NAND gate, while the middle
transistor acts as a switch. The last two transistors fulfill a role similar to that of an OR gate. In the
provided image, it is evident that both input signals are in the active state, as indicated by the
connection of the two resistors on the far left to inputs A and B and the output LED as 0.

This configuration effectively directs the current away from the resistor nearest to the LED,
preventing it from flowing toward the left ground. Instead, it guides the current along the path
leading to the right ground. Consequently, the output is active, which accounts for the illumination of
the LED. Conversely, when both inputs are inactive, the output remains inactive as the current cannot
reach the left ground. If only one input is active, the current will travel from the far-right resistor to
the middle ground, resulting in the LED remaining unlit.

Let us now discuss how to implement the XNOR gate using NAND Gate and NOR Gate ( Universal
Logic Gates).

Implementation of XNOR Gate using NAND Gate

We can also implement the XNOR gate using NAND gates only. For this we require five two-input
NAND gates. The circuit diagram of an XNOR gate using NAND gates only is shown in the following
figure.

XNOR Gate Construction using NAND Gate

The following are important points about the XNOR gate using NAND gate:

• To create an XNOR Gate from NAND Gate we will require total 5 NAND gate.

• The first NAND Gate output will be: (A.B)’

• Output of the second and third NAND Gate respectively: (A.(A.B)’)’ and (B. (A.B)’)’

• Output of the fourth output is: ((A. (A.B)’)’. B. (A.B)’)’

Now we can simplify this equation using De Morgan’s Law:

Y = ((A.(A.B)’)’ . B.(A.B)’)’ A.(A.B)’ + b.(A.B)’ A(A’ + B’) +B(A’ + B’) (A + B)(A’ + B’) Y=AB’ + A’B Y= A ⊕ B (This
is equal to a XOR Gate output)

So to get the desired output of XNOR Gate, this output will be passed through a NAND Gate again, and
then the output will be :

Y = ( A⨁B )’ = A⨀B

Implementation of XNOR Gate Using NOR Gate

We can also implement an XNOR gate using NOR gate. For this, we need five NOR gates that are to be
connected together as shown in the following figure. This circuit will operate as an XNOR gate.

XNOR Gate Logic Circuit Using NOR Gate

To create a XNOR Gate from an NOR gate it will require five NOR Gate. And we will use De Morgan’s
Law again,

Lets consider the inputs are A and B. Output of the first and second NOR Gate will be :

(A+A)’ and (B+B)’

Output of the third and fourth NOR Gate Respectively :

(B+(A+A)’)’ and (A+(B+B)’)’

Then these two output goes to the last and fifth NOR Gate.

Y = ((B+(A+A)’)’ + (A+(B+B)’)’ )’ (B+A’)’ + (A+B’)’ B’.(A’)’ + A’.(B’)’ Y = B.A’+A.B’ = A⨀B

Applications of XNOR Gate

Given Below are some of the Applications of XNOR gate:

• Comparators: They are used to compare binary values.

 • Binary Arithmetic: XNOR gates are used to detect equal values in binary addition and
subtraction.

• Parity Checking: XNOR gates are utilized to ensure even or odd parity in data.

• Multiplexers (MUX): They assist in selecting input channels.

• Latch and Flip-Flop Control: XNOR gates enable or disable storage elements.

• Decoders: These gates activate specific outputs based on input codes.

• Clock Synchronization: XNOR gates play a role in synchronizing clock signals.

• Data Storage: They improve data storage efficiency when combined with SRAM cells.

• Bi-stable Latching: XNOR gates help maintain stable output states.

• Control Logic: They are pivotal in sequencing and decision-making.

• Full Adders and ALUs: XNOR gates are integral in performing arithmetic operations in digital
circuits.

Advantages of XNOR Gate

Given Below are some of the Advantages of XNOR gate

• Simplicity: XNOR gates are known for their straightforward implementation.

• Dedicated Functionality: They are purpose-built for equality testing.

• Complementary Outputs: XNOR gates offer complementary output signals.

• Ease of Integration: They simplify the design of circuits that involve comparisons.

• Data Reliability: XNOR gates play a crucial role in memory storage, improving data integrity
and reliability.

Disadvantages of XNOR Gate

Given Below are some of the Disadvantages of XNOR gate

• Limited functionality: XNOR gates can only perform equality comparisons and lack versatility
for more complex logic operations.

• Complexity in circuit design: Constructing complex circuits exclusively with XNOR gates can
be challenging and less efficient.

• Input dependency: XNOR gates require an even number of inputs, limiting their flexibility in
various applications.

• Unsuitable for arithmetic operations: Unlike other gates like AND gate and XOR, XNOR gates
are not well-suited for arithmetic operations.
Solved Example based on XNOR Gate

Example: A person is making a lift, where the lift will start,

• only when the current floor and destination floor is given by the user,

• also, if neither current floor and nor destination floor is given.

Otherwise, it will not start.

Solution:

According to the question let’s build a truth table.

Suppose current floor number input denoted by ‘1’ and input not given denoted by ‘0’; The

same way, the destination floor number given denoted by ‘1’ , and not given denoted by ‘0’.

And starting of the lift is denoted by ‘1’ and not starting is denoted by ‘0’.

Now, possible outcomes are:

Input(A) Input (B) Output (A⨀B)

0 0 1

0 1 0

1 0 0

1 1 1

So, according to the question, the lift will start only if both of current and destination floor number is
given or neither the current nor destination floor number is given. Otherwise, it will not start. Here
we can use an XNOR Gate, as XNOR gate functions are the same, it will print one, only when, both of
the input is true, or neither is true.

So the first and the last combination are, when both of the inputs are true, means both of the floor
numbers given or none given. In such a case, the lift will start.
6.0 Actual Resources Used

sr.
Name of Resource/material Specifications Qty Remarks
No.

BATTERY 1
1.

LED LITES 1
2.

WIRING 1
3.

Skill Developed/Learning outcome of this Micro-Project

• Digital Logic Design: Understanding and designing digital circuits using various logic gates,
including X-NOR.

• Circuit Simulation: Proficiency in using simulation software (like LTSpice, Multisim, or Logisim)
to model and analyze circuit behavior.

• Problem-Solving: Developing analytical skills to troubleshoot and optimize circuit designs based on
simulation results.

• Transistor Level Understanding: Gaining insights into CMOS technology and how to implement
logic gates at the transistor level.

• Technical Documentation: Learning to create clear documentation of designs, simulations, and

results, which is essential for communication in engineering.

7.0 Applications of this Micro-Project:- (In about 30 to 50 words)

The EX-NOR gate (Exclusive NOR) is used in applications like error detection and correction circuits, parity
bit generation, digital logic comparisons, and in implementing equality checkers. It is also used in toggle
switches and data transmission systems where signal integrity and accuracy are crucial
 MICRO-PROJECT EVOLUTION SHEET

Name of Student:- VAISHNAVI KORDE En. No.23511510284

Name of Program: DIGITAL TECHNIQES
Course Name:-COMPUTER SCIENCE ENGINEERING Course Code:-313303
Title of The Micro-Project:- X-NOR GATE
Course Outcomes Achieved:-

a) Understanding of Digital Logic Fundamental

b) Circuit Analysis and Design Skills

Sr. Poor Average Good Excellent Sub

No. (Marks1-3) (Marks4-5) (Marks 6-8) (Marks9-10) Total
Characteristic to be assessed

(A) Process and Product Assessment (Convert Below total marks out of 6Marks)

Relevance to the course

1

2 Literature
Review/information
collection

3 Completion of the Target as

Per project proposal

4 Analysis of Data and

representation

5 Quality of
Prototype/Model

6 Report Preparation

(B) Individual Presentation/Viva(Convert Below total marks out of 4Marks)

Presentation
7

8 Viva

(A) (B) Total Marks

Process and Product Individual Presentation/ Viva (4
Assessment (6 marks) marks) 10

Name of Course Teacher V.S.JOSHI

Dated Signature:-