Computer Organization and
Architecture
Syllabus
Syllabus
Computer Architecture v/s Computer
Organization
Feature Computer Architecture Computer Organization
Conceptual design and
Physical implementation of
fundamental operational
Definition the design and structure of a
structure of a computer
computer system
system
Detailed physical
High-level design,
Focus implementation and
functionality, and capabilities
operational aspects
How hardware components
How the system performs
Concerned with work together to perform
tasks and processes
tasks
Instruction set architecture Control signals, data paths,
Key Elements (ISA), data types, addressing memory hierarchy,
modes, processor design interfaces, and I/O operations
Structure and Function
At each level, the designer is concerned with
structure and function:
■ Structure: The way in which the components
are interrelated.
■ Function: The operation of each individual
component as part of the structure.
Functions of a Computer
■ Data processing
■ Data storage
■ Data movement
■ Control
Structure of a Computer
■ Central processing unit (CPU)
■ Main memory
■ Input and Output Unit
■ System interconnection
Structure of a Computer (Single-
Processor Computer)
Structure of CPU
■ Control Unit: Controls the operation of the
CPU and hence the computer.
■ Arithmetic and Logic Unit (ALU): Performs
the computer’s data processing functions.
■ Registers: Provides storage internal to the
CPU.
■ CPU Interconnection: Some mechanism that
provides for communication among the control
unit, ALU, and registers.
John von Neumann Machines
The components of a computer consists of the
following three components.
• Data and instructions are stored in a single read–
write memory.
• The contents of this memory are addressable by
location, without regard to the type of data
contained there.
• Execution occurs in a sequential fashion (unless
explicitly modified) from one instruction to the next.
Difference between Hardwired and
Software Programming
Computer Components:
Top Level View
Basic Instruction Cycle
Instruction Format
Example of Program Execution
Instruction Cycle State Diagram
Elements of a Machine Instruction
Each instruction must contain the following
information required by the processor for
execution.
• Operation code
• Source operand reference
• Result operand reference
• Next instruction reference
Instruction Set Architecture (ISA)
• Defines the set of instructions a processor can
execute.
• Acts as an interface between hardware and
software.
• Examples: x86, ARM, MIPS.
Instruction Format
1. An operation code field that specifies the
operation to be performed.
2. An address field that designates a memory
address or a processor register.
3. A mode field that specifies the way the
operand or the effective address is
determined.
Instruction Format
1. Opcode (Operation Code)
• The portion of a machine language instruction that specifies
the operation to be performed.
• Each opcode corresponds to a unique operation (e.g., ADD,
SUB, MUL).
2. Operands
• Values or addresses used by the instruction.
• Can be immediate values, registers, or memory addresses.
3. Addressing Modes
• Methods for specifying the operands of an instruction.
• Common modes include immediate, register, direct,
indirect, indexed, and base-register addressing.
Types of Instructions (Based on
Function)
1. Data Transfer Instructions
• Move data between registers, memory, and I/O devices.
• Examples: LOAD, STORE, MOVE.
2. Arithmetic Instructions
• Perform arithmetic operations like addition, subtraction, multiplication, and division.
• Examples: ADD, SUB, MUL, DIV.
3. Logical Instructions
• Perform bitwise operations such as AND, OR, XOR, and NOT.
• Examples: AND, OR, XOR, NOT.
4. Control Flow Instructions
• Change the sequence of execution.
• Examples: JMP (jump), CALL (call a procedure), RET (return from a procedure), conditional
branches (BEQ, BNE).
5. Input/Output Instructions
• Manage data exchange with peripheral devices.
• Examples: IN, OUT.
Types of Instructions (Based on
Given Addresses)
In computer architecture, instructions can be
categorized based on the number of addresses they
use.
Zero-Address Instructions: Operands are implicitly
on the stack (e.g., stack-based operations).
One-Address Instructions: One explicit operand,
typically involving an accumulator.
Two-Address Instructions: Two explicit operands,
one of which is also the destination.
Three-Address Instructions: Three explicit
operands, providing the most flexibility.
Illustration with an Example
Zero Address Instruction
Illustration with an Example
One Address Instruction
Illustration with an Example
Two Address Instruction
Illustration with an Example
Three Address Instruction
Another Example
Zero Address Instruction
• PUSH A
• PUSH B
• MUL
• PUSH C
• PUSH D
• DIV
• ADD
• PUSH E
• PUSH F
• ADD
• SUB
• POP X
Another Example
One Address Instruction
• LOAD A ; Accumulator = A
• MUL B ; Accumulator = A * B
• STORE T1 ; Temporary storage T1 = A * B
• LOAD C ; Accumulator = C
• DIV D ; Accumulator = C / D
• ADD T1 ; Accumulator = (A * B) + (C / D)
• STORE T2 ; Temporary storage T2 = (A * B) + (C / D)
• LOAD E ; Accumulator = E
• ADD F ; Accumulator = E + F
• SUB T2 ; Accumulator = (A * B) + (C / D) - (E + F)
• STORE X ; X = (A * B) + (C / D) - (E + F)
Another Example
Two Address Instruction
• MOVE A, R1 ; R1 = A
• MUL B, R1 ; R1 = A * B
• MOVE C, R2 ; R2 = C
• DIV D, R2 ; R2 = C / D
• ADD R1, R2 ; R2 = (A * B) + (C / D)
• MOVE E, R3 ; R3 = E
• ADD F, R3 ; R3 = E + F
• SUB R3, R2 ; R2 = (A * B) + (C / D) - (E + F)
• MOVE R2, X ; X = (A * B) + (C / D) - (E + F)
Another Example
Three Address Instruction
•MUL R1, A, B ; R1 = A * B
•DIV R2, C, D ; R2 = C / D
•ADD R3, R1, R2 ; R3 = (A * B) + (C / D)
•ADD R4, E, F ; R4 = E + F
•SUB X, R3, R4 ; X = (A * B) + (C / D) - (E + F)
Another Example
Zero Address Instruction
•PUSH A
•PUSH B
•SUB
•PUSH C
•PUSH D
•PUSH E
•MUL
•ADD
•DIV
•POP Z
Another Example
One Address Instruction
•LOAD A ; Accumulator = A
•SUB B ; Accumulator = A - B
•STORE T1 ; Temporary storage T1 = A - B
•LOAD D ; Accumulator = D
•MUL E ; Accumulator = D * E
•ADD C ; Accumulator = C + (D * E)
•DIV T1 ; Accumulator = (A - B) / (C + (D * E))
•STORE Z ; Z = (A - B) / (C + (D * E))
Another Example
Two Address Instruction
•MOVE A, R1 ; R1 = A
•SUB B, R1 ; R1 = A - B
•MOVE D, R2 ; R2 = D
•MUL E, R2 ; R2 = D * E
•ADD C, R2 ; R2 = C + (D * E)
•DIV R2, R1 ; R1 = (A - B) / (C + (D * E))
•MOVE R1, Z ; Z = (A - B) / (C + (D * E))
Another Example
Three Address Instruction
•SUB R1, A, B ; R1 = A - B
•MUL R2, D, E ; R2 = D * E
•ADD R3, C, R2 ; R3 = C + (D * E)
•DIV Z, R1, R3 ; Z = (A - B) / (C + (D * E))
Addressing Modes
Addressing modes in computer architecture define how the
operand of an instruction is chosen. They provide various
ways to specify the operands for the instructions.
■ Immediate
■ Direct
■ Indirect
■ Register
■ Register indirect
■ Displacement
■ Stack
Some Notations
A = contents of an address field in the instruction
R = contents of an address field in the instruction
that refers to a register
EA = actual (effective) address of the location
containing the referenced operand
(X) = contents of memory location X or register X.
Immediate Addressing
The simplest form of addressing is immediate
addressing, in which the operand value is present in the
instruction
Operand = A
Example:
MOV R1, #5 ; Move the value 5 into register R1
Direct Addressing
A very simple form of addressing is direct
addressing, in which the address field contains the
effective address of the operand:
EA = A
Example:
MOV R1, 1000 ; Move the value at memory address 1000 into register R1
Indirect Addressing
With direct addressing, the length of the address field is
usually less than the word length, thus limiting the
address range. One solution is to have the address field
refer to the address of a word in memory, which in turn
contains a full-length address of the operand. This is
known as indirect addressing:
EA = (A)
Example:
MOV R1, (R2) ; Move the value at the address contained in register R2 into
register R1
Indirect Addressing
Register Addressing
Register addressing is similar to direct
addressing. The only difference is that the
address field refers to a register rather than a
main memory address:
EA = R
Example:
MOV R1, R2 ; Move the value in register R2 into register R1
Register Addressing
Register Indirect Addressing
Just as register addressing is analogous to direct
addressing, register indirect addressing is
analogous to indirect addressing. In both cases,
the only difference is whether the address field
refers to a memory location or a register. Thus, for
register indirect address,
EA = (R)
Example:
MOV R1, [R2] ; Move the value at the address contained in register R2 into
register R1
Register Indirect Addressing
Displacement Addressing
A very powerful mode of addressing combines the
capabilities of direct addressing and register indirect
addressing. It is known by a variety of names
depending on the context of its use, but the basic
mechanism is the same. We will refer to this as
displacement addressing:
EA = A + (R)
We will describe three of the most common uses of
displacement addressing:
■ Relative addressing
■ Base-register addressing
■ Indexing
Displacement Addressing
Relative Addressing
Relative addressing For relative addressing, also
called PC-relative addressing, the implicitly
referenced register is the program counter (PC).
That is, the next instruction address is added to
the address field to produce the EA.
Example:
JMP 200 ; Jump to the address computed by
adding 200 to the current instruction address .
Base-Register Addressing
For base- register addressing, the interpretation
is the following: The referenced register
contains a main memory address, and the
address field contains a displacement (usually
an unsigned integer representation) from that
address. The register reference may be explicit
or implicit.
Example:
MOV R1, 4(R2) ; Move the value at the address (R2 + 4) into register
R1
Index Addressing
For indexing, the interpretation is typically the following: The
address field references a main memory address, and the
referenced register contains a positive displacement from that
address. An important use of indexing is to provide an efficient
mechanism for performing iterative operations. Consider, for
example, a list of numbers stored starting at location A. Suppose
that we would like to add 1 to each element on the list. We need to
fetch each value, add 1 to it, and store it back. The sequence of
effective addresses that we need is A, A + 1, A + 2, . . . , up to the
last location on the list. With indexing, this is easily done. The value
A is stored in the instruction’s address field, and the chosen register,
called an index register, is initialized to 0. After each operation, the
index register is incremented by 1.
Stack Addressing Modes
• In many architectures, especially those with
stack-based instruction sets or where the stack
is explicitly managed, push and pop operations
are fundamental.
• Push: Decrements the stack pointer (SP) and
stores a value onto the stack.
• Pop: Retrieves a value from the top of the
stack and increments the stack pointer (SP).
Stack Addressing Modes
