The PIC 16F877
Memory Maps
Data RAM Organization
• Data RAM address space is partitioned into 4 banks of
128 bytes/file registers each:
• 32 lowest registers in banks 0 and 1 and 16 lowest
registers in banks 2 and 3 are SFRs
• Rest are GPRs.
• Highest 16 GPRs in each bank accessible in all banks –
referred to as working space
Data RAM Organization
• Data RAM address space is
partitioned into 4 banks of 128
bytes/file registers each:
Data RAM Organization
SFRs
GPRs
Data RAM Organization
Core
SFRs
Peripheral
SFRs
Working
Space
Core SFRs
STATUS
(03h, 83h, 103h, 183h)
IRP RP1 RP0 T0 PD Z DC C
Zero bit Carry
Half carry bit
STATUS
(03h, 83h, 103h, 183h)
IRP RP1 RP0 T0 PD Z DC C
Time out bit
Power down bit
Register
bank select
Addressing File Registers
INDF effects
the indirect
addressing
OPTION_REG
(81h, 181h)
/RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0
Timer 0
Source Timer 0
Edge
Weak Interrupt
Pullups Source
OPTION_REG
(81h, 181h)
/RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0
Prescaler
Prescaler bits
Assignment
INTCON
(0Bh, 8Bh, 10Bh, 18Bh)
GIE PEIE TMR0IE INTE RBIE TMR0IF INTF RBIF
Individual Interrupt
Enable Bits flags
INTCON
(0Bh, 8Bh, 10Bh, 18Bh)
GIE PEIE TMR0IE INTE RBIE TMR0IF INTF RBIF
Peripheral Interrupt
Enable
Global Interrupt
Enable
Peripheral Interrupt Enable Bits
PIE1 (8Ch)
PSPIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE
PIE2 (8Dh)
CMIE EEIE BCLIE CCP1IE CCP2IE
Peripheral Interrupt Flags
PIR1 (0Ch)
PSPIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF
PIR2 (0Dh)
CMIF EEIF BCLIF CCP1IF CCP2IF
PCON
(8Eh)
/POR /BOR
Power on
reset bit Brown out
reset bit
Program Counter
• Program counter is 13 bits wide.
• Two SFRs provide PC
• PCL (addresses 02h, 82h, 102h and 182h) provides lowest 8
bits
• PCLATH (0Ah, 8Ah, 10Ah and 18Ah) provides the higher 5
bits
• Branching instructions supply a 11-bit addresses.
• Allow branching within a 2k address space.
• Branches across 2k boundaries require PCLATH (4:3) to be
set in software before the branch.
Working Register (W)
• Is the “accumulator” in the PIC.
• Used to hold second operand when operating on two
bytes.
• May also be used also to store result after an
operation.
• Results may be stored in either W or a file register.
PIC 16F877 Instructions
Operations on bytes
• Data transfer, arithmetic, logic and rotates.
• Values file registers, working register and
immediates
Operations on individual bits
• Set bit, clear bit in a file register.
Branching and Call instructions
• Goto instructions
• Bit test and skip instructions
• Call and return instructions
CPU Control Instructions
• Perform control operations on the PIC
Microchip Assembly Language
The native language for Microchip Instructions
Microchip Assembly Language
Hexadecimal numbers – the prefix 0x is used
e.g., 0x56, 0xC8.
Binary numbers – the prefix 0b is used
e.g., 0b10110011.
Decimal numbers – the number is used with no
prefix
e.g. 43, 125.
Microchip Assembly Language
1. ADDWF 27,1
2. DECF 0x63,0
3. MOVWF 0x7E
4. INFSZ 78,0
5. BSF 0x77,5
6. BTFSC STATUS,C
7. XORLW 0x5A
8. CALL 0x2C5
9. RETLW 0xC5
Microchip Assembly Snippets
Conditional Jump when carry cleared
BTFSC STATUS,C ; skip if set
GOTO routine1 ; branch (if clear)
XORLW 0x5A ; normal flow
Looping
loop: DECFSZ 51,1 ; decrement & test
GOTO loop ; loop if not zero
Tutorial Exercise 1
Do all questions from Chapter 2 Tutorial
Questions and submit the following via Google
Classroom
•Questions 1b, 1c, 1f
•Question 3
•Question 4a, 4d, 4g, 4h
