CIRCUIT SIMULATION iyTRODUCTION, CIRCUIT SIMULATION USING SPICE What is circuit simulation. vo or e of circuit simulation in VLST designing. (RGR, Dec. 2015) sans, Computer simulation of a circuit involve employing a computer te * ‘simulate, the circuit performance. The circuit which is simulated gxplain the principl posit can include anywhere from a some elements to several hundred thousand. Depending on the type of analysis needed and the size of circuit involved, vaous types of computer programmes are used for simulations of ICs, Circuit simulation is performed by a circuit-level timing simulator designed to work from symbolic circuit descriptions. The simulator has been designed forMOS vomutetions and can be used wilh circuits as large as several thousand _devigns. The speed Of this simulator results from its selestion of mode imal structure, Only MOSFET models are used and it precalculates tables of simulation values before beginning a simulation. Because of its simpler nodeling and use of symbolic, virtual-grid extraction, such a simulator does not provide the accuracy of a full network analysis program. However, it fills 4 gap between such programs and logic level simulators. It is faster than a detailed circuit simulator but still accurate enough to provide the waveform information necessary for debugging the analog behaviour of a circuit. AO: Explain the simulation of a cireuit using SPICE with suitable Fonchart ([Link], Dec. 2013) Or How simulation does affect in the circuit by using SPICE ? Explain. ([Link]., Dec. 2015) sgl The program af cieit simulation known 38 SPICE i 6 st ining effort, which has spanned nearly twenty years, by a large group Of indivi ‘ A individuals at the University of California at Berkeley. Initially, it was written Sailer tyCrcut Serutston 99 FORTRAN. Practically. a C-lan: 2 ee Scotian ae ron @et MODEL, LEVEL 1 LARGE sicnaL MOTT SIGNAL MODEL, HIGH FREQUENCY mone, EVEL 2 LARS DEL OF MOSFET, LARGE SIGNAL Ter Dey NOISE. pu Wie short note on MOSFET model se Or Z “ paplain the flowchart of SPICE subroutines, (RGEL., Dec. 201 re are three different MOSFET models — 2 model and is useful in the hand calculations. Gaicomnpter simulations in few ap 1.2 model. a time-cor for venfying that no model may be acceptable el devices termed a semi-empirical model. Seve level 3 model. These Output models can de 4OSEQI MOSEQ2 and MOSEQ3 of the SPICE source code. For some of the hierarchical parameter de!100 VLSI Design (Vil-Sem.) Gireut Sima lation The refere 109 jenotes the nominal channel mob; abies. Nee “ ity and C. " specific device mods inthe device element ine, The MODEL lng race density which is defined vy x 4notes the gate deck contains generic information about the el characteris Cox = EoxlTox of devices formed in a process based upon the characterizing, snotes the dielectric constant of $io, parameters The paramet th which i the drawn length decreased te ene and source, LD, teased by the lateral Lag = b-2* LD fnot input, the parameter in Vy, can be determined from 4 &i Nev Proces, = Fig. 3.2 shows a simpli 2 ang MOSEQ3. The large signal currents in quadrant 1 of the Ip ~ Vips plane a Jeut-ort Vas < Vin Con Ip= }Tonmic Vas? Yin Vos Min Vos > Vosat : ae uf st) a ve where, the drain and source are designated so that Vps 2 0. The parameter, 4 ; no= Vin +1b+4 is the threshold voltage. Vat transition between the ohmic and sat denotes a parameter that characterizes iy jon regions. % re ¢y denotes the dielectric constant of silicon, q denotes the charge of aa denotes the intrinsic carrier concentration of silicon and N, 70 ‘denotes ‘substrate doping. The parameter Vyy is the flatband voltage w ‘i Q.5. Discuss level I and level 2 model of a diode. Show that highe hich can be Tevel models are more accurate. (RGRY, Dec. 2014, June 2017) } sefined 8 ~ INss. Ans, Refer to the ans. of QA. Vin tus 0.6. Explain the level I large signal MOSFET model. ‘ox ([Link]., Dec. 201) re the input parameter, N,,, denotes the effective surface state density ad denotes the semiconductor work function difference, which can be femined internally as Ans. tn this mode 4 2 where, the parameter Wry is an internal function of physical constants 's of the materials involved. ms = Wry - Explain the level-2 large signal MOSFET model. (RGPY., June 2015) Ans, tn this cons ion NFS= tana f NFS 20 1°25 )yps]otaso | 68> Jens k102 VLSI Design (\ Circuit Simutation 103 where the cut-off transition regi V2 Vo + t[yo=Vas ~ ¥8]- 1. /8= Vag 1% fer can be defined as — 1_XxI 2W, I «tes. B a]. ‘The parameter Viyq is used to characters 2 Ladj s a CD. w> Xvvo= Vas the maximum drift velocity of carrier in the chat “at “eros * Vos jon can be defined as Wp = XovV~ Vas + Vos x) denotes @ SPICE input parameter represen . ne poe = 2 FF pawtere the metallurgical vna= 8D te) aa - "1 2Ln 2 * _ fied as an input parameter, 2. can | +(Le-0) Vos - Vin +6-Vpel] t speci P 7, 2. can be determined as, 1 7 2 ] + (Vs ~ Vpyar) - 2 DVimax ter Vinay iS imput, Vpja, can be obtained from solution gf, Quy order polynomial. Vy essentially decreases V, vconent sway tne consent witree pa The amet Xp canbe defied as 265 The parameters 9, Vj, Inso and Igsg are defined as — o> VaNsub Pree ‘The parameter p1, can be defined as n= (DELTA) ee 4 Coxbagh 7 UCRIT. yo i x ol Se ey for level A> Vt0- 118 + (6 Vas) (DELTA) we Sexes Va) ae ‘oxLadj 7 UCRIT.g,; ees -2 KW Ys / | ova aiaten 7, bes0 = FE [06+ Vos ~ Vas)? -(@- vas)"?] ConCVos ~ Vib ~ [Link]), eft 1 ‘The parameters UCRIT, UEXP and UTRA are SPICE input parameters kow . mT ‘sed to characterize mobility degradation. Tass = [{oves-¥a 1m) -3(Vsat ~ (Vas ~ 2 Len 3 Det Q8. Compare the D.C. transfer characteristics (Ip Vs Vp¢as a function = 2te ae gap Zeger a MOSFET using Level 1 and Level ? SPICE models. Use the (Vbsat (Yas ~¥))-F [fore =Vps +4)? -(-Vps): il SPICE process model parameters. (RGPY,, Dec. 2016) STs parameter Kis fan bo dele ed Ans. Refer to the ans. of Q.6, Q.7, Q.6 (Unit-M) and Q.10 (Usi Kak vO ceuss the High frequency MOSFET model in dei Ho i surface mobility, The parameter DELTAS Explain in detail about high frequency MOSFET model (RGRW., Nox. 2019) frequency MOSFET madel can be obtained from the D.C. the identifiable parasitic capacitances to the D.C. model =i ion, WR-YP ns, The Rodel by adding1 ~ Constant that characterizes the junction type FC = Forward bias capacitance cocfficiest. jew of a pn diffused june tance associated with the reverse biel junction406 VLSI Design (Vil-Sem,) (for Vp < FC.6q) of either the source or drain can be defined as [Link] cum st sources cisw.p se ote Meter tin Crna = Topi SW a densties of where, CJ = Zero. { = Frequency in Hz = Effective channel length, ‘mined internally fom Nay unde farge signal diode current and explain it withthe its large signal current. CLA (RGEX,, June 2015) acer! —FC(L+ MJ) + aM casw.P M -F sw) + VBS Ec) MSWy |! FCC+ MISW) on 0.10. Explain tevel 2 large signal model and compare it with th oShie Srequency model. ([Link], Dec. 2018, 2017, Ne Pe Ans, Refer to the ans, of Q.7 and Q: oy 2 RG) ccs Qt Discuss the noise model of he MOSFET. 5 Or Derive a relation of noise model110 VLSI Dosign (Vil-Sem.) (a) D.C. Modeling (6) High Frequency Modeling» 4.6 Modeling of the BIT in SPICE Cireut Simutaton 444 st and V, xst are F( SPICE input p ae Foto. ansition voltages Vers Vicy, Ve 0 yc respectively where FC is a used to Plction region junction mtinyous and spectively, frequency model of BIT and MOSFET ([Link]., Dee. 2013, 2017) i 6, Compare the e gs. Refer to the ans. of Q.15 and Q9, Write short note on BIT noise model, (RGRY., Dec. 2015, 2016, a i May 2019) explain noise model for BIT in detail (RGR, June 2015) ins. Five types of noise OuUrces are used to model he noise characteristics Cxspr = (1 OAC - =) Mig. Myc and Myy are the i input parameters. $5, Gc. clr epesentee by PB, Perea ies the percentage of the the Base OF transistor Ty voltage from the base of transistor T, 16 gt O/T Thermal resistance nose sources ean be chaneanaed he of BE sources with & spectral density as follows ~ Your TE Vcr Sue vesrnOv ‘These type of noises can be modeled in parallel withthe tree resi - fapR and R, a5 shown in Fig. 3.6. Shot and flicker noise canbe mode "he reverse-biased depletion region junction capacitors can be defined aga. 0 Coen! sources, the shol noise curentsoures has 2 spec dn Ms ‘ Suis = 24hco 1 i isconnected from the base to the emitter circuit of transistor T, as shown in AD De 3.6. The flicker noise with a spectral density of Myc rf ic qth Sye* 24leq* 7 Mis and is connected from collector to the emiter circuit of wansistor Ty in the same figure. Iyq and Ig denote the quiescent values of land k. respectively Ky and Ay are the SPICE input parameters and fis the frequency in Ha, Vore YC 0.18. Explain noise model for MOSFET as well as BJT. (RGR, Dec. 2013) Ans, Refer to the ans. of Q.11 and Q.17 i mati ture dependence of BIT. 0.19. Derive @ model for etimating temperature depo eT or Derive a relation for temperature dependence ‘pression to solve any one modeling operation a of the BIT. Use this (RGR, Dec. 2015)iy (vueSom) | yest Des 12 as parameters whl Show tempera, vysions to justify your answer, ([Link], Dee, 2015, plain te various es Mite - IE, Derive expe rendeney OF the By Or an ehe various parameters which SHOW feniperaag Write and ¢ xplain the P ate co a. 20, Jependency of BIT: . tas, SPICE models the temperture dependence of the saturation ¢ a Hs. vant ly) the junction capacitanee parameters (Cyy. Cyes Cys. dy, §. ise eoettivicnts Ky and Ap. and betas (BE DE and BR), * 1 be characterized as (ly. ses ahd py), the no! temperature T the satura ation cutrents & o Wn) ISTO Le Z ag ; : nh i | p YOTUNEY- NTL = . 3 her ttt oll i J ti Logi .\(EXTHNC)-XTB] EGCTY: ke Isc (¢] ol [RSs] wl) where T; denotes any reference temperature, EG(T) is equal to [1.16 - (0.00070212)/(T-+ 1108)] volts and the remaining parameters are SPICE input parameters. The temperature dependence of Cpe Cyes Css dus de and , is denoted for YE ) as Cyy(T) = Cyy(T)LE + OY(T)] y= MIY,{0.0004 (T = Ty) + 1 = {y(TYy(T)H and byT).1T)) dye(T) and where, 3Y, fn (T/T)) ~ EG(T) + [EG(T)]. (1/7) ‘The parameter BF and BR can be detined as xTh BF) = BEG T, (z] ' XTD BRIT) = BR(T, {2} I The temperature dependence of Ky and Ap can be modeled as KT) © KAT) L627, (T))] APT) = ALTO (T)] where